include/hw/riscv/sifive_gpio.h

   1 /*
   2  * sifive System-on-Chip general purpose input/output register definition
   3  *
   4  * Copyright 2019 AdaCore
   5  *
   6  * Base on nrf51_gpio.c:
   7  *
   8  * Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de>
   9  *
  10  * This code is licensed under the GPL version 2 or later.  See
  11  * the COPYING file in the top-level directory.
  12  */
  13 #ifndef SIFIVE_GPIO_H
  14 #define SIFIVE_GPIO_H
  15
  16 #include "hw/sysbus.h"
  17 #define TYPE_SIFIVE_GPIO "sifive_soc.gpio"
  18 #define SIFIVE_GPIO(obj) OBJECT_CHECK(SIFIVEGPIOState, (obj), TYPE_SIFIVE_GPIO)
  19
  20 #define SIFIVE_GPIO_PINS 32
  21
  22 #define SIFIVE_GPIO_SIZE 0x100
  23
  24 #define SIFIVE_GPIO_REG_VALUE      0x000
  25 #define SIFIVE_GPIO_REG_INPUT_EN   0x004
  26 #define SIFIVE_GPIO_REG_OUTPUT_EN  0x008
  27 #define SIFIVE_GPIO_REG_PORT       0x00C
  28 #define SIFIVE_GPIO_REG_PUE        0x010
  29 #define SIFIVE_GPIO_REG_DS         0x014
  30 #define SIFIVE_GPIO_REG_RISE_IE    0x018
  31 #define SIFIVE_GPIO_REG_RISE_IP    0x01C
  32 #define SIFIVE_GPIO_REG_FALL_IE    0x020
  33 #define SIFIVE_GPIO_REG_FALL_IP    0x024
  34 #define SIFIVE_GPIO_REG_HIGH_IE    0x028
  35 #define SIFIVE_GPIO_REG_HIGH_IP    0x02C
  36 #define SIFIVE_GPIO_REG_LOW_IE     0x030
  37 #define SIFIVE_GPIO_REG_LOW_IP     0x034
  38 #define SIFIVE_GPIO_REG_IOF_EN     0x038
  39 #define SIFIVE_GPIO_REG_IOF_SEL    0x03C
  40 #define SIFIVE_GPIO_REG_OUT_XOR    0x040
  41
  42 typedef struct SIFIVEGPIOState {
  43     SysBusDevice parent_obj;
  44
  45     MemoryRegion mmio;
  46
  47     qemu_irq irq[SIFIVE_GPIO_PINS];
  48     qemu_irq output[SIFIVE_GPIO_PINS];
  49
  50     uint32_t value;             /* Actual value of the pin */
  51     uint32_t input_en;
  52     uint32_t output_en;
  53     uint32_t port;              /* Pin value requested by the user */
  54     uint32_t pue;
  55     uint32_t ds;
  56     uint32_t rise_ie;
  57     uint32_t rise_ip;
  58     uint32_t fall_ie;
  59     uint32_t fall_ip;
  60     uint32_t high_ie;
  61     uint32_t high_ip;
  62     uint32_t low_ie;
  63     uint32_t low_ip;
  64     uint32_t iof_en;
  65     uint32_t iof_sel;
  66     uint32_t out_xor;
  67     uint32_t in;
  68     uint32_t in_mask;
  69
  70 } SIFIVEGPIOState;
  71
  72 #endif