hw/arm/exynos4_boards.c

   1 /*
   2  *  Samsung exynos4 SoC based boards emulation
   3  *
   4  *  Copyright (c) 2011 Samsung Electronics Co., Ltd. All rights reserved.
   5  *    Maksim Kozlov <m.kozlov@samsung.com>
   6  *    Evgeny Voevodin <e.voevodin@samsung.com>
   7  *    Igor Mitsyanko  <i.mitsyanko@samsung.com>
   8  *
   9  *  This program is free software; you can redistribute it and/or modify it
  10  *  under the terms of the GNU General Public License as published by the
  11  *  Free Software Foundation; either version 2 of the License, or
  12  *  (at your option) any later version.
  13  *
  14  *  This program is distributed in the hope that it will be useful, but WITHOUT
  15  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16  *  FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  17  *  for more details.
  18  *
  19  *  You should have received a copy of the GNU General Public License along
  20  *  with this program; if not, see <http://www.gnu.org/licenses/>.
  21  *
  22  */
  23
  24 #include "qemu/osdep.h"
  25 #include "qemu/units.h"
  26 #include "qapi/error.h"
  27 #include "qemu/error-report.h"
  28 #include "cpu.h"
  29 #include "sysemu/sysemu.h"
  30 #include "hw/sysbus.h"
  31 #include "net/net.h"
  32 #include "hw/arm/boot.h"
  33 #include "exec/address-spaces.h"
  34 #include "hw/arm/exynos4210.h"
  35 #include "hw/net/lan9118.h"
  36 #include "hw/qdev-properties.h"
  37 #include "hw/boards.h"
  38 #include "hw/irq.h"
  39
  40 #define SMDK_LAN9118_BASE_ADDR      0x05000000
  41
  42 typedef enum Exynos4BoardType {
  43     EXYNOS4_BOARD_NURI,
  44     EXYNOS4_BOARD_SMDKC210,
  45     EXYNOS4_NUM_OF_BOARDS
  46 } Exynos4BoardType;
  47
  48 typedef struct Exynos4BoardState {
  49     Exynos4210State soc;
  50     MemoryRegion dram0_mem;
  51     MemoryRegion dram1_mem;
  52 } Exynos4BoardState;
  53
  54 static int exynos4_board_id[EXYNOS4_NUM_OF_BOARDS] = {
  55     [EXYNOS4_BOARD_NURI]     = 0xD33,
  56     [EXYNOS4_BOARD_SMDKC210] = 0xB16,
  57 };
  58
  59 static int exynos4_board_smp_bootreg_addr[EXYNOS4_NUM_OF_BOARDS] = {
  60     [EXYNOS4_BOARD_NURI]     = EXYNOS4210_SECOND_CPU_BOOTREG,
  61     [EXYNOS4_BOARD_SMDKC210] = EXYNOS4210_SECOND_CPU_BOOTREG,
  62 };
  63
  64 static unsigned long exynos4_board_ram_size[EXYNOS4_NUM_OF_BOARDS] = {
  65     [EXYNOS4_BOARD_NURI]     = 1 * GiB,
  66     [EXYNOS4_BOARD_SMDKC210] = 1 * GiB,
  67 };
  68
  69 static struct arm_boot_info exynos4_board_binfo = {
  70     .loader_start     = EXYNOS4210_BASE_BOOT_ADDR,
  71     .smp_loader_start = EXYNOS4210_SMP_BOOT_ADDR,
  72     .nb_cpus          = EXYNOS4210_NCPUS,
  73     .write_secondary_boot = exynos4210_write_secondary,
  74 };
  75
  76 static void lan9215_init(uint32_t base, qemu_irq irq)
  77 {
  78     DeviceState *dev;
  79     SysBusDevice *s;
  80
  81     /* This should be a 9215 but the 9118 is close enough */
  82     if (nd_table[0].used) {
  83         qemu_check_nic_model(&nd_table[0], "lan9118");
  84         dev = qdev_create(NULL, TYPE_LAN9118);
  85         qdev_set_nic_properties(dev, &nd_table[0]);
  86         qdev_prop_set_uint32(dev, "mode_16bit", 1);
  87         qdev_init_nofail(dev);
  88         s = SYS_BUS_DEVICE(dev);
  89         sysbus_mmio_map(s, 0, base);
  90         sysbus_connect_irq(s, 0, irq);
  91     }
  92 }
  93
  94 static void exynos4_boards_init_ram(Exynos4BoardState *s,
  95                                     MemoryRegion *system_mem,
  96                                     unsigned long ram_size)
  97 {
  98     unsigned long mem_size = ram_size;
  99
 100     if (mem_size > EXYNOS4210_DRAM_MAX_SIZE) {
 101         memory_region_init_ram(&s->dram1_mem, NULL, "exynos4210.dram1",
 102                                mem_size - EXYNOS4210_DRAM_MAX_SIZE,
 103                                &error_fatal);
 104         memory_region_add_subregion(system_mem, EXYNOS4210_DRAM1_BASE_ADDR,
 105                                     &s->dram1_mem);
 106         mem_size = EXYNOS4210_DRAM_MAX_SIZE;
 107     }
 108
 109     memory_region_init_ram(&s->dram0_mem, NULL, "exynos4210.dram0", mem_size,
 110                            &error_fatal);
 111     memory_region_add_subregion(system_mem, EXYNOS4210_DRAM0_BASE_ADDR,
 112                                 &s->dram0_mem);
 113 }
 114
 115 static Exynos4BoardState *
 116 exynos4_boards_init_common(MachineState *machine,
 117                            Exynos4BoardType board_type)
 118 {
 119     Exynos4BoardState *s = g_new(Exynos4BoardState, 1);
 120
 121     exynos4_board_binfo.ram_size = exynos4_board_ram_size[board_type];
 122     exynos4_board_binfo.board_id = exynos4_board_id[board_type];
 123     exynos4_board_binfo.smp_bootreg_addr =
 124             exynos4_board_smp_bootreg_addr[board_type];
 125     exynos4_board_binfo.kernel_filename = machine->kernel_filename;
 126     exynos4_board_binfo.initrd_filename = machine->initrd_filename;
 127     exynos4_board_binfo.kernel_cmdline = machine->kernel_cmdline;
 128     exynos4_board_binfo.gic_cpu_if_addr =
 129             EXYNOS4210_SMP_PRIVATE_BASE_ADDR + 0x100;
 130
 131     exynos4_boards_init_ram(s, get_system_memory(),
 132                             exynos4_board_ram_size[board_type]);
 133
 134     object_initialize(&s->soc, sizeof(s->soc), TYPE_EXYNOS4210_SOC);
 135     qdev_set_parent_bus(DEVICE(&s->soc), sysbus_get_default());
 136     object_property_set_bool(OBJECT(&s->soc), true, "realized",
 137                              &error_fatal);
 138
 139     return s;
 140 }
 141
 142 static void nuri_init(MachineState *machine)
 143 {
 144     exynos4_boards_init_common(machine, EXYNOS4_BOARD_NURI);
 145
 146     arm_load_kernel(ARM_CPU(first_cpu), &exynos4_board_binfo);
 147 }
 148
 149 static void smdkc210_init(MachineState *machine)
 150 {
 151     Exynos4BoardState *s = exynos4_boards_init_common(machine,
 152                                                       EXYNOS4_BOARD_SMDKC210);
 153
 154     lan9215_init(SMDK_LAN9118_BASE_ADDR,
 155             qemu_irq_invert(s->soc.irq_table[exynos4210_get_irq(37, 1)]));
 156     arm_load_kernel(ARM_CPU(first_cpu), &exynos4_board_binfo);
 157 }
 158
 159 static void nuri_class_init(ObjectClass *oc, void *data)
 160 {
 161     MachineClass *mc = MACHINE_CLASS(oc);
 162
 163     mc->desc = "Samsung NURI board (Exynos4210)";
 164     mc->init = nuri_init;
 165     mc->max_cpus = EXYNOS4210_NCPUS;
 166     mc->min_cpus = EXYNOS4210_NCPUS;
 167     mc->default_cpus = EXYNOS4210_NCPUS;
 168     mc->ignore_memory_transaction_failures = true;
 169 }
 170
 171 static const TypeInfo nuri_type = {
 172     .name = MACHINE_TYPE_NAME("nuri"),
 173     .parent = TYPE_MACHINE,
 174     .class_init = nuri_class_init,
 175 };
 176
 177 static void smdkc210_class_init(ObjectClass *oc, void *data)
 178 {
 179     MachineClass *mc = MACHINE_CLASS(oc);
 180
 181     mc->desc = "Samsung SMDKC210 board (Exynos4210)";
 182     mc->init = smdkc210_init;
 183     mc->max_cpus = EXYNOS4210_NCPUS;
 184     mc->min_cpus = EXYNOS4210_NCPUS;
 185     mc->default_cpus = EXYNOS4210_NCPUS;
 186     mc->ignore_memory_transaction_failures = true;
 187 }
 188
 189 static const TypeInfo smdkc210_type = {
 190     .name = MACHINE_TYPE_NAME("smdkc210"),
 191     .parent = TYPE_MACHINE,
 192     .class_init = smdkc210_class_init,
 193 };
 194
 195 static void exynos4_machines_init(void)
 196 {
 197     type_register_static(&nuri_type);
 198     type_register_static(&smdkc210_type);
 199 }
 200
 201 type_init(exynos4_machines_init)