2 * ARM implementation of KVM hooks
4 * Copyright Christoffer Dall 2009-2010
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
11 #include "qemu/osdep.h"
12 #include <sys/ioctl.h>
14 #include <linux/kvm.h>
16 #include "qemu-common.h"
17 #include "qemu/timer.h"
18 #include "qemu/error-report.h"
19 #include "qemu/main-loop.h"
20 #include "sysemu/sysemu.h"
21 #include "sysemu/kvm.h"
22 #include "sysemu/kvm_int.h"
26 #include "internals.h"
27 #include "hw/pci/pci.h"
28 #include "exec/memattrs.h"
29 #include "exec/address-spaces.h"
30 #include "hw/boards.h"
34 const KVMCapabilityInfo kvm_arch_required_capabilities
[] = {
38 static bool cap_has_mp_state
;
39 static bool cap_has_inject_serror_esr
;
41 static ARMHostCPUFeatures arm_host_cpu_features
;
43 int kvm_arm_vcpu_init(CPUState
*cs
)
45 ARMCPU
*cpu
= ARM_CPU(cs
);
46 struct kvm_vcpu_init init
;
48 init
.target
= cpu
->kvm_target
;
49 memcpy(init
.features
, cpu
->kvm_init_features
, sizeof(init
.features
));
51 return kvm_vcpu_ioctl(cs
, KVM_ARM_VCPU_INIT
, &init
);
54 void kvm_arm_init_serror_injection(CPUState
*cs
)
56 cap_has_inject_serror_esr
= kvm_check_extension(cs
->kvm_state
,
57 KVM_CAP_ARM_INJECT_SERROR_ESR
);
60 bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try
,
62 struct kvm_vcpu_init
*init
)
64 int ret
, kvmfd
= -1, vmfd
= -1, cpufd
= -1;
66 kvmfd
= qemu_open("/dev/kvm", O_RDWR
);
70 vmfd
= ioctl(kvmfd
, KVM_CREATE_VM
, 0);
74 cpufd
= ioctl(vmfd
, KVM_CREATE_VCPU
, 0);
80 /* Caller doesn't want the VCPU to be initialized, so skip it */
84 ret
= ioctl(vmfd
, KVM_ARM_PREFERRED_TARGET
, init
);
86 ret
= ioctl(cpufd
, KVM_ARM_VCPU_INIT
, init
);
90 } else if (cpus_to_try
) {
91 /* Old kernel which doesn't know about the
92 * PREFERRED_TARGET ioctl: we know it will only support
93 * creating one kind of guest CPU which is its preferred
96 while (*cpus_to_try
!= QEMU_KVM_ARM_TARGET_NONE
) {
97 init
->target
= *cpus_to_try
++;
98 memset(init
->features
, 0, sizeof(init
->features
));
99 ret
= ioctl(cpufd
, KVM_ARM_VCPU_INIT
, init
);
108 /* Treat a NULL cpus_to_try argument the same as an empty
109 * list, which means we will fail the call since this must
110 * be an old kernel which doesn't support PREFERRED_TARGET.
136 void kvm_arm_destroy_scratch_host_vcpu(int *fdarray
)
140 for (i
= 2; i
>= 0; i
--) {
145 void kvm_arm_set_cpu_features_from_host(ARMCPU
*cpu
)
147 CPUARMState
*env
= &cpu
->env
;
149 if (!arm_host_cpu_features
.dtb_compatible
) {
150 if (!kvm_enabled() ||
151 !kvm_arm_get_host_cpu_features(&arm_host_cpu_features
)) {
152 /* We can't report this error yet, so flag that we need to
153 * in arm_cpu_realizefn().
155 cpu
->kvm_target
= QEMU_KVM_ARM_TARGET_NONE
;
156 cpu
->host_cpu_probe_failed
= true;
161 cpu
->kvm_target
= arm_host_cpu_features
.target
;
162 cpu
->dtb_compatible
= arm_host_cpu_features
.dtb_compatible
;
163 cpu
->isar
= arm_host_cpu_features
.isar
;
164 env
->features
= arm_host_cpu_features
.features
;
167 bool kvm_arm_pmu_supported(CPUState
*cpu
)
169 KVMState
*s
= KVM_STATE(current_machine
->accelerator
);
171 return kvm_check_extension(s
, KVM_CAP_ARM_PMU_V3
);
174 int kvm_arm_get_max_vm_ipa_size(MachineState
*ms
)
176 KVMState
*s
= KVM_STATE(ms
->accelerator
);
179 ret
= kvm_check_extension(s
, KVM_CAP_ARM_VM_IPA_SIZE
);
180 return ret
> 0 ? ret
: 40;
183 int kvm_arch_init(MachineState
*ms
, KVMState
*s
)
185 /* For ARM interrupt delivery is always asynchronous,
186 * whether we are using an in-kernel VGIC or not.
188 kvm_async_interrupts_allowed
= true;
191 * PSCI wakes up secondary cores, so we always need to
192 * have vCPUs waiting in kernel space
194 kvm_halt_in_kernel_allowed
= true;
196 cap_has_mp_state
= kvm_check_extension(s
, KVM_CAP_MP_STATE
);
201 unsigned long kvm_arch_vcpu_id(CPUState
*cpu
)
203 return cpu
->cpu_index
;
206 /* We track all the KVM devices which need their memory addresses
207 * passing to the kernel in a list of these structures.
208 * When board init is complete we run through the list and
209 * tell the kernel the base addresses of the memory regions.
210 * We use a MemoryListener to track mapping and unmapping of
211 * the regions during board creation, so the board models don't
212 * need to do anything special for the KVM case.
214 * Sometimes the address must be OR'ed with some other fields
215 * (for example for KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION).
216 * @kda_addr_ormask aims at storing the value of those fields.
218 typedef struct KVMDevice
{
219 struct kvm_arm_device_addr kda
;
220 struct kvm_device_attr kdattr
;
221 uint64_t kda_addr_ormask
;
223 QSLIST_ENTRY(KVMDevice
) entries
;
227 static QSLIST_HEAD(, KVMDevice
) kvm_devices_head
;
229 static void kvm_arm_devlistener_add(MemoryListener
*listener
,
230 MemoryRegionSection
*section
)
234 QSLIST_FOREACH(kd
, &kvm_devices_head
, entries
) {
235 if (section
->mr
== kd
->mr
) {
236 kd
->kda
.addr
= section
->offset_within_address_space
;
241 static void kvm_arm_devlistener_del(MemoryListener
*listener
,
242 MemoryRegionSection
*section
)
246 QSLIST_FOREACH(kd
, &kvm_devices_head
, entries
) {
247 if (section
->mr
== kd
->mr
) {
253 static MemoryListener devlistener
= {
254 .region_add
= kvm_arm_devlistener_add
,
255 .region_del
= kvm_arm_devlistener_del
,
258 static void kvm_arm_set_device_addr(KVMDevice
*kd
)
260 struct kvm_device_attr
*attr
= &kd
->kdattr
;
263 /* If the device control API is available and we have a device fd on the
264 * KVMDevice struct, let's use the newer API
266 if (kd
->dev_fd
>= 0) {
267 uint64_t addr
= kd
->kda
.addr
;
269 addr
|= kd
->kda_addr_ormask
;
270 attr
->addr
= (uintptr_t)&addr
;
271 ret
= kvm_device_ioctl(kd
->dev_fd
, KVM_SET_DEVICE_ATTR
, attr
);
273 ret
= kvm_vm_ioctl(kvm_state
, KVM_ARM_SET_DEVICE_ADDR
, &kd
->kda
);
277 fprintf(stderr
, "Failed to set device address: %s\n",
283 static void kvm_arm_machine_init_done(Notifier
*notifier
, void *data
)
287 QSLIST_FOREACH_SAFE(kd
, &kvm_devices_head
, entries
, tkd
) {
288 if (kd
->kda
.addr
!= -1) {
289 kvm_arm_set_device_addr(kd
);
291 memory_region_unref(kd
->mr
);
292 QSLIST_REMOVE_HEAD(&kvm_devices_head
, entries
);
295 memory_listener_unregister(&devlistener
);
298 static Notifier notify
= {
299 .notify
= kvm_arm_machine_init_done
,
302 void kvm_arm_register_device(MemoryRegion
*mr
, uint64_t devid
, uint64_t group
,
303 uint64_t attr
, int dev_fd
, uint64_t addr_ormask
)
307 if (!kvm_irqchip_in_kernel()) {
311 if (QSLIST_EMPTY(&kvm_devices_head
)) {
312 memory_listener_register(&devlistener
, &address_space_memory
);
313 qemu_add_machine_init_done_notifier(¬ify
);
315 kd
= g_new0(KVMDevice
, 1);
319 kd
->kdattr
.flags
= 0;
320 kd
->kdattr
.group
= group
;
321 kd
->kdattr
.attr
= attr
;
323 kd
->kda_addr_ormask
= addr_ormask
;
324 QSLIST_INSERT_HEAD(&kvm_devices_head
, kd
, entries
);
325 memory_region_ref(kd
->mr
);
328 static int compare_u64(const void *a
, const void *b
)
330 if (*(uint64_t *)a
> *(uint64_t *)b
) {
333 if (*(uint64_t *)a
< *(uint64_t *)b
) {
339 /* Initialize the ARMCPU cpreg list according to the kernel's
340 * definition of what CPU registers it knows about (and throw away
341 * the previous TCG-created cpreg list).
343 int kvm_arm_init_cpreg_list(ARMCPU
*cpu
)
345 struct kvm_reg_list rl
;
346 struct kvm_reg_list
*rlp
;
347 int i
, ret
, arraylen
;
348 CPUState
*cs
= CPU(cpu
);
351 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_REG_LIST
, &rl
);
355 rlp
= g_malloc(sizeof(struct kvm_reg_list
) + rl
.n
* sizeof(uint64_t));
357 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_REG_LIST
, rlp
);
361 /* Sort the list we get back from the kernel, since cpreg_tuples
362 * must be in strictly ascending order.
364 qsort(&rlp
->reg
, rlp
->n
, sizeof(rlp
->reg
[0]), compare_u64
);
366 for (i
= 0, arraylen
= 0; i
< rlp
->n
; i
++) {
367 if (!kvm_arm_reg_syncs_via_cpreg_list(rlp
->reg
[i
])) {
370 switch (rlp
->reg
[i
] & KVM_REG_SIZE_MASK
) {
371 case KVM_REG_SIZE_U32
:
372 case KVM_REG_SIZE_U64
:
375 fprintf(stderr
, "Can't handle size of register in kernel list\n");
383 cpu
->cpreg_indexes
= g_renew(uint64_t, cpu
->cpreg_indexes
, arraylen
);
384 cpu
->cpreg_values
= g_renew(uint64_t, cpu
->cpreg_values
, arraylen
);
385 cpu
->cpreg_vmstate_indexes
= g_renew(uint64_t, cpu
->cpreg_vmstate_indexes
,
387 cpu
->cpreg_vmstate_values
= g_renew(uint64_t, cpu
->cpreg_vmstate_values
,
389 cpu
->cpreg_array_len
= arraylen
;
390 cpu
->cpreg_vmstate_array_len
= arraylen
;
392 for (i
= 0, arraylen
= 0; i
< rlp
->n
; i
++) {
393 uint64_t regidx
= rlp
->reg
[i
];
394 if (!kvm_arm_reg_syncs_via_cpreg_list(regidx
)) {
397 cpu
->cpreg_indexes
[arraylen
] = regidx
;
400 assert(cpu
->cpreg_array_len
== arraylen
);
402 if (!write_kvmstate_to_list(cpu
)) {
403 /* Shouldn't happen unless kernel is inconsistent about
404 * what registers exist.
406 fprintf(stderr
, "Initial read of kernel register state failed\n");
416 bool write_kvmstate_to_list(ARMCPU
*cpu
)
418 CPUState
*cs
= CPU(cpu
);
422 for (i
= 0; i
< cpu
->cpreg_array_len
; i
++) {
423 struct kvm_one_reg r
;
424 uint64_t regidx
= cpu
->cpreg_indexes
[i
];
430 switch (regidx
& KVM_REG_SIZE_MASK
) {
431 case KVM_REG_SIZE_U32
:
432 r
.addr
= (uintptr_t)&v32
;
433 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, &r
);
435 cpu
->cpreg_values
[i
] = v32
;
438 case KVM_REG_SIZE_U64
:
439 r
.addr
= (uintptr_t)(cpu
->cpreg_values
+ i
);
440 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, &r
);
452 bool write_list_to_kvmstate(ARMCPU
*cpu
, int level
)
454 CPUState
*cs
= CPU(cpu
);
458 for (i
= 0; i
< cpu
->cpreg_array_len
; i
++) {
459 struct kvm_one_reg r
;
460 uint64_t regidx
= cpu
->cpreg_indexes
[i
];
464 if (kvm_arm_cpreg_level(regidx
) > level
) {
469 switch (regidx
& KVM_REG_SIZE_MASK
) {
470 case KVM_REG_SIZE_U32
:
471 v32
= cpu
->cpreg_values
[i
];
472 r
.addr
= (uintptr_t)&v32
;
474 case KVM_REG_SIZE_U64
:
475 r
.addr
= (uintptr_t)(cpu
->cpreg_values
+ i
);
480 ret
= kvm_vcpu_ioctl(cs
, KVM_SET_ONE_REG
, &r
);
482 /* We might fail for "unknown register" and also for
483 * "you tried to set a register which is constant with
484 * a different value from what it actually contains".
492 void kvm_arm_reset_vcpu(ARMCPU
*cpu
)
496 /* Re-init VCPU so that all registers are set to
497 * their respective reset values.
499 ret
= kvm_arm_vcpu_init(CPU(cpu
));
501 fprintf(stderr
, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret
));
504 if (!write_kvmstate_to_list(cpu
)) {
505 fprintf(stderr
, "write_kvmstate_to_list failed\n");
509 * Sync the reset values also into the CPUState. This is necessary
510 * because the next thing we do will be a kvm_arch_put_registers()
511 * which will update the list values from the CPUState before copying
512 * the list values back to KVM. It's OK to ignore failure returns here
513 * for the same reason we do so in kvm_arch_get_registers().
515 write_list_to_cpustate(cpu
);
519 * Update KVM's MP_STATE based on what QEMU thinks it is
521 int kvm_arm_sync_mpstate_to_kvm(ARMCPU
*cpu
)
523 if (cap_has_mp_state
) {
524 struct kvm_mp_state mp_state
= {
525 .mp_state
= (cpu
->power_state
== PSCI_OFF
) ?
526 KVM_MP_STATE_STOPPED
: KVM_MP_STATE_RUNNABLE
528 int ret
= kvm_vcpu_ioctl(CPU(cpu
), KVM_SET_MP_STATE
, &mp_state
);
530 fprintf(stderr
, "%s: failed to set MP_STATE %d/%s\n",
531 __func__
, ret
, strerror(-ret
));
540 * Sync the KVM MP_STATE into QEMU
542 int kvm_arm_sync_mpstate_to_qemu(ARMCPU
*cpu
)
544 if (cap_has_mp_state
) {
545 struct kvm_mp_state mp_state
;
546 int ret
= kvm_vcpu_ioctl(CPU(cpu
), KVM_GET_MP_STATE
, &mp_state
);
548 fprintf(stderr
, "%s: failed to get MP_STATE %d/%s\n",
549 __func__
, ret
, strerror(-ret
));
552 cpu
->power_state
= (mp_state
.mp_state
== KVM_MP_STATE_STOPPED
) ?
559 int kvm_put_vcpu_events(ARMCPU
*cpu
)
561 CPUARMState
*env
= &cpu
->env
;
562 struct kvm_vcpu_events events
;
565 if (!kvm_has_vcpu_events()) {
569 memset(&events
, 0, sizeof(events
));
570 events
.exception
.serror_pending
= env
->serror
.pending
;
572 /* Inject SError to guest with specified syndrome if host kernel
573 * supports it, otherwise inject SError without syndrome.
575 if (cap_has_inject_serror_esr
) {
576 events
.exception
.serror_has_esr
= env
->serror
.has_esr
;
577 events
.exception
.serror_esr
= env
->serror
.esr
;
580 ret
= kvm_vcpu_ioctl(CPU(cpu
), KVM_SET_VCPU_EVENTS
, &events
);
582 error_report("failed to put vcpu events");
588 int kvm_get_vcpu_events(ARMCPU
*cpu
)
590 CPUARMState
*env
= &cpu
->env
;
591 struct kvm_vcpu_events events
;
594 if (!kvm_has_vcpu_events()) {
598 memset(&events
, 0, sizeof(events
));
599 ret
= kvm_vcpu_ioctl(CPU(cpu
), KVM_GET_VCPU_EVENTS
, &events
);
601 error_report("failed to get vcpu events");
605 env
->serror
.pending
= events
.exception
.serror_pending
;
606 env
->serror
.has_esr
= events
.exception
.serror_has_esr
;
607 env
->serror
.esr
= events
.exception
.serror_esr
;
612 void kvm_arch_pre_run(CPUState
*cs
, struct kvm_run
*run
)
616 MemTxAttrs
kvm_arch_post_run(CPUState
*cs
, struct kvm_run
*run
)
619 uint32_t switched_level
;
621 if (kvm_irqchip_in_kernel()) {
623 * We only need to sync timer states with user-space interrupt
624 * controllers, so return early and save cycles if we don't.
626 return MEMTXATTRS_UNSPECIFIED
;
631 /* Synchronize our shadowed in-kernel device irq lines with the kvm ones */
632 if (run
->s
.regs
.device_irq_level
!= cpu
->device_irq_level
) {
633 switched_level
= cpu
->device_irq_level
^ run
->s
.regs
.device_irq_level
;
635 qemu_mutex_lock_iothread();
637 if (switched_level
& KVM_ARM_DEV_EL1_VTIMER
) {
638 qemu_set_irq(cpu
->gt_timer_outputs
[GTIMER_VIRT
],
639 !!(run
->s
.regs
.device_irq_level
&
640 KVM_ARM_DEV_EL1_VTIMER
));
641 switched_level
&= ~KVM_ARM_DEV_EL1_VTIMER
;
644 if (switched_level
& KVM_ARM_DEV_EL1_PTIMER
) {
645 qemu_set_irq(cpu
->gt_timer_outputs
[GTIMER_PHYS
],
646 !!(run
->s
.regs
.device_irq_level
&
647 KVM_ARM_DEV_EL1_PTIMER
));
648 switched_level
&= ~KVM_ARM_DEV_EL1_PTIMER
;
651 if (switched_level
& KVM_ARM_DEV_PMU
) {
652 qemu_set_irq(cpu
->pmu_interrupt
,
653 !!(run
->s
.regs
.device_irq_level
& KVM_ARM_DEV_PMU
));
654 switched_level
&= ~KVM_ARM_DEV_PMU
;
657 if (switched_level
) {
658 qemu_log_mask(LOG_UNIMP
, "%s: unhandled in-kernel device IRQ %x\n",
659 __func__
, switched_level
);
662 /* We also mark unknown levels as processed to not waste cycles */
663 cpu
->device_irq_level
= run
->s
.regs
.device_irq_level
;
664 qemu_mutex_unlock_iothread();
667 return MEMTXATTRS_UNSPECIFIED
;
671 int kvm_arch_handle_exit(CPUState
*cs
, struct kvm_run
*run
)
675 switch (run
->exit_reason
) {
677 if (kvm_arm_handle_debug(cs
, &run
->debug
.arch
)) {
679 } /* otherwise return to guest */
682 qemu_log_mask(LOG_UNIMP
, "%s: un-handled exit reason %d\n",
683 __func__
, run
->exit_reason
);
689 bool kvm_arch_stop_on_emulation_error(CPUState
*cs
)
694 int kvm_arch_process_async_events(CPUState
*cs
)
699 /* The #ifdef protections are until 32bit headers are imported and can
700 * be removed once both 32 and 64 bit reach feature parity.
702 void kvm_arch_update_guest_debug(CPUState
*cs
, struct kvm_guest_debug
*dbg
)
704 #ifdef KVM_GUESTDBG_USE_SW_BP
705 if (kvm_sw_breakpoints_active(cs
)) {
706 dbg
->control
|= KVM_GUESTDBG_ENABLE
| KVM_GUESTDBG_USE_SW_BP
;
709 #ifdef KVM_GUESTDBG_USE_HW
710 if (kvm_arm_hw_debug_active(cs
)) {
711 dbg
->control
|= KVM_GUESTDBG_ENABLE
| KVM_GUESTDBG_USE_HW
;
712 kvm_arm_copy_hw_debug_data(&dbg
->arch
);
717 void kvm_arch_init_irq_routing(KVMState
*s
)
721 int kvm_arch_irqchip_create(MachineState
*ms
, KVMState
*s
)
723 if (machine_kernel_irqchip_split(ms
)) {
724 perror("-machine kernel_irqchip=split is not supported on ARM.");
728 /* If we can create the VGIC using the newer device control API, we
729 * let the device do this when it initializes itself, otherwise we
730 * fall back to the old API */
731 return kvm_check_extension(s
, KVM_CAP_DEVICE_CTRL
);
734 int kvm_arm_vgic_probe(void)
736 if (kvm_create_device(kvm_state
,
737 KVM_DEV_TYPE_ARM_VGIC_V3
, true) == 0) {
739 } else if (kvm_create_device(kvm_state
,
740 KVM_DEV_TYPE_ARM_VGIC_V2
, true) == 0) {
747 int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry
*route
,
748 uint64_t address
, uint32_t data
, PCIDevice
*dev
)
750 AddressSpace
*as
= pci_device_iommu_address_space(dev
);
751 hwaddr xlat
, len
, doorbell_gpa
;
752 MemoryRegionSection mrs
;
756 if (as
== &address_space_memory
) {
760 /* MSI doorbell address is translated by an IOMMU */
763 mr
= address_space_translate(as
, address
, &xlat
, &len
, true,
764 MEMTXATTRS_UNSPECIFIED
);
768 mrs
= memory_region_find(mr
, xlat
, 1);
773 doorbell_gpa
= mrs
.offset_within_address_space
;
774 memory_region_unref(mrs
.mr
);
776 route
->u
.msi
.address_lo
= doorbell_gpa
;
777 route
->u
.msi
.address_hi
= doorbell_gpa
>> 32;
779 trace_kvm_arm_fixup_msi_route(address
, doorbell_gpa
);
788 int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry
*route
,
789 int vector
, PCIDevice
*dev
)
794 int kvm_arch_release_virq_post(int virq
)
799 int kvm_arch_msi_data_to_gsi(uint32_t data
)
801 return (data
- 32) & 0xffff;