monitor/qmp: Update comment for commit 4eaca8de268
[qemu/armbru.git] / target / arm / kvm_arm.h
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1 /*
2 * QEMU KVM support -- ARM specific functions.
4 * Copyright (c) 2012 Linaro Limited
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
9 */
11 #ifndef QEMU_KVM_ARM_H
12 #define QEMU_KVM_ARM_H
14 #include "sysemu/kvm.h"
15 #include "exec/memory.h"
16 #include "qemu/error-report.h"
18 /**
19 * kvm_arm_vcpu_init:
20 * @cs: CPUState
22 * Initialize (or reinitialize) the VCPU by invoking the
23 * KVM_ARM_VCPU_INIT ioctl with the CPU type and feature
24 * bitmask specified in the CPUState.
26 * Returns: 0 if success else < 0 error code
28 int kvm_arm_vcpu_init(CPUState *cs);
30 /**
31 * kvm_arm_register_device:
32 * @mr: memory region for this device
33 * @devid: the KVM device ID
34 * @group: device control API group for setting addresses
35 * @attr: device control API address type
36 * @dev_fd: device control device file descriptor (or -1 if not supported)
37 * @addr_ormask: value to be OR'ed with resolved address
39 * Remember the memory region @mr, and when it is mapped by the
40 * machine model, tell the kernel that base address using the
41 * KVM_ARM_SET_DEVICE_ADDRESS ioctl or the newer device control API. @devid
42 * should be the ID of the device as defined by KVM_ARM_SET_DEVICE_ADDRESS or
43 * the arm-vgic device in the device control API.
44 * The machine model may map
45 * and unmap the device multiple times; the kernel will only be told the final
46 * address at the point where machine init is complete.
48 void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid, uint64_t group,
49 uint64_t attr, int dev_fd, uint64_t addr_ormask);
51 /**
52 * kvm_arm_init_cpreg_list:
53 * @cpu: ARMCPU
55 * Initialize the ARMCPU cpreg list according to the kernel's
56 * definition of what CPU registers it knows about (and throw away
57 * the previous TCG-created cpreg list).
59 * Returns: 0 if success, else < 0 error code
61 int kvm_arm_init_cpreg_list(ARMCPU *cpu);
63 /**
64 * kvm_arm_reg_syncs_via_cpreg_list
65 * regidx: KVM register index
67 * Return true if this KVM register should be synchronized via the
68 * cpreg list of arbitrary system registers, false if it is synchronized
69 * by hand using code in kvm_arch_get/put_registers().
71 bool kvm_arm_reg_syncs_via_cpreg_list(uint64_t regidx);
73 /**
74 * kvm_arm_cpreg_level
75 * regidx: KVM register index
77 * Return the level of this coprocessor/system register. Return value is
78 * either KVM_PUT_RUNTIME_STATE, KVM_PUT_RESET_STATE, or KVM_PUT_FULL_STATE.
80 int kvm_arm_cpreg_level(uint64_t regidx);
82 /**
83 * write_list_to_kvmstate:
84 * @cpu: ARMCPU
85 * @level: the state level to sync
87 * For each register listed in the ARMCPU cpreg_indexes list, write
88 * its value from the cpreg_values list into the kernel (via ioctl).
89 * This updates KVM's working data structures from TCG data or
90 * from incoming migration state.
92 * Returns: true if all register values were updated correctly,
93 * false if some register was unknown to the kernel or could not
94 * be written (eg constant register with the wrong value).
95 * Note that we do not stop early on failure -- we will attempt
96 * writing all registers in the list.
98 bool write_list_to_kvmstate(ARMCPU *cpu, int level);
101 * write_kvmstate_to_list:
102 * @cpu: ARMCPU
104 * For each register listed in the ARMCPU cpreg_indexes list, write
105 * its value from the kernel into the cpreg_values list. This is used to
106 * copy info from KVM's working data structures into TCG or
107 * for outbound migration.
109 * Returns: true if all register values were read correctly,
110 * false if some register was unknown or could not be read.
111 * Note that we do not stop early on failure -- we will attempt
112 * reading all registers in the list.
114 bool write_kvmstate_to_list(ARMCPU *cpu);
117 * kvm_arm_reset_vcpu:
118 * @cpu: ARMCPU
120 * Called at reset time to kernel registers to their initial values.
122 void kvm_arm_reset_vcpu(ARMCPU *cpu);
125 * kvm_arm_init_serror_injection:
126 * @cs: CPUState
128 * Check whether KVM can set guest SError syndrome.
130 void kvm_arm_init_serror_injection(CPUState *cs);
133 * kvm_get_vcpu_events:
134 * @cpu: ARMCPU
136 * Get VCPU related state from kvm.
138 int kvm_get_vcpu_events(ARMCPU *cpu);
141 * kvm_put_vcpu_events:
142 * @cpu: ARMCPU
144 * Put VCPU related state to kvm.
146 int kvm_put_vcpu_events(ARMCPU *cpu);
148 #ifdef CONFIG_KVM
150 * kvm_arm_create_scratch_host_vcpu:
151 * @cpus_to_try: array of QEMU_KVM_ARM_TARGET_* values (terminated with
152 * QEMU_KVM_ARM_TARGET_NONE) to try as fallback if the kernel does not
153 * know the PREFERRED_TARGET ioctl. Passing NULL is the same as passing
154 * an empty array.
155 * @fdarray: filled in with kvmfd, vmfd, cpufd file descriptors in that order
156 * @init: filled in with the necessary values for creating a host
157 * vcpu. If NULL is provided, will not init the vCPU (though the cpufd
158 * will still be set up).
160 * Create a scratch vcpu in its own VM of the type preferred by the host
161 * kernel (as would be used for '-cpu host'), for purposes of probing it
162 * for capabilities.
164 * Returns: true on success (and fdarray and init are filled in),
165 * false on failure (and fdarray and init are not valid).
167 bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try,
168 int *fdarray,
169 struct kvm_vcpu_init *init);
172 * kvm_arm_destroy_scratch_host_vcpu:
173 * @fdarray: array of fds as set up by kvm_arm_create_scratch_host_vcpu
175 * Tear down the scratch vcpu created by kvm_arm_create_scratch_host_vcpu.
177 void kvm_arm_destroy_scratch_host_vcpu(int *fdarray);
179 #define TYPE_ARM_HOST_CPU "host-" TYPE_ARM_CPU
182 * ARMHostCPUFeatures: information about the host CPU (identified
183 * by asking the host kernel)
185 typedef struct ARMHostCPUFeatures {
186 ARMISARegisters isar;
187 uint64_t features;
188 uint32_t target;
189 const char *dtb_compatible;
190 } ARMHostCPUFeatures;
193 * kvm_arm_get_host_cpu_features:
194 * @ahcc: ARMHostCPUClass to fill in
196 * Probe the capabilities of the host kernel's preferred CPU and fill
197 * in the ARMHostCPUClass struct accordingly.
199 bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf);
202 * kvm_arm_set_cpu_features_from_host:
203 * @cpu: ARMCPU to set the features for
205 * Set up the ARMCPU struct fields up to match the information probed
206 * from the host CPU.
208 void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu);
211 * kvm_arm_aarch32_supported:
212 * @cs: CPUState
214 * Returns: true if the KVM VCPU can enable AArch32 mode
215 * and false otherwise.
217 bool kvm_arm_aarch32_supported(CPUState *cs);
220 * bool kvm_arm_pmu_supported:
221 * @cs: CPUState
223 * Returns: true if the KVM VCPU can enable its PMU
224 * and false otherwise.
226 bool kvm_arm_pmu_supported(CPUState *cs);
229 * kvm_arm_get_max_vm_ipa_size - Returns the number of bits in the
230 * IPA address space supported by KVM
232 * @ms: Machine state handle
234 int kvm_arm_get_max_vm_ipa_size(MachineState *ms);
237 * kvm_arm_sync_mpstate_to_kvm
238 * @cpu: ARMCPU
240 * If supported set the KVM MP_STATE based on QEMU's model.
242 int kvm_arm_sync_mpstate_to_kvm(ARMCPU *cpu);
245 * kvm_arm_sync_mpstate_to_qemu
246 * @cpu: ARMCPU
248 * If supported get the MP_STATE from KVM and store in QEMU's model.
250 int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu);
252 int kvm_arm_vgic_probe(void);
254 void kvm_arm_pmu_set_irq(CPUState *cs, int irq);
255 void kvm_arm_pmu_init(CPUState *cs);
257 #else
259 static inline void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu)
261 /* This should never actually be called in the "not KVM" case,
262 * but set up the fields to indicate an error anyway.
264 cpu->kvm_target = QEMU_KVM_ARM_TARGET_NONE;
265 cpu->host_cpu_probe_failed = true;
268 static inline bool kvm_arm_aarch32_supported(CPUState *cs)
270 return false;
273 static inline bool kvm_arm_pmu_supported(CPUState *cs)
275 return false;
278 static inline int kvm_arm_get_max_vm_ipa_size(MachineState *ms)
280 return -ENOENT;
283 static inline int kvm_arm_vgic_probe(void)
285 return 0;
288 static inline void kvm_arm_pmu_set_irq(CPUState *cs, int irq) {}
289 static inline void kvm_arm_pmu_init(CPUState *cs) {}
291 #endif
293 static inline const char *gic_class_name(void)
295 return kvm_irqchip_in_kernel() ? "kvm-arm-gic" : "arm_gic";
299 * gicv3_class_name
301 * Return name of GICv3 class to use depending on whether KVM acceleration is
302 * in use. May throw an error if the chosen implementation is not available.
304 * Returns: class name to use
306 static inline const char *gicv3_class_name(void)
308 if (kvm_irqchip_in_kernel()) {
309 #ifdef TARGET_AARCH64
310 return "kvm-arm-gicv3";
311 #else
312 error_report("KVM GICv3 acceleration is not supported on this "
313 "platform");
314 exit(1);
315 #endif
316 } else {
317 if (kvm_enabled()) {
318 error_report("Userspace GICv3 is not supported with KVM");
319 exit(1);
321 return "arm-gicv3";
326 * kvm_arm_handle_debug:
327 * @cs: CPUState
328 * @debug_exit: debug part of the KVM exit structure
330 * Returns: TRUE if the debug exception was handled.
332 bool kvm_arm_handle_debug(CPUState *cs, struct kvm_debug_exit_arch *debug_exit);
335 * kvm_arm_hw_debug_active:
336 * @cs: CPU State
338 * Return: TRUE if any hardware breakpoints in use.
341 bool kvm_arm_hw_debug_active(CPUState *cs);
344 * kvm_arm_copy_hw_debug_data:
346 * @ptr: kvm_guest_debug_arch structure
348 * Copy the architecture specific debug registers into the
349 * kvm_guest_debug ioctl structure.
351 struct kvm_guest_debug_arch;
353 void kvm_arm_copy_hw_debug_data(struct kvm_guest_debug_arch *ptr);
356 * its_class_name
358 * Return the ITS class name to use depending on whether KVM acceleration
359 * and KVM CAP_SIGNAL_MSI are supported
361 * Returns: class name to use or NULL
363 static inline const char *its_class_name(void)
365 if (kvm_irqchip_in_kernel()) {
366 /* KVM implementation requires this capability */
367 return kvm_direct_msi_enabled() ? "arm-its-kvm" : NULL;
368 } else {
369 /* Software emulation is not implemented yet */
370 return NULL;
374 #endif