4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 #include "qemu/osdep.h"
27 #include "monitor/monitor.h"
28 #include "qemu/ctype.h"
29 #include "monitor/hmp-target.h"
30 #include "monitor/hmp.h"
32 static target_long
monitor_get_ccr(const struct MonitorDef
*md
, int val
)
34 CPUArchState
*env
= mon_get_cpu_env();
39 for (i
= 0; i
< 8; i
++) {
40 u
|= env
->crf
[i
] << (32 - (4 * (i
+ 1)));
46 static target_long
monitor_get_decr(const struct MonitorDef
*md
, int val
)
48 CPUArchState
*env
= mon_get_cpu_env();
49 return cpu_ppc_load_decr(env
);
52 static target_long
monitor_get_tbu(const struct MonitorDef
*md
, int val
)
54 CPUArchState
*env
= mon_get_cpu_env();
55 return cpu_ppc_load_tbu(env
);
58 static target_long
monitor_get_tbl(const struct MonitorDef
*md
, int val
)
60 CPUArchState
*env
= mon_get_cpu_env();
61 return cpu_ppc_load_tbl(env
);
64 void hmp_info_tlb(Monitor
*mon
, const QDict
*qdict
)
66 CPUArchState
*env1
= mon_get_cpu_env();
69 monitor_printf(mon
, "No CPU available\n");
75 const MonitorDef monitor_defs
[] = {
76 { "fpscr", offsetof(CPUPPCState
, fpscr
) },
77 /* Next instruction pointer */
78 { "nip|pc", offsetof(CPUPPCState
, nip
) },
79 { "lr", offsetof(CPUPPCState
, lr
) },
80 { "ctr", offsetof(CPUPPCState
, ctr
) },
81 { "decr", 0, &monitor_get_decr
, },
82 { "ccr|cr", 0, &monitor_get_ccr
, },
83 /* Machine state register */
84 { "xer", offsetof(CPUPPCState
, xer
) },
85 { "msr", offsetof(CPUPPCState
, msr
) },
86 { "tbu", 0, &monitor_get_tbu
, },
87 { "tbl", 0, &monitor_get_tbl
, },
91 const MonitorDef
*target_monitor_defs(void)
96 static int ppc_cpu_get_reg_num(const char *numstr
, int maxnum
, int *pregnum
)
105 regnum
= strtoul(numstr
, &endptr
, 10);
106 if (*endptr
|| (regnum
>= maxnum
)) {
114 int target_get_monitor_def(CPUState
*cs
, const char *name
, uint64_t *pval
)
117 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
118 CPUPPCState
*env
= &cpu
->env
;
120 /* General purpose registers */
121 if ((qemu_tolower(name
[0]) == 'r') &&
122 ppc_cpu_get_reg_num(name
+ 1, ARRAY_SIZE(env
->gpr
), ®num
)) {
123 *pval
= env
->gpr
[regnum
];
127 /* Floating point registers */
128 if ((qemu_tolower(name
[0]) == 'f') &&
129 ppc_cpu_get_reg_num(name
+ 1, 32, ®num
)) {
130 *pval
= *cpu_fpr_ptr(env
, regnum
);
134 /* Special purpose registers */
135 for (i
= 0; i
< ARRAY_SIZE(env
->spr_cb
); ++i
) {
136 ppc_spr_t
*spr
= &env
->spr_cb
[i
];
138 if (spr
->name
&& (strcasecmp(name
, spr
->name
) == 0)) {
144 /* Segment registers */
145 #if !defined(CONFIG_USER_ONLY)
146 if ((strncasecmp(name
, "sr", 2) == 0) &&
147 ppc_cpu_get_reg_num(name
+ 2, ARRAY_SIZE(env
->sr
), ®num
)) {
148 *pval
= env
->sr
[regnum
];