target/s390x/helper.c

   1 /*
   2  *  S/390 helpers
   3  *
   4  *  Copyright (c) 2009 Ulrich Hecht
   5  *  Copyright (c) 2011 Alexander Graf
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include "qemu/osdep.h"
  22 #include "qapi/error.h"
  23 #include "cpu.h"
  24 #include "internal.h"
  25 #include "exec/gdbstub.h"
  26 #include "qemu/timer.h"
  27 #include "exec/exec-all.h"
  28 #include "hw/s390x/ioinst.h"
  29 #ifndef CONFIG_USER_ONLY
  30 #include "sysemu/sysemu.h"
  31 #endif
  32
  33 //#define DEBUG_S390
  34 //#define DEBUG_S390_STDOUT
  35
  36 #ifdef DEBUG_S390
  37 #ifdef DEBUG_S390_STDOUT
  38 #define DPRINTF(fmt, ...) \
  39     do { fprintf(stderr, fmt, ## __VA_ARGS__); \
  40          if (qemu_log_separate()) qemu_log(fmt, ##__VA_ARGS__); } while (0)
  41 #else
  42 #define DPRINTF(fmt, ...) \
  43     do { qemu_log(fmt, ## __VA_ARGS__); } while (0)
  44 #endif
  45 #else
  46 #define DPRINTF(fmt, ...) \
  47     do { } while (0)
  48 #endif
  49
  50
  51 #ifndef CONFIG_USER_ONLY
  52 void s390x_tod_timer(void *opaque)
  53 {
  54     S390CPU *cpu = opaque;
  55     CPUS390XState *env = &cpu->env;
  56
  57     env->pending_int |= INTERRUPT_TOD;
  58     cpu_interrupt(CPU(cpu), CPU_INTERRUPT_HARD);
  59 }
  60
  61 void s390x_cpu_timer(void *opaque)
  62 {
  63     S390CPU *cpu = opaque;
  64     CPUS390XState *env = &cpu->env;
  65
  66     env->pending_int |= INTERRUPT_CPUTIMER;
  67     cpu_interrupt(CPU(cpu), CPU_INTERRUPT_HARD);
  68 }
  69 #endif
  70
  71 S390CPU *cpu_s390x_create(const char *cpu_model, Error **errp)
  72 {
  73     static bool features_parsed;
  74     char *name, *features;
  75     const char *typename;
  76     ObjectClass *oc;
  77     CPUClass *cc;
  78
  79     name = g_strdup(cpu_model);
  80     features = strchr(name, ',');
  81     if (features) {
  82         features[0] = 0;
  83         features++;
  84     }
  85
  86     oc = cpu_class_by_name(TYPE_S390_CPU, name);
  87     if (!oc) {
  88         error_setg(errp, "Unknown CPU definition \'%s\'", name);
  89         g_free(name);
  90         return NULL;
  91     }
  92     typename = object_class_get_name(oc);
  93
  94     if (!features_parsed) {
  95         features_parsed = true;
  96         cc = CPU_CLASS(oc);
  97         cc->parse_features(typename, features, errp);
  98     }
  99     g_free(name);
 100
 101     if (*errp) {
 102         return NULL;
 103     }
 104     return S390_CPU(CPU(object_new(typename)));
 105 }
 106
 107 S390CPU *s390x_new_cpu(const char *cpu_model, int64_t id, Error **errp)
 108 {
 109     S390CPU *cpu;
 110     Error *err = NULL;
 111
 112     cpu = cpu_s390x_create(cpu_model, &err);
 113     if (err != NULL) {
 114         goto out;
 115     }
 116
 117     object_property_set_int(OBJECT(cpu), id, "id", &err);
 118     if (err != NULL) {
 119         goto out;
 120     }
 121     object_property_set_bool(OBJECT(cpu), true, "realized", &err);
 122
 123 out:
 124     if (err) {
 125         error_propagate(errp, err);
 126         object_unref(OBJECT(cpu));
 127         cpu = NULL;
 128     }
 129     return cpu;
 130 }
 131
 132 S390CPU *cpu_s390x_init(const char *cpu_model)
 133 {
 134     Error *err = NULL;
 135     S390CPU *cpu;
 136     /* Use to track CPU ID for linux-user only */
 137     static int64_t next_cpu_id;
 138
 139     cpu = s390x_new_cpu(cpu_model, next_cpu_id++, &err);
 140     if (err) {
 141         error_report_err(err);
 142     }
 143     return cpu;
 144 }
 145
 146 #ifndef CONFIG_USER_ONLY
 147
 148 hwaddr s390_cpu_get_phys_page_debug(CPUState *cs, vaddr vaddr)
 149 {
 150     S390CPU *cpu = S390_CPU(cs);
 151     CPUS390XState *env = &cpu->env;
 152     target_ulong raddr;
 153     int prot;
 154     uint64_t asc = env->psw.mask & PSW_MASK_ASC;
 155
 156     /* 31-Bit mode */
 157     if (!(env->psw.mask & PSW_MASK_64)) {
 158         vaddr &= 0x7fffffff;
 159     }
 160
 161     if (mmu_translate(env, vaddr, MMU_INST_FETCH, asc, &raddr, &prot, false)) {
 162         return -1;
 163     }
 164     return raddr;
 165 }
 166
 167 hwaddr s390_cpu_get_phys_addr_debug(CPUState *cs, vaddr vaddr)
 168 {
 169     hwaddr phys_addr;
 170     target_ulong page;
 171
 172     page = vaddr & TARGET_PAGE_MASK;
 173     phys_addr = cpu_get_phys_page_debug(cs, page);
 174     phys_addr += (vaddr & ~TARGET_PAGE_MASK);
 175
 176     return phys_addr;
 177 }
 178
 179 void load_psw(CPUS390XState *env, uint64_t mask, uint64_t addr)
 180 {
 181     uint64_t old_mask = env->psw.mask;
 182
 183     env->psw.addr = addr;
 184     env->psw.mask = mask;
 185     if (tcg_enabled()) {
 186         env->cc_op = (mask >> 44) & 3;
 187     }
 188
 189     if ((old_mask ^ mask) & PSW_MASK_PER) {
 190         s390_cpu_recompute_watchpoints(CPU(s390_env_get_cpu(env)));
 191     }
 192
 193     if (mask & PSW_MASK_WAIT) {
 194         S390CPU *cpu = s390_env_get_cpu(env);
 195         if (s390_cpu_halt(cpu) == 0) {
 196 #ifndef CONFIG_USER_ONLY
 197             qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
 198 #endif
 199         }
 200     }
 201 }
 202
 203 uint64_t get_psw_mask(CPUS390XState *env)
 204 {
 205     uint64_t r = env->psw.mask;
 206
 207     if (tcg_enabled()) {
 208         env->cc_op = calc_cc(env, env->cc_op, env->cc_src, env->cc_dst,
 209                              env->cc_vr);
 210
 211         r &= ~PSW_MASK_CC;
 212         assert(!(env->cc_op & ~3));
 213         r |= (uint64_t)env->cc_op << 44;
 214     }
 215
 216     return r;
 217 }
 218
 219 LowCore *cpu_map_lowcore(CPUS390XState *env)
 220 {
 221     S390CPU *cpu = s390_env_get_cpu(env);
 222     LowCore *lowcore;
 223     hwaddr len = sizeof(LowCore);
 224
 225     lowcore = cpu_physical_memory_map(env->psa, &len, 1);
 226
 227     if (len < sizeof(LowCore)) {
 228         cpu_abort(CPU(cpu), "Could not map lowcore\n");
 229     }
 230
 231     return lowcore;
 232 }
 233
 234 void cpu_unmap_lowcore(LowCore *lowcore)
 235 {
 236     cpu_physical_memory_unmap(lowcore, sizeof(LowCore), 1, sizeof(LowCore));
 237 }
 238
 239 void do_restart_interrupt(CPUS390XState *env)
 240 {
 241     uint64_t mask, addr;
 242     LowCore *lowcore;
 243
 244     lowcore = cpu_map_lowcore(env);
 245
 246     lowcore->restart_old_psw.mask = cpu_to_be64(get_psw_mask(env));
 247     lowcore->restart_old_psw.addr = cpu_to_be64(env->psw.addr);
 248     mask = be64_to_cpu(lowcore->restart_new_psw.mask);
 249     addr = be64_to_cpu(lowcore->restart_new_psw.addr);
 250
 251     cpu_unmap_lowcore(lowcore);
 252
 253     load_psw(env, mask, addr);
 254 }
 255
 256 void s390_cpu_recompute_watchpoints(CPUState *cs)
 257 {
 258     const int wp_flags = BP_CPU | BP_MEM_WRITE | BP_STOP_BEFORE_ACCESS;
 259     S390CPU *cpu = S390_CPU(cs);
 260     CPUS390XState *env = &cpu->env;
 261
 262     /* We are called when the watchpoints have changed. First
 263        remove them all.  */
 264     cpu_watchpoint_remove_all(cs, BP_CPU);
 265
 266     /* Return if PER is not enabled */
 267     if (!(env->psw.mask & PSW_MASK_PER)) {
 268         return;
 269     }
 270
 271     /* Return if storage-alteration event is not enabled.  */
 272     if (!(env->cregs[9] & PER_CR9_EVENT_STORE)) {
 273         return;
 274     }
 275
 276     if (env->cregs[10] == 0 && env->cregs[11] == -1LL) {
 277         /* We can't create a watchoint spanning the whole memory range, so
 278            split it in two parts.   */
 279         cpu_watchpoint_insert(cs, 0, 1ULL << 63, wp_flags, NULL);
 280         cpu_watchpoint_insert(cs, 1ULL << 63, 1ULL << 63, wp_flags, NULL);
 281     } else if (env->cregs[10] > env->cregs[11]) {
 282         /* The address range loops, create two watchpoints.  */
 283         cpu_watchpoint_insert(cs, env->cregs[10], -env->cregs[10],
 284                               wp_flags, NULL);
 285         cpu_watchpoint_insert(cs, 0, env->cregs[11] + 1, wp_flags, NULL);
 286
 287     } else {
 288         /* Default case, create a single watchpoint.  */
 289         cpu_watchpoint_insert(cs, env->cregs[10],
 290                               env->cregs[11] - env->cregs[10] + 1,
 291                               wp_flags, NULL);
 292     }
 293 }
 294
 295 #endif /* CONFIG_USER_ONLY */
 296
 297 void s390_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
 298                          int flags)
 299 {
 300     S390CPU *cpu = S390_CPU(cs);
 301     CPUS390XState *env = &cpu->env;
 302     int i;
 303
 304     if (env->cc_op > 3) {
 305         cpu_fprintf(f, "PSW=mask %016" PRIx64 " addr %016" PRIx64 " cc %15s\n",
 306                     env->psw.mask, env->psw.addr, cc_name(env->cc_op));
 307     } else {
 308         cpu_fprintf(f, "PSW=mask %016" PRIx64 " addr %016" PRIx64 " cc %02x\n",
 309                     env->psw.mask, env->psw.addr, env->cc_op);
 310     }
 311
 312     for (i = 0; i < 16; i++) {
 313         cpu_fprintf(f, "R%02d=%016" PRIx64, i, env->regs[i]);
 314         if ((i % 4) == 3) {
 315             cpu_fprintf(f, "\n");
 316         } else {
 317             cpu_fprintf(f, " ");
 318         }
 319     }
 320
 321     for (i = 0; i < 16; i++) {
 322         cpu_fprintf(f, "F%02d=%016" PRIx64, i, get_freg(env, i)->ll);
 323         if ((i % 4) == 3) {
 324             cpu_fprintf(f, "\n");
 325         } else {
 326             cpu_fprintf(f, " ");
 327         }
 328     }
 329
 330     for (i = 0; i < 32; i++) {
 331         cpu_fprintf(f, "V%02d=%016" PRIx64 "%016" PRIx64, i,
 332                     env->vregs[i][0].ll, env->vregs[i][1].ll);
 333         cpu_fprintf(f, (i % 2) ? "\n" : " ");
 334     }
 335
 336 #ifndef CONFIG_USER_ONLY
 337     for (i = 0; i < 16; i++) {
 338         cpu_fprintf(f, "C%02d=%016" PRIx64, i, env->cregs[i]);
 339         if ((i % 4) == 3) {
 340             cpu_fprintf(f, "\n");
 341         } else {
 342             cpu_fprintf(f, " ");
 343         }
 344     }
 345 #endif
 346
 347 #ifdef DEBUG_INLINE_BRANCHES
 348     for (i = 0; i < CC_OP_MAX; i++) {
 349         cpu_fprintf(f, "  %15s = %10ld\t%10ld\n", cc_name(i),
 350                     inline_branch_miss[i], inline_branch_hit[i]);
 351     }
 352 #endif
 353
 354     cpu_fprintf(f, "\n");
 355 }
 356
 357 const char *cc_name(enum cc_op cc_op)
 358 {
 359     static const char * const cc_names[] = {
 360         [CC_OP_CONST0]    = "CC_OP_CONST0",
 361         [CC_OP_CONST1]    = "CC_OP_CONST1",
 362         [CC_OP_CONST2]    = "CC_OP_CONST2",
 363         [CC_OP_CONST3]    = "CC_OP_CONST3",
 364         [CC_OP_DYNAMIC]   = "CC_OP_DYNAMIC",
 365         [CC_OP_STATIC]    = "CC_OP_STATIC",
 366         [CC_OP_NZ]        = "CC_OP_NZ",
 367         [CC_OP_LTGT_32]   = "CC_OP_LTGT_32",
 368         [CC_OP_LTGT_64]   = "CC_OP_LTGT_64",
 369         [CC_OP_LTUGTU_32] = "CC_OP_LTUGTU_32",
 370         [CC_OP_LTUGTU_64] = "CC_OP_LTUGTU_64",
 371         [CC_OP_LTGT0_32]  = "CC_OP_LTGT0_32",
 372         [CC_OP_LTGT0_64]  = "CC_OP_LTGT0_64",
 373         [CC_OP_ADD_64]    = "CC_OP_ADD_64",
 374         [CC_OP_ADDU_64]   = "CC_OP_ADDU_64",
 375         [CC_OP_ADDC_64]   = "CC_OP_ADDC_64",
 376         [CC_OP_SUB_64]    = "CC_OP_SUB_64",
 377         [CC_OP_SUBU_64]   = "CC_OP_SUBU_64",
 378         [CC_OP_SUBB_64]   = "CC_OP_SUBB_64",
 379         [CC_OP_ABS_64]    = "CC_OP_ABS_64",
 380         [CC_OP_NABS_64]   = "CC_OP_NABS_64",
 381         [CC_OP_ADD_32]    = "CC_OP_ADD_32",
 382         [CC_OP_ADDU_32]   = "CC_OP_ADDU_32",
 383         [CC_OP_ADDC_32]   = "CC_OP_ADDC_32",
 384         [CC_OP_SUB_32]    = "CC_OP_SUB_32",
 385         [CC_OP_SUBU_32]   = "CC_OP_SUBU_32",
 386         [CC_OP_SUBB_32]   = "CC_OP_SUBB_32",
 387         [CC_OP_ABS_32]    = "CC_OP_ABS_32",
 388         [CC_OP_NABS_32]   = "CC_OP_NABS_32",
 389         [CC_OP_COMP_32]   = "CC_OP_COMP_32",
 390         [CC_OP_COMP_64]   = "CC_OP_COMP_64",
 391         [CC_OP_TM_32]     = "CC_OP_TM_32",
 392         [CC_OP_TM_64]     = "CC_OP_TM_64",
 393         [CC_OP_NZ_F32]    = "CC_OP_NZ_F32",
 394         [CC_OP_NZ_F64]    = "CC_OP_NZ_F64",
 395         [CC_OP_NZ_F128]   = "CC_OP_NZ_F128",
 396         [CC_OP_ICM]       = "CC_OP_ICM",
 397         [CC_OP_SLA_32]    = "CC_OP_SLA_32",
 398         [CC_OP_SLA_64]    = "CC_OP_SLA_64",
 399         [CC_OP_FLOGR]     = "CC_OP_FLOGR",
 400     };
 401
 402     return cc_names[cc_op];
 403 }