Sparc32: dummy implementation of MXCC MMU breakpoint registers
[qemu/mdroth.git] / target-arm / exec.h
blobdb6608ec8b2f8d7722159f77338ade0c3ce7920d
1 /*
2 * ARM execution defines
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include "config.h"
20 #include "dyngen-exec.h"
22 register struct CPUARMState *env asm(AREG0);
24 #include "cpu.h"
25 #include "exec-all.h"
27 static inline int cpu_has_work(CPUState *env)
29 return (env->interrupt_request &
30 (CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB));
33 #if !defined(CONFIG_USER_ONLY)
34 #include "softmmu_exec.h"
35 #endif
37 void raise_exception(int);
39 static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
41 env->regs[15] = tb->pc;