Merge branch 'master' of git://git.qemu.org/qemu
[qemu/mdroth.git] / linux-user / arm / nwfpe / fpopcode.c
blob82ac92f0ceaedadf190a7367c0e4fd92c11b0d44
1 /*
2 NetWinder Floating Point Emulator
3 (c) Rebel.COM, 1998,1999
5 Direct questions, comments to Scott Bambrough <scottb@netwinder.org>
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, see <http://www.gnu.org/licenses/>.
21 #include "fpa11.h"
22 #include "softfloat.h"
23 #include "fpopcode.h"
24 #include "fpsr.h"
25 //#include "fpmodule.h"
26 //#include "fpmodule.inl"
28 const floatx80 floatx80Constant[] = {
29 { 0x0000000000000000ULL, 0x0000}, /* extended 0.0 */
30 { 0x8000000000000000ULL, 0x3fff}, /* extended 1.0 */
31 { 0x8000000000000000ULL, 0x4000}, /* extended 2.0 */
32 { 0xc000000000000000ULL, 0x4000}, /* extended 3.0 */
33 { 0x8000000000000000ULL, 0x4001}, /* extended 4.0 */
34 { 0xa000000000000000ULL, 0x4001}, /* extended 5.0 */
35 { 0x8000000000000000ULL, 0x3ffe}, /* extended 0.5 */
36 { 0xa000000000000000ULL, 0x4002} /* extended 10.0 */
39 const float64 float64Constant[] = {
40 const_float64(0x0000000000000000ULL), /* double 0.0 */
41 const_float64(0x3ff0000000000000ULL), /* double 1.0 */
42 const_float64(0x4000000000000000ULL), /* double 2.0 */
43 const_float64(0x4008000000000000ULL), /* double 3.0 */
44 const_float64(0x4010000000000000ULL), /* double 4.0 */
45 const_float64(0x4014000000000000ULL), /* double 5.0 */
46 const_float64(0x3fe0000000000000ULL), /* double 0.5 */
47 const_float64(0x4024000000000000ULL) /* double 10.0 */
50 const float32 float32Constant[] = {
51 const_float32(0x00000000), /* single 0.0 */
52 const_float32(0x3f800000), /* single 1.0 */
53 const_float32(0x40000000), /* single 2.0 */
54 const_float32(0x40400000), /* single 3.0 */
55 const_float32(0x40800000), /* single 4.0 */
56 const_float32(0x40a00000), /* single 5.0 */
57 const_float32(0x3f000000), /* single 0.5 */
58 const_float32(0x41200000) /* single 10.0 */
61 unsigned int getRegisterCount(const unsigned int opcode)
63 unsigned int nRc;
65 switch (opcode & MASK_REGISTER_COUNT)
67 case 0x00000000: nRc = 4; break;
68 case 0x00008000: nRc = 1; break;
69 case 0x00400000: nRc = 2; break;
70 case 0x00408000: nRc = 3; break;
71 default: nRc = 0;
74 return(nRc);
77 unsigned int getDestinationSize(const unsigned int opcode)
79 unsigned int nRc;
81 switch (opcode & MASK_DESTINATION_SIZE)
83 case 0x00000000: nRc = typeSingle; break;
84 case 0x00000080: nRc = typeDouble; break;
85 case 0x00080000: nRc = typeExtended; break;
86 default: nRc = typeNone;
89 return(nRc);
92 /* condition code lookup table
93 index into the table is test code: EQ, NE, ... LT, GT, AL, NV
94 bit position in short is condition code: NZCV */
95 static const unsigned short aCC[16] = {
96 0xF0F0, // EQ == Z set
97 0x0F0F, // NE
98 0xCCCC, // CS == C set
99 0x3333, // CC
100 0xFF00, // MI == N set
101 0x00FF, // PL
102 0xAAAA, // VS == V set
103 0x5555, // VC
104 0x0C0C, // HI == C set && Z clear
105 0xF3F3, // LS == C clear || Z set
106 0xAA55, // GE == (N==V)
107 0x55AA, // LT == (N!=V)
108 0x0A05, // GT == (!Z && (N==V))
109 0xF5FA, // LE == (Z || (N!=V))
110 0xFFFF, // AL always
111 0 // NV