Implement fpu operations for RISC-V
commit1f32a9f236392bb28215227c3bc8b5112148bed2
authorZoltan Herczeg <hzmester@freemail.hu>
Sat, 7 May 2022 05:42:47 +0000 (7 05:42 +0000)
committerZoltan Herczeg <hzmester@freemail.hu>
Sun, 8 May 2022 18:13:05 +0000 (8 18:13 +0000)
treeca852d6ca8867580b63b8313c77f1208698c6b30
parentad99f17a9d581d0025c811a9bd27aba69b49a643
Implement fpu operations for RISC-V
sljit_src/sljitNativeMIPS_common.c
sljit_src/sljitNativeRISCV_common.c
test_src/sljitTest.c