arch/common/hidd.pci/pcidriverclass.c

   1 /*
   2     Copyright © 2004-2006, The AROS Development Team. All rights reserved.
   3     $Id$
   4
   5     Desc: Base PCI driver class
   6     Lang: English
   7
   8     I am not sure, whether this piece of code is already aware of endianess.
   9     Has to be checked soon ;)
  10 */
  11
  12 #include <exec/types.h>
  13 #include <hidd/hidd.h>
  14 #include <hidd/pci.h>
  15 #include <oop/oop.h>
  16
  17 #include <utility/tagitem.h>
  18
  19 #include <proto/exec.h>
  20 #include <proto/utility.h>
  21 #include <proto/oop.h>
  22
  23 #include <aros/symbolsets.h>
  24
  25 #include "pci.h"
  26
  27 #define DEBUG 1
  28 #include <aros/debug.h>
  29
  30 #ifdef HiddPCIDriverAttrBase
  31 #undef HiddPCIDriverAttrBase
  32 #endif // HiddPCIDriverAttrBase
  33
  34 #define HiddPCIDriverAttrBase   (PSD(cl)->hiddPCIDriverAB)
  35 #define HiddAttrBase (PSD(cl)->hiddAB)
  36
  37 typedef union _pcicfg
  38 {
  39     ULONG   ul;
  40     UWORD   uw[2];
  41     UBYTE   ub[4];
  42 } pcicfg;
  43
  44 OOP_Object *PCIDrv__Root__New(OOP_Class *cl, OOP_Object *o, struct pRoot_New *msg)
  45 {
  46     o = (OOP_Object *)OOP_DoSuperMethod(cl, o, (OOP_Msg)msg);
  47     struct DrvInstData *instance = (struct DrvInstData *)OOP_INST_DATA(cl, o);
  48
  49     instance->DirectBus = GetTagData(aHidd_PCIDriver_DirectBus, TRUE, msg->attrList);
  50
  51     return o;
  52 }
  53
  54 /*
  55     ULONG PCIDriver::ReadConfigLong(bus, dev, sub, reg)
  56
  57     This method is not implemented here (aka it should be the abstract class),
  58     and should be well defined in all PCI drivers.
  59 */
  60 ULONG PCIDrv__Hidd_PCIDriver__ReadConfigLong(OOP_Class *cl, OOP_Object *o,
  61     struct pHidd_PCIDriver_ReadConfigLong *msg)
  62 {
  63     /* Wheeeee! Someone has forgotten to reimplement the ReadConfigLong!! */
  64     bug("[PCIDriver] Alert! PCIDriver::ReadConfigLong() unimplemented!!!\n");
  65     return 0xffffffff;
  66 }
  67
  68 /*
  69     PCIDriver::WriteConfigLong(bus, dev, sub, reg, val)
  70
  71     This method is not implemented here (aka it should be the abstract class),
  72     and should be well defined in all PCI drivers.
  73 */
  74 void PCIDrv__Hidd_PCIDriver__WriteConfigLong(OOP_Class *cl, OOP_Object *o,
  75     struct pHidd_PCIDriver_WriteConfigLong *msg)
  76 {
  77     /* Wheeeee! Someone has forgotten to reimplement the WriteConfigLong!! */
  78     bug("[PCIDriver] Alert! PCIDriver::WriteConfigLong() unimplemented!!!\n");
  79 }
  80
  81
  82 /*
  83     Please note, that the following methods
  84
  85     UWORD PCIDriver::ReadConfigWord()
  86     UBYTE PCIDriver::ReadConfigByte()
  87     VOID  PCIDriver::WriteConfigWord()
  88     VOID  PCIDriver::WriteConfigByte()
  89
  90     *MAY* be implemented in driver class, but *DOESN'T HAVE TO*. I wrote small
  91     wrappers here using ReadConfigLong and WriteConfigLong in order to simplify
  92     developing of PCI drivers and reducing their size.
  93 */
  94
  95 UBYTE PCIDrv__Hidd_PCIDriver__ReadConfigByte(OOP_Class *cl, OOP_Object *o,
  96     struct pHidd_PCIDriver_ReadConfigByte *msg)
  97 {
  98     pcicfg temp;
  99     struct pHidd_PCIDriver_ReadConfigLong mymsg;
 100
 101     /*
 102         First, read whole ConfigWord from PCI config space, using defined
 103         method
 104     */
 105     mymsg.mID = PSD(cl)->mid_RL;
 106     mymsg.bus = msg->bus;
 107     mymsg.dev = msg->dev;
 108     mymsg.sub = msg->sub;
 109     mymsg.reg = msg->reg & ~3;
 110
 111     temp.ul = OOP_DoMethod(o, (OOP_Msg)&mymsg);
 112
 113     // Then, return only this part of the Long which is requested
 114     return temp.ub[msg->reg & 3];
 115 }
 116
 117 UWORD PCIDrv__Hidd_PCIDriver__ReadConfigWord(OOP_Class *cl, OOP_Object *o,
 118     struct pHidd_PCIDriver_ReadConfigWord *msg)
 119 {
 120     pcicfg temp;
 121     struct pHidd_PCIDriver_ReadConfigLong mymsg;
 122
 123     mymsg.mID = PSD(cl)->mid_RL;
 124     mymsg.bus = msg->bus;
 125     mymsg.dev = msg->dev;
 126     mymsg.sub = msg->sub;
 127     mymsg.reg = msg->reg & ~3;
 128
 129     temp.ul = OOP_DoMethod(o, (OOP_Msg)&mymsg);
 130
 131     return temp.uw[(msg->reg&2)>>1];
 132 }
 133
 134 void PCIDrv__Hidd_PCIDriver__WriteConfigByte(OOP_Class *cl, OOP_Object *o,
 135     struct pHidd_PCIDriver_WriteConfigByte *msg)
 136 {
 137     pcicfg temp;
 138     struct pHidd_PCIDriver_ReadConfigLong mymsg;
 139     struct pHidd_PCIDriver_WriteConfigLong mymsg2;
 140
 141     // Read whole Long from PCI config space.
 142     mymsg.mID = PSD(cl)->mid_RL;
 143     mymsg.bus = msg->bus;
 144     mymsg.dev = msg->dev;
 145     mymsg.sub = msg->sub;
 146     mymsg.reg = msg->reg & ~3;
 147
 148     temp.ul = OOP_DoMethod(o, (OOP_Msg)&mymsg);
 149
 150     // Modify proper part of it according to request.
 151     temp.ub[msg->reg & 3] = (UBYTE)msg->val;
 152
 153     // And put whole Long again into PCI config space.
 154     mymsg2.mID = PSD(cl)->mid_WL;
 155     mymsg2.bus = msg->bus;
 156     mymsg2.dev = msg->dev;
 157     mymsg2.sub = msg->sub;
 158     mymsg2.reg = msg->reg & ~3;
 159     mymsg2.val = temp.ul;
 160
 161     OOP_DoMethod(o, (OOP_Msg)&mymsg2);
 162 }
 163
 164 void PCIDrv__Hidd_PCIDriver__WriteConfigWord(OOP_Class *cl, OOP_Object *o,
 165     struct pHidd_PCIDriver_WriteConfigWord *msg)
 166 {
 167     pcicfg temp;
 168     struct pHidd_PCIDriver_ReadConfigLong mymsg;
 169     struct pHidd_PCIDriver_WriteConfigLong mymsg2;
 170
 171     // Read whole Long from PCI config space.
 172     mymsg.mID = PSD(cl)->mid_RL;
 173     mymsg.bus = msg->bus;
 174     mymsg.dev = msg->dev;
 175     mymsg.sub = msg->sub;
 176     mymsg.reg = msg->reg & ~3;
 177
 178     temp.ul = OOP_DoMethod(o, (OOP_Msg)&mymsg);
 179
 180     // Modify proper part of it according to request.
 181     temp.uw[(msg->reg&2)>>1] = (UWORD)msg->val;
 182
 183     // And put whole Long again into PCI config space.
 184     mymsg2.mID = PSD(cl)->mid_WL;
 185     mymsg2.bus = msg->bus;
 186     mymsg2.dev = msg->dev;
 187     mymsg2.sub = msg->sub;
 188     mymsg2.reg = msg->reg & ~3;
 189     mymsg2.val = temp.ul;
 190
 191     OOP_DoMethod(o, (OOP_Msg)&mymsg2);
 192
 193 }
 194
 195 /*
 196     PCIDriver::CPUtoPCI() converts the address as seen by CPU into the
 197     address seen by the PCI bus. Do not reimplement this function, if
 198     CPU and PCI address spaces are equal on the machine you're writting
 199     driver for
 200 */
 201 APTR PCIDrv__Hidd_PCIDriver__CPUtoPCI(OOP_Class *cl, OOP_Object *o,
 202     struct pHidd_PCIDriver_CPUtoPCI *msg)
 203 {
 204     struct DrvInstData *instance = (struct DrvInstData *)OOP_INST_DATA(cl, o);
 205
 206     if (instance->DirectBus)
 207     {
 208         return (APTR)msg->address;
 209     } else return (APTR)0xffffffff;
 210 }
 211
 212 /*
 213     PCIDriver::PCItoCPU() is opposite to above.
 214 */
 215 APTR PCIDrv__Hidd_PCIDriver__PCItoCPU(OOP_Class *cl, OOP_Object *o,
 216     struct pHidd_PCIDriver_PCItoCPU *msg)
 217 {
 218     struct DrvInstData *instance = (struct DrvInstData *)OOP_INST_DATA(cl, o);
 219
 220     if (instance->DirectBus)
 221     {
 222         return (APTR)msg->address;
 223     } else return (APTR)0xffffffff;
 224 }
 225
 226 /*
 227     PCIDriver::MapPCI(Address, Length) maps the Length bytes of PCI address
 228     space at Address to the CPU address space.
 229 */
 230 APTR PCIDrv__Hidd_PCIDriver__MapPCI(OOP_Class *cl, OOP_Object *o,
 231     struct pHidd_PCIDriver_MapPCI *msg)
 232 {
 233     /* Generic driver in case of DirecAccess PCI bus */
 234     struct DrvInstData *instance = (struct DrvInstData *)OOP_INST_DATA(cl, o);
 235
 236     if (instance->DirectBus)
 237     {
 238         struct pHidd_PCIDriver_PCItoCPU mmsg, *pmmsg=&mmsg;
 239         mmsg.mID = OOP_GetMethodID(IID_Hidd_PCIDriver, moHidd_PCIDriver_PCItoCPU);
 240         mmsg.address = msg->PCIAddress;
 241
 242         return ((APTR)OOP_DoMethod(o, (OOP_Msg)pmmsg));
 243     } else return (APTR)0xffffffff;
 244 }
 245
 246 /*
 247     PCIDriver::UnmapPCI(Address, Length) unmaps the mapped PCI area previously
 248     allocated with MapPCI method.
 249 */
 250 VOID PCIDrv__Hidd_PCIDriver__UnmapPCI(OOP_Class *cl, OOP_Object *o,
 251     struct pHidd_PCIDriver_UnmapPCI *msg)
 252 {
 253     /* Generic driver has nothing to do here */
 254 }
 255
 256 /*
 257     PCIDriver::AllocPCIMemory(Size) allocates memory region available for
 258     PCI BusMaster devices.
 259 */
 260 APTR PCIDrv__Hidd_PCIDriver__AllocPCIMem(OOP_Class *cl, OOP_Object *o,
 261     struct pHidd_PCIDriver_AllocPCIMem *msg)
 262 {
 263     APTR memory = AllocVec(msg->Size + 4096 + AROS_ALIGN(sizeof(APTR)), MEMF_CLEAR);
 264     IPTR diff;
 265
 266     diff = (IPTR)memory - (AROS_ROUNDUP2((IPTR)memory + sizeof(APTR), 4096));
 267     *((APTR*)((IPTR)memory - diff - sizeof(APTR))) = memory;
 268
 269     return (APTR)((IPTR)memory - diff);
 270 }
 271
 272 /*
 273     PCIDriver::FreePCIMemory(Address) frees previously allocated memory for PCI
 274     devices
 275 */
 276 VOID PCIDrv__Hidd_PCIDriver__FreePCIMem(OOP_Class *cl, OOP_Object *o,
 277     struct pHidd_PCIDriver_FreePCIMem *msg)
 278 {
 279     APTR memory = *(APTR*)((IPTR)msg->Address - sizeof(APTR));
 280     FreeVec(memory);
 281 }
 282
 283 VOID PCIDrv__Root__Get(OOP_Class *cl, OOP_Object *o,
 284     struct pRoot_Get *msg)
 285 {
 286     ULONG idx;
 287     struct DrvInstData *instance = (struct DrvInstData *)OOP_INST_DATA(cl, o);
 288
 289     if (IS_PCIDRV_ATTR(msg->attrID, idx))
 290     {
 291         switch(idx)
 292         {
 293             case aoHidd_PCIDriver_DirectBus:
 294                 *msg->storage = (IPTR)instance->DirectBus;
 295                 break;
 296
 297             default:
 298                 OOP_DoSuperMethod(cl, o, (OOP_Msg) msg);
 299                 break;
 300         }
 301     }
 302     else
 303     {
 304         OOP_DoSuperMethod(cl, o, (OOP_Msg) msg);
 305     }
 306 }
 307
 308 /* Class initialization and destruction */
 309
 310 static int PCIDrv_InitMIDs(LIBBASETYPEPTR LIBBASE)
 311 {
 312     D(bug("[PCIDriver] Dummy Driver initialization\n"));
 313     /*
 314      * We do have driver class. Now we can get some MethodID's,
 315      * so that whole PCI subsystem works slightly faster ;)
 316      */
 317
 318     LIBBASE->psd.mid_RB = OOP_GetMethodID(IID_Hidd_PCIDriver, moHidd_PCIDriver_ReadConfigByte);
 319     LIBBASE->psd.mid_RW = OOP_GetMethodID(IID_Hidd_PCIDriver, moHidd_PCIDriver_ReadConfigWord);
 320     LIBBASE->psd.mid_RL = OOP_GetMethodID(IID_Hidd_PCIDriver, moHidd_PCIDriver_ReadConfigLong);
 321
 322     LIBBASE->psd.mid_WB = OOP_GetMethodID(IID_Hidd_PCIDriver, moHidd_PCIDriver_WriteConfigByte);
 323     LIBBASE->psd.mid_WW = OOP_GetMethodID(IID_Hidd_PCIDriver, moHidd_PCIDriver_WriteConfigWord);
 324     LIBBASE->psd.mid_WL = OOP_GetMethodID(IID_Hidd_PCIDriver, moHidd_PCIDriver_WriteConfigLong);
 325
 326     return TRUE;
 327 }
 328
 329 ADD2INITLIB(PCIDrv_InitMIDs, 0)