5 /* fd controller registers */
6 #define FD_STATUS 0x3f4
12 /* Bits of main status register */
13 #define STATUS_BUSYMASK 0x0F /* drive busy mask */
14 #define STATUS_BUSY 0x10 /* FDC busy */
15 #define STATUS_DMA 0x20 /* 0- DMA mode */
16 #define STATUS_DIR 0x40 /* 0- cpu->fdc */
17 #define STATUS_READY 0x80 /* Data reg ready */
20 #define ST0_DS 0x03 /* drive select mask */
21 #define ST0_HA 0x04 /* Head (Address) */
22 #define ST0_NR 0x08 /* Not Ready */
23 #define ST0_ECE 0x10 /* Equipment chech error */
24 #define ST0_SE 0x20 /* Seek end */
25 #define ST0_INTR 0xC0 /* Interrupt code mask */
28 #define ST1_MAM 0x01 /* Missing Address Mark */
29 #define ST1_WP 0x02 /* Write Protect */
30 #define ST1_ND 0x04 /* No Data - unreadable */
31 #define ST1_OR 0x10 /* OverRun */
32 #define ST1_CRC 0x20 /* CRC error in data or addr */
33 #define ST1_EOC 0x80 /* End Of Cylinder */
36 #define ST2_MAM 0x01 /* Missing Addess Mark (again) */
37 #define ST2_BC 0x02 /* Bad Cylinder */
38 #define ST2_SNS 0x04 /* Scan Not Satisfied */
39 #define ST2_SEH 0x08 /* Scan Equal Hit */
40 #define ST2_WC 0x10 /* Wrong Cylinder */
41 #define ST2_CRC 0x20 /* CRC error in data field */
42 #define ST2_CM 0x40 /* Control Mark = deleted */
45 #define ST3_HA 0x04 /* Head (Address) */
46 #define ST3_TZ 0x10 /* Track Zero signal (1=track 0) */
47 #define ST3_WP 0x40 /* Write Protect */
49 /* Values for FD_COMMAND */
50 #define FD_RECALIBRATE 0x07 /* move to track 0 */
51 #define FD_SEEK 0x0F /* seek track */
52 #define FD_READ 0xE6//0xE6 /* read with MT, MFM, SKip deleted */
53 #define FD_WRITE 0xC5//0xC5 /* write with MT, MFM */
54 #define FD_SENSEI 0x08 /* Sense Interrupt Status */
55 #define FD_SPECIFY 0x03 /* specify HUT etc */
59 #define DMA_WRITE 0x4A//0x4A
62 extern void floppy_interrupt(void);
63 void do_fd_request(int, void*, int );
65 void floppy_read(int, void *);
66 void floppy_write(int, void *);
67 void floppy_reads(int, void *, unsigned int);
68 void floppy_writes(int, void *, unsigned int);
69 void floppy_init(void);