Merge branch 'next'
[u-boot/qq2440-u-boot.git] / drivers / usb / gadget / omap1510_udc.c
blobbdc1b886f5f589cd06fa89d756dcddde1bc2b60e
1 /*
2 * (C) Copyright 2003
3 * Gerry Hamel, geh@ti.com, Texas Instruments
5 * Based on
6 * linux/drivers/usb/device/bi/omap.c
7 * TI OMAP1510 USB bus interface driver
9 * Author: MontaVista Software, Inc.
10 * source@mvista.com
11 * (C) Copyright 2002
13 * SPDX-License-Identifier: GPL-2.0+
16 #include <common.h>
17 #include <asm/io.h>
18 #ifdef CONFIG_OMAP_SX1
19 #include <i2c.h>
20 #endif
21 #include <usbdevice.h>
22 #include <usb/omap1510_udc.h>
23 #include <usb/udc.h>
25 #include "ep0.h"
28 #define UDC_INIT_MDELAY 80 /* Device settle delay */
29 #define UDC_MAX_ENDPOINTS 31 /* Number of endpoints on this UDC */
31 /* Some kind of debugging output... */
32 #if 1
33 #define UDCDBG(str)
34 #define UDCDBGA(fmt,args...)
35 #else /* The bugs still exists... */
36 #define UDCDBG(str) serial_printf("[%s] %s:%d: " str "\n", __FILE__,__FUNCTION__,__LINE__)
37 #define UDCDBGA(fmt,args...) serial_printf("[%s] %s:%d: " fmt "\n", __FILE__,__FUNCTION__,__LINE__, ##args)
38 #endif
40 #if 1
41 #define UDCREG(name)
42 #define UDCREGL(name)
43 #else /* The bugs still exists... */
44 #define UDCREG(name) serial_printf("%s():%d: %s[%08x]=%.4x\n",__FUNCTION__,__LINE__, (#name), name, inw(name)) /* For 16-bit regs */
45 #define UDCREGL(name) serial_printf("%s():%d: %s[%08x]=%.8x\n",__FUNCTION__,__LINE__, (#name), name, inl(name)) /* For 32-bit regs */
46 #endif
49 static struct urb *ep0_urb = NULL;
51 static struct usb_device_instance *udc_device; /* Used in interrupt handler */
52 static u16 udc_devstat = 0; /* UDC status (DEVSTAT) */
53 static u32 udc_interrupts = 0;
55 static void udc_stall_ep (unsigned int ep_addr);
58 static struct usb_endpoint_instance *omap1510_find_ep (int ep)
60 int i;
62 for (i = 0; i < udc_device->bus->max_endpoints; i++) {
63 if (udc_device->bus->endpoint_array[i].endpoint_address == ep)
64 return &udc_device->bus->endpoint_array[i];
66 return NULL;
69 /* ************************************************************************** */
70 /* IO
74 * omap1510_prepare_endpoint_for_rx
76 * This function implements TRM Figure 14-11.
78 * The endpoint to prepare for transfer is specified as a physical endpoint
79 * number. For OUT (rx) endpoints 1 through 15, the corresponding endpoint
80 * configuration register is checked to see if the endpoint is ISO or not.
81 * If the OUT endpoint is valid and is non-ISO then its FIFO is enabled.
82 * No action is taken for endpoint 0 or for IN (tx) endpoints 16 through 30.
84 static void omap1510_prepare_endpoint_for_rx (int ep_addr)
86 int ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK;
88 UDCDBGA ("omap1510_prepare_endpoint %x", ep_addr);
89 if (((ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT)) {
90 if ((inw (UDC_EP_RX (ep_num)) &
91 (UDC_EPn_RX_Valid | UDC_EPn_RX_Iso)) ==
92 UDC_EPn_RX_Valid) {
93 /* rx endpoint is valid, non-ISO, so enable its FIFO */
94 outw (UDC_EP_Sel | ep_num, UDC_EP_NUM);
95 outw (UDC_Set_FIFO_En, UDC_CTRL);
96 outw (0, UDC_EP_NUM);
101 /* omap1510_configure_endpoints
103 * This function implements TRM Figure 14-10.
105 static void omap1510_configure_endpoints (struct usb_device_instance *device)
107 int ep;
108 struct usb_bus_instance *bus;
109 struct usb_endpoint_instance *endpoint;
110 unsigned short ep_ptr;
111 unsigned short ep_size;
112 unsigned short ep_isoc;
113 unsigned short ep_doublebuffer;
114 int ep_addr;
115 int packet_size;
116 int buffer_size;
117 int attributes;
119 bus = device->bus;
121 /* There is a dedicated 2048 byte buffer for USB packets that may be
122 * arbitrarily partitioned among the endpoints on 8-byte boundaries.
123 * The first 8 bytes are reserved for receiving setup packets on
124 * endpoint 0.
126 ep_ptr = 8; /* reserve the first 8 bytes for the setup fifo */
128 for (ep = 0; ep < bus->max_endpoints; ep++) {
129 endpoint = bus->endpoint_array + ep;
130 ep_addr = endpoint->endpoint_address;
131 if ((ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) {
132 /* IN endpoint */
133 packet_size = endpoint->tx_packetSize;
134 attributes = endpoint->tx_attributes;
135 } else {
136 /* OUT endpoint */
137 packet_size = endpoint->rcv_packetSize;
138 attributes = endpoint->rcv_attributes;
141 switch (packet_size) {
142 case 0:
143 ep_size = 0;
144 break;
145 case 8:
146 ep_size = 0;
147 break;
148 case 16:
149 ep_size = 1;
150 break;
151 case 32:
152 ep_size = 2;
153 break;
154 case 64:
155 ep_size = 3;
156 break;
157 case 128:
158 ep_size = 4;
159 break;
160 case 256:
161 ep_size = 5;
162 break;
163 case 512:
164 ep_size = 6;
165 break;
166 default:
167 UDCDBGA ("ep 0x%02x has bad packet size %d",
168 ep_addr, packet_size);
169 packet_size = 0;
170 ep_size = 0;
171 break;
174 switch (attributes & USB_ENDPOINT_XFERTYPE_MASK) {
175 case USB_ENDPOINT_XFER_CONTROL:
176 case USB_ENDPOINT_XFER_BULK:
177 case USB_ENDPOINT_XFER_INT:
178 default:
179 /* A non-isochronous endpoint may optionally be
180 * double-buffered. For now we disable
181 * double-buffering.
183 ep_doublebuffer = 0;
184 ep_isoc = 0;
185 if (packet_size > 64)
186 packet_size = 0;
187 if (!ep || !ep_doublebuffer)
188 buffer_size = packet_size;
189 else
190 buffer_size = packet_size * 2;
191 break;
192 case USB_ENDPOINT_XFER_ISOC:
193 /* Isochronous endpoints are always double-
194 * buffered, but the double-buffering bit
195 * in the endpoint configuration register
196 * becomes the msb of the endpoint size so we
197 * set the double-buffering flag to zero.
199 ep_doublebuffer = 0;
200 ep_isoc = 1;
201 buffer_size = packet_size * 2;
202 break;
205 /* check to see if our packet buffer RAM is exhausted */
206 if ((ep_ptr + buffer_size) > 2048) {
207 UDCDBGA ("out of packet RAM for ep 0x%02x buf size %d", ep_addr, buffer_size);
208 buffer_size = packet_size = 0;
211 /* force a default configuration for endpoint 0 since it is
212 * always enabled
214 if (!ep && ((packet_size < 8) || (packet_size > 64))) {
215 buffer_size = packet_size = 64;
216 ep_size = 3;
219 if (!ep) {
220 /* configure endpoint 0 */
221 outw ((ep_size << 12) | (ep_ptr >> 3), UDC_EP0);
222 /*UDCDBGA("ep 0 buffer offset 0x%03x packet size 0x%03x", */
223 /* ep_ptr, packet_size); */
224 } else if ((ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) {
225 /* IN endpoint */
226 if (packet_size) {
227 outw ((1 << 15) | (ep_doublebuffer << 14) |
228 (ep_size << 12) | (ep_isoc << 11) |
229 (ep_ptr >> 3),
230 UDC_EP_TX (ep_addr &
231 USB_ENDPOINT_NUMBER_MASK));
232 UDCDBGA ("IN ep %d buffer offset 0x%03x"
233 " packet size 0x%03x",
234 ep_addr & USB_ENDPOINT_NUMBER_MASK,
235 ep_ptr, packet_size);
236 } else {
237 outw (0,
238 UDC_EP_TX (ep_addr &
239 USB_ENDPOINT_NUMBER_MASK));
241 } else {
242 /* OUT endpoint */
243 if (packet_size) {
244 outw ((1 << 15) | (ep_doublebuffer << 14) |
245 (ep_size << 12) | (ep_isoc << 11) |
246 (ep_ptr >> 3),
247 UDC_EP_RX (ep_addr &
248 USB_ENDPOINT_NUMBER_MASK));
249 UDCDBGA ("OUT ep %d buffer offset 0x%03x"
250 " packet size 0x%03x",
251 ep_addr & USB_ENDPOINT_NUMBER_MASK,
252 ep_ptr, packet_size);
253 } else {
254 outw (0,
255 UDC_EP_RX (ep_addr &
256 USB_ENDPOINT_NUMBER_MASK));
259 ep_ptr += buffer_size;
263 /* omap1510_deconfigure_device
265 * This function balances omap1510_configure_device.
267 static void omap1510_deconfigure_device (void)
269 int epnum;
271 UDCDBG ("clear Cfg_Lock");
272 outw (inw (UDC_SYSCON1) & ~UDC_Cfg_Lock, UDC_SYSCON1);
273 UDCREG (UDC_SYSCON1);
275 /* deconfigure all endpoints */
276 for (epnum = 1; epnum <= 15; epnum++) {
277 outw (0, UDC_EP_RX (epnum));
278 outw (0, UDC_EP_TX (epnum));
282 /* omap1510_configure_device
284 * This function implements TRM Figure 14-9.
286 static void omap1510_configure_device (struct usb_device_instance *device)
288 omap1510_configure_endpoints (device);
291 /* Figure 14-9 indicates we should enable interrupts here, but we have
292 * other routines (udc_all_interrupts, udc_suspended_interrupts) to
293 * do that.
296 UDCDBG ("set Cfg_Lock");
297 outw (inw (UDC_SYSCON1) | UDC_Cfg_Lock, UDC_SYSCON1);
298 UDCREG (UDC_SYSCON1);
301 /* omap1510_write_noniso_tx_fifo
303 * This function implements TRM Figure 14-30.
305 * If the endpoint has an active tx_urb, then the next packet of data from the
306 * URB is written to the tx FIFO. The total amount of data in the urb is given
307 * by urb->actual_length. The maximum amount of data that can be sent in any
308 * one packet is given by endpoint->tx_packetSize. The number of data bytes
309 * from this URB that have already been transmitted is given by endpoint->sent.
310 * endpoint->last is updated by this routine with the number of data bytes
311 * transmitted in this packet.
313 * In accordance with Figure 14-30, the EP_NUM register must already have been
314 * written with the value to select the appropriate tx FIFO before this routine
315 * is called.
317 static void omap1510_write_noniso_tx_fifo (struct usb_endpoint_instance
318 *endpoint)
320 struct urb *urb = endpoint->tx_urb;
322 if (urb) {
323 unsigned int last, i;
325 UDCDBGA ("urb->buffer %p, buffer_length %d, actual_length %d",
326 urb->buffer, urb->buffer_length, urb->actual_length);
327 if ((last =
328 MIN (urb->actual_length - endpoint->sent,
329 endpoint->tx_packetSize))) {
330 u8 *cp = urb->buffer + endpoint->sent;
332 UDCDBGA ("endpoint->sent %d, tx_packetSize %d, last %d", endpoint->sent, endpoint->tx_packetSize, last);
334 if (((u32) cp & 1) == 0) { /* word aligned? */
335 outsw (UDC_DATA, cp, last >> 1);
336 } else { /* byte aligned. */
337 for (i = 0; i < (last >> 1); i++) {
338 u16 w = ((u16) cp[2 * i + 1] << 8) |
339 (u16) cp[2 * i];
340 outw (w, UDC_DATA);
343 if (last & 1) {
344 outb (*(cp + last - 1), UDC_DATA);
347 endpoint->last = last;
351 /* omap1510_read_noniso_rx_fifo
353 * This function implements TRM Figure 14-28.
355 * If the endpoint has an active rcv_urb, then the next packet of data is read
356 * from the rcv FIFO and written to rcv_urb->buffer at offset
357 * rcv_urb->actual_length to append the packet data to the data from any
358 * previous packets for this transfer. We assume that there is sufficient room
359 * left in the buffer to hold an entire packet of data.
361 * The return value is the number of bytes read from the FIFO for this packet.
363 * In accordance with Figure 14-28, the EP_NUM register must already have been
364 * written with the value to select the appropriate rcv FIFO before this routine
365 * is called.
367 static int omap1510_read_noniso_rx_fifo (struct usb_endpoint_instance
368 *endpoint)
370 struct urb *urb = endpoint->rcv_urb;
371 int len = 0;
373 if (urb) {
374 len = inw (UDC_RXFSTAT);
376 if (len) {
377 unsigned char *cp = urb->buffer + urb->actual_length;
379 insw (UDC_DATA, cp, len >> 1);
380 if (len & 1)
381 *(cp + len - 1) = inb (UDC_DATA);
384 return len;
387 /* omap1510_prepare_for_control_write_status
389 * This function implements TRM Figure 14-17.
391 * We have to deal here with non-autodecoded control writes that haven't already
392 * been dealt with by ep0_recv_setup. The non-autodecoded standard control
393 * write requests are: set/clear endpoint feature, set configuration, set
394 * interface, and set descriptor. ep0_recv_setup handles set/clear requests for
395 * ENDPOINT_HALT by halting the endpoint for a set request and resetting the
396 * endpoint for a clear request. ep0_recv_setup returns an error for
397 * SET_DESCRIPTOR requests which causes them to be terminated with a stall by
398 * the setup handler. A SET_INTERFACE request is handled by ep0_recv_setup by
399 * generating a DEVICE_SET_INTERFACE event. This leaves only the
400 * SET_CONFIGURATION event for us to deal with here.
403 static void omap1510_prepare_for_control_write_status (struct urb *urb)
405 struct usb_device_request *request = &urb->device_request;;
407 /* check for a SET_CONFIGURATION request */
408 if (request->bRequest == USB_REQ_SET_CONFIGURATION) {
409 int configuration = le16_to_cpu (request->wValue) & 0xff;
410 unsigned short devstat = inw (UDC_DEVSTAT);
412 if ((devstat & (UDC_ADD | UDC_CFG)) == UDC_ADD) {
413 /* device is currently in ADDRESSED state */
414 if (configuration) {
415 /* Assume the specified non-zero configuration
416 * value is valid and switch to the CONFIGURED
417 * state.
419 outw (UDC_Dev_Cfg, UDC_SYSCON2);
421 } else if ((devstat & UDC_CFG) == UDC_CFG) {
422 /* device is currently in CONFIGURED state */
423 if (!configuration) {
424 /* Switch to ADDRESSED state. */
425 outw (UDC_Clr_Cfg, UDC_SYSCON2);
430 /* select EP0 tx FIFO */
431 outw (UDC_EP_Dir | UDC_EP_Sel, UDC_EP_NUM);
432 /* clear endpoint (no data bytes in status stage) */
433 outw (UDC_Clr_EP, UDC_CTRL);
434 /* enable the EP0 tx FIFO */
435 outw (UDC_Set_FIFO_En, UDC_CTRL);
436 /* deselect the endpoint */
437 outw (UDC_EP_Dir, UDC_EP_NUM);
440 /* udc_state_transition_up
441 * udc_state_transition_down
443 * Helper functions to implement device state changes. The device states and
444 * the events that transition between them are:
446 * STATE_ATTACHED
447 * || /\
448 * \/ ||
449 * DEVICE_HUB_CONFIGURED DEVICE_HUB_RESET
450 * || /\
451 * \/ ||
452 * STATE_POWERED
453 * || /\
454 * \/ ||
455 * DEVICE_RESET DEVICE_POWER_INTERRUPTION
456 * || /\
457 * \/ ||
458 * STATE_DEFAULT
459 * || /\
460 * \/ ||
461 * DEVICE_ADDRESS_ASSIGNED DEVICE_RESET
462 * || /\
463 * \/ ||
464 * STATE_ADDRESSED
465 * || /\
466 * \/ ||
467 * DEVICE_CONFIGURED DEVICE_DE_CONFIGURED
468 * || /\
469 * \/ ||
470 * STATE_CONFIGURED
472 * udc_state_transition_up transitions up (in the direction from STATE_ATTACHED
473 * to STATE_CONFIGURED) from the specified initial state to the specified final
474 * state, passing through each intermediate state on the way. If the initial
475 * state is at or above (i.e. nearer to STATE_CONFIGURED) the final state, then
476 * no state transitions will take place.
478 * udc_state_transition_down transitions down (in the direction from
479 * STATE_CONFIGURED to STATE_ATTACHED) from the specified initial state to the
480 * specified final state, passing through each intermediate state on the way.
481 * If the initial state is at or below (i.e. nearer to STATE_ATTACHED) the final
482 * state, then no state transitions will take place.
484 * These functions must only be called with interrupts disabled.
486 static void udc_state_transition_up (usb_device_state_t initial,
487 usb_device_state_t final)
489 if (initial < final) {
490 switch (initial) {
491 case STATE_ATTACHED:
492 usbd_device_event_irq (udc_device,
493 DEVICE_HUB_CONFIGURED, 0);
494 if (final == STATE_POWERED)
495 break;
496 case STATE_POWERED:
497 usbd_device_event_irq (udc_device, DEVICE_RESET, 0);
498 if (final == STATE_DEFAULT)
499 break;
500 case STATE_DEFAULT:
501 usbd_device_event_irq (udc_device,
502 DEVICE_ADDRESS_ASSIGNED, 0);
503 if (final == STATE_ADDRESSED)
504 break;
505 case STATE_ADDRESSED:
506 usbd_device_event_irq (udc_device, DEVICE_CONFIGURED,
508 case STATE_CONFIGURED:
509 break;
510 default:
511 break;
516 static void udc_state_transition_down (usb_device_state_t initial,
517 usb_device_state_t final)
519 if (initial > final) {
520 switch (initial) {
521 case STATE_CONFIGURED:
522 usbd_device_event_irq (udc_device, DEVICE_DE_CONFIGURED, 0);
523 if (final == STATE_ADDRESSED)
524 break;
525 case STATE_ADDRESSED:
526 usbd_device_event_irq (udc_device, DEVICE_RESET, 0);
527 if (final == STATE_DEFAULT)
528 break;
529 case STATE_DEFAULT:
530 usbd_device_event_irq (udc_device, DEVICE_POWER_INTERRUPTION, 0);
531 if (final == STATE_POWERED)
532 break;
533 case STATE_POWERED:
534 usbd_device_event_irq (udc_device, DEVICE_HUB_RESET, 0);
535 case STATE_ATTACHED:
536 break;
537 default:
538 break;
543 /* Handle all device state changes.
544 * This function implements TRM Figure 14-21.
546 static void omap1510_udc_state_changed (void)
548 u16 bits;
549 u16 devstat = inw (UDC_DEVSTAT);
551 UDCDBGA ("state changed, devstat %x, old %x", devstat, udc_devstat);
553 bits = devstat ^ udc_devstat;
554 if (bits) {
555 if (bits & UDC_ATT) {
556 if (devstat & UDC_ATT) {
557 UDCDBG ("device attached and powered");
558 udc_state_transition_up (udc_device->device_state, STATE_POWERED);
559 } else {
560 UDCDBG ("device detached or unpowered");
561 udc_state_transition_down (udc_device->device_state, STATE_ATTACHED);
564 if (bits & UDC_USB_Reset) {
565 if (devstat & UDC_USB_Reset) {
566 UDCDBG ("device reset in progess");
567 udc_state_transition_down (udc_device->device_state, STATE_POWERED);
568 } else {
569 UDCDBG ("device reset completed");
572 if (bits & UDC_DEF) {
573 if (devstat & UDC_DEF) {
574 UDCDBG ("device entering default state");
575 udc_state_transition_up (udc_device->device_state, STATE_DEFAULT);
576 } else {
577 UDCDBG ("device leaving default state");
578 udc_state_transition_down (udc_device->device_state, STATE_POWERED);
581 if (bits & UDC_SUS) {
582 if (devstat & UDC_SUS) {
583 UDCDBG ("entering suspended state");
584 usbd_device_event_irq (udc_device, DEVICE_BUS_INACTIVE, 0);
585 } else {
586 UDCDBG ("leaving suspended state");
587 usbd_device_event_irq (udc_device, DEVICE_BUS_ACTIVITY, 0);
590 if (bits & UDC_R_WK_OK) {
591 UDCDBGA ("remote wakeup %s", (devstat & UDC_R_WK_OK)
592 ? "enabled" : "disabled");
594 if (bits & UDC_ADD) {
595 if (devstat & UDC_ADD) {
596 UDCDBG ("default -> addressed");
597 udc_state_transition_up (udc_device->device_state, STATE_ADDRESSED);
598 } else {
599 UDCDBG ("addressed -> default");
600 udc_state_transition_down (udc_device->device_state, STATE_DEFAULT);
603 if (bits & UDC_CFG) {
604 if (devstat & UDC_CFG) {
605 UDCDBG ("device configured");
606 /* The ep0_recv_setup function generates the
607 * DEVICE_CONFIGURED event when a
608 * USB_REQ_SET_CONFIGURATION setup packet is
609 * received, so we should already be in the
610 * state STATE_CONFIGURED.
612 udc_state_transition_up (udc_device->device_state, STATE_CONFIGURED);
613 } else {
614 UDCDBG ("device deconfigured");
615 udc_state_transition_down (udc_device->device_state, STATE_ADDRESSED);
620 /* Clear interrupt source */
621 outw (UDC_DS_Chg, UDC_IRQ_SRC);
623 /* Save current DEVSTAT */
624 udc_devstat = devstat;
627 /* Handle SETUP USB interrupt.
628 * This function implements TRM Figure 14-14.
630 static void omap1510_udc_setup (struct usb_endpoint_instance *endpoint)
632 UDCDBG ("-> Entering device setup");
634 do {
635 const int setup_pktsize = 8;
636 unsigned char *datap =
637 (unsigned char *) &ep0_urb->device_request;
639 /* Gain access to EP 0 setup FIFO */
640 outw (UDC_Setup_Sel, UDC_EP_NUM);
642 /* Read control request data */
643 insb (UDC_DATA, datap, setup_pktsize);
645 UDCDBGA ("EP0 setup read [%x %x %x %x %x %x %x %x]",
646 *(datap + 0), *(datap + 1), *(datap + 2),
647 *(datap + 3), *(datap + 4), *(datap + 5),
648 *(datap + 6), *(datap + 7));
650 /* Reset EP0 setup FIFO */
651 outw (0, UDC_EP_NUM);
652 } while (inw (UDC_IRQ_SRC) & UDC_Setup);
654 /* Try to process setup packet */
655 if (ep0_recv_setup (ep0_urb)) {
656 /* Not a setup packet, stall next EP0 transaction */
657 udc_stall_ep (0);
658 UDCDBG ("can't parse setup packet, still waiting for setup");
659 return;
662 /* Check direction */
663 if ((ep0_urb->device_request.bmRequestType & USB_REQ_DIRECTION_MASK)
664 == USB_REQ_HOST2DEVICE) {
665 UDCDBG ("control write on EP0");
666 if (le16_to_cpu (ep0_urb->device_request.wLength)) {
667 /* We don't support control write data stages.
668 * The only standard control write request with a data
669 * stage is SET_DESCRIPTOR, and ep0_recv_setup doesn't
670 * support that so we just stall those requests. A
671 * function driver might support a non-standard
672 * write request with a data stage, but it isn't
673 * obvious what we would do with the data if we read it
674 * so we'll just stall it. It seems like the API isn't
675 * quite right here.
677 #if 0
678 /* Here is what we would do if we did support control
679 * write data stages.
681 ep0_urb->actual_length = 0;
682 outw (0, UDC_EP_NUM);
683 /* enable the EP0 rx FIFO */
684 outw (UDC_Set_FIFO_En, UDC_CTRL);
685 #else
686 /* Stall this request */
687 UDCDBG ("Stalling unsupported EP0 control write data "
688 "stage.");
689 udc_stall_ep (0);
690 #endif
691 } else {
692 omap1510_prepare_for_control_write_status (ep0_urb);
694 } else {
695 UDCDBG ("control read on EP0");
696 /* The ep0_recv_setup function has already placed our response
697 * packet data in ep0_urb->buffer and the packet length in
698 * ep0_urb->actual_length.
700 endpoint->tx_urb = ep0_urb;
701 endpoint->sent = 0;
702 /* select the EP0 tx FIFO */
703 outw (UDC_EP_Dir | UDC_EP_Sel, UDC_EP_NUM);
704 /* Write packet data to the FIFO. omap1510_write_noniso_tx_fifo
705 * will update endpoint->last with the number of bytes written
706 * to the FIFO.
708 omap1510_write_noniso_tx_fifo (endpoint);
709 /* enable the FIFO to start the packet transmission */
710 outw (UDC_Set_FIFO_En, UDC_CTRL);
711 /* deselect the EP0 tx FIFO */
712 outw (UDC_EP_Dir, UDC_EP_NUM);
715 UDCDBG ("<- Leaving device setup");
718 /* Handle endpoint 0 RX interrupt
719 * This routine implements TRM Figure 14-16.
721 static void omap1510_udc_ep0_rx (struct usb_endpoint_instance *endpoint)
723 unsigned short status;
725 UDCDBG ("RX on EP0");
726 /* select EP0 rx FIFO */
727 outw (UDC_EP_Sel, UDC_EP_NUM);
729 status = inw (UDC_STAT_FLG);
731 if (status & UDC_ACK) {
732 /* Check direction */
733 if ((ep0_urb->device_request.bmRequestType
734 & USB_REQ_DIRECTION_MASK) == USB_REQ_HOST2DEVICE) {
735 /* This rx interrupt must be for a control write data
736 * stage packet.
738 * We don't support control write data stages.
739 * We should never end up here.
742 /* clear the EP0 rx FIFO */
743 outw (UDC_Clr_EP, UDC_CTRL);
745 /* deselect the EP0 rx FIFO */
746 outw (0, UDC_EP_NUM);
748 UDCDBG ("Stalling unexpected EP0 control write "
749 "data stage packet");
750 udc_stall_ep (0);
751 } else {
752 /* This rx interrupt must be for a control read status
753 * stage packet.
755 UDCDBG ("ACK on EP0 control read status stage packet");
756 /* deselect EP0 rx FIFO */
757 outw (0, UDC_EP_NUM);
759 } else if (status & UDC_STALL) {
760 UDCDBG ("EP0 stall during RX");
761 /* deselect EP0 rx FIFO */
762 outw (0, UDC_EP_NUM);
763 } else {
764 /* deselect EP0 rx FIFO */
765 outw (0, UDC_EP_NUM);
769 /* Handle endpoint 0 TX interrupt
770 * This routine implements TRM Figure 14-18.
772 static void omap1510_udc_ep0_tx (struct usb_endpoint_instance *endpoint)
774 unsigned short status;
775 struct usb_device_request *request = &ep0_urb->device_request;
777 UDCDBG ("TX on EP0");
778 /* select EP0 TX FIFO */
779 outw (UDC_EP_Dir | UDC_EP_Sel, UDC_EP_NUM);
781 status = inw (UDC_STAT_FLG);
782 if (status & UDC_ACK) {
783 /* Check direction */
784 if ((request->bmRequestType & USB_REQ_DIRECTION_MASK) ==
785 USB_REQ_HOST2DEVICE) {
786 /* This tx interrupt must be for a control write status
787 * stage packet.
789 UDCDBG ("ACK on EP0 control write status stage packet");
790 /* deselect EP0 TX FIFO */
791 outw (UDC_EP_Dir, UDC_EP_NUM);
792 } else {
793 /* This tx interrupt must be for a control read data
794 * stage packet.
796 int wLength = le16_to_cpu (request->wLength);
798 /* Update our count of bytes sent so far in this
799 * transfer.
801 endpoint->sent += endpoint->last;
803 /* We are finished with this transfer if we have sent
804 * all of the bytes in our tx urb (urb->actual_length)
805 * unless we need a zero-length terminating packet. We
806 * need a zero-length terminating packet if we returned
807 * fewer bytes than were requested (wLength) by the host,
808 * and the number of bytes we returned is an exact
809 * multiple of the packet size endpoint->tx_packetSize.
811 if ((endpoint->sent == ep0_urb->actual_length)
812 && ((ep0_urb->actual_length == wLength)
813 || (endpoint->last !=
814 endpoint->tx_packetSize))) {
815 /* Done with control read data stage. */
816 UDCDBG ("control read data stage complete");
817 /* deselect EP0 TX FIFO */
818 outw (UDC_EP_Dir, UDC_EP_NUM);
819 /* select EP0 RX FIFO to prepare for control
820 * read status stage.
822 outw (UDC_EP_Sel, UDC_EP_NUM);
823 /* clear the EP0 RX FIFO */
824 outw (UDC_Clr_EP, UDC_CTRL);
825 /* enable the EP0 RX FIFO */
826 outw (UDC_Set_FIFO_En, UDC_CTRL);
827 /* deselect the EP0 RX FIFO */
828 outw (0, UDC_EP_NUM);
829 } else {
830 /* We still have another packet of data to send
831 * in this control read data stage or else we
832 * need a zero-length terminating packet.
834 UDCDBG ("ACK control read data stage packet");
835 omap1510_write_noniso_tx_fifo (endpoint);
836 /* enable the EP0 tx FIFO to start transmission */
837 outw (UDC_Set_FIFO_En, UDC_CTRL);
838 /* deselect EP0 TX FIFO */
839 outw (UDC_EP_Dir, UDC_EP_NUM);
842 } else if (status & UDC_STALL) {
843 UDCDBG ("EP0 stall during TX");
844 /* deselect EP0 TX FIFO */
845 outw (UDC_EP_Dir, UDC_EP_NUM);
846 } else {
847 /* deselect EP0 TX FIFO */
848 outw (UDC_EP_Dir, UDC_EP_NUM);
852 /* Handle RX transaction on non-ISO endpoint.
853 * This function implements TRM Figure 14-27.
854 * The ep argument is a physical endpoint number for a non-ISO OUT endpoint
855 * in the range 1 to 15.
857 static void omap1510_udc_epn_rx (int ep)
859 unsigned short status;
861 /* Check endpoint status */
862 status = inw (UDC_STAT_FLG);
864 if (status & UDC_ACK) {
865 int nbytes;
866 struct usb_endpoint_instance *endpoint =
867 omap1510_find_ep (ep);
869 nbytes = omap1510_read_noniso_rx_fifo (endpoint);
870 usbd_rcv_complete (endpoint, nbytes, 0);
872 /* enable rx FIFO to prepare for next packet */
873 outw (UDC_Set_FIFO_En, UDC_CTRL);
874 } else if (status & UDC_STALL) {
875 UDCDBGA ("STALL on RX endpoint %d", ep);
876 } else if (status & UDC_NAK) {
877 UDCDBGA ("NAK on RX ep %d", ep);
878 } else {
879 serial_printf ("omap-bi: RX on ep %d with status %x", ep,
880 status);
884 /* Handle TX transaction on non-ISO endpoint.
885 * This function implements TRM Figure 14-29.
886 * The ep argument is a physical endpoint number for a non-ISO IN endpoint
887 * in the range 16 to 30.
889 static void omap1510_udc_epn_tx (int ep)
891 unsigned short status;
893 /*serial_printf("omap1510_udc_epn_tx( %x )\n",ep); */
895 /* Check endpoint status */
896 status = inw (UDC_STAT_FLG);
898 if (status & UDC_ACK) {
899 struct usb_endpoint_instance *endpoint =
900 omap1510_find_ep (ep);
902 /* We need to transmit a terminating zero-length packet now if
903 * we have sent all of the data in this URB and the transfer
904 * size was an exact multiple of the packet size.
906 if (endpoint->tx_urb
907 && (endpoint->last == endpoint->tx_packetSize)
908 && (endpoint->tx_urb->actual_length - endpoint->sent -
909 endpoint->last == 0)) {
910 /* Prepare to transmit a zero-length packet. */
911 endpoint->sent += endpoint->last;
912 /* write 0 bytes of data to FIFO */
913 omap1510_write_noniso_tx_fifo (endpoint);
914 /* enable tx FIFO to start transmission */
915 outw (UDC_Set_FIFO_En, UDC_CTRL);
916 } else if (endpoint->tx_urb
917 && endpoint->tx_urb->actual_length) {
918 /* retire the data that was just sent */
919 usbd_tx_complete (endpoint);
920 /* Check to see if we have more data ready to transmit
921 * now.
923 if (endpoint->tx_urb
924 && endpoint->tx_urb->actual_length) {
925 /* write data to FIFO */
926 omap1510_write_noniso_tx_fifo (endpoint);
927 /* enable tx FIFO to start transmission */
928 outw (UDC_Set_FIFO_En, UDC_CTRL);
931 } else if (status & UDC_STALL) {
932 UDCDBGA ("STALL on TX endpoint %d", ep);
933 } else if (status & UDC_NAK) {
934 UDCDBGA ("NAK on TX endpoint %d", ep);
935 } else {
936 /*serial_printf("omap-bi: TX on ep %d with status %x\n", ep, status); */
942 -------------------------------------------------------------------------------
945 /* Handle general USB interrupts and dispatch according to type.
946 * This function implements TRM Figure 14-13.
948 void omap1510_udc_irq (void)
950 u16 irq_src = inw (UDC_IRQ_SRC);
951 int valid_irq = 0;
953 if (!(irq_src & ~UDC_SOF_Flg)) /* ignore SOF interrupts ) */
954 return;
956 UDCDBGA ("< IRQ #%d start >- %x", udc_interrupts, irq_src);
957 /*serial_printf("< IRQ #%d start >- %x\n", udc_interrupts, irq_src); */
959 if (irq_src & UDC_DS_Chg) {
960 /* Device status changed */
961 omap1510_udc_state_changed ();
962 valid_irq++;
964 if (irq_src & UDC_EP0_RX) {
965 /* Endpoint 0 receive */
966 outw (UDC_EP0_RX, UDC_IRQ_SRC); /* ack interrupt */
967 omap1510_udc_ep0_rx (udc_device->bus->endpoint_array + 0);
968 valid_irq++;
970 if (irq_src & UDC_EP0_TX) {
971 /* Endpoint 0 transmit */
972 outw (UDC_EP0_TX, UDC_IRQ_SRC); /* ack interrupt */
973 omap1510_udc_ep0_tx (udc_device->bus->endpoint_array + 0);
974 valid_irq++;
976 if (irq_src & UDC_Setup) {
977 /* Device setup */
978 omap1510_udc_setup (udc_device->bus->endpoint_array + 0);
979 valid_irq++;
981 /*if (!valid_irq) */
982 /* serial_printf("unknown interrupt, IRQ_SRC %.4x\n", irq_src); */
983 UDCDBGA ("< IRQ #%d end >", udc_interrupts);
984 udc_interrupts++;
987 /* This function implements TRM Figure 14-26. */
988 void omap1510_udc_noniso_irq (void)
990 unsigned short epnum;
991 unsigned short irq_src = inw (UDC_IRQ_SRC);
992 int valid_irq = 0;
994 if (!(irq_src & (UDC_EPn_RX | UDC_EPn_TX)))
995 return;
997 UDCDBGA ("non-ISO IRQ, IRQ_SRC %x", inw (UDC_IRQ_SRC));
999 if (irq_src & UDC_EPn_RX) { /* Endpoint N OUT transaction */
1000 /* Determine the endpoint number for this interrupt */
1001 epnum = (inw (UDC_EPN_STAT) & 0x0f00) >> 8;
1002 UDCDBGA ("RX on ep %x", epnum);
1004 /* acknowledge interrupt */
1005 outw (UDC_EPn_RX, UDC_IRQ_SRC);
1007 if (epnum) {
1008 /* select the endpoint FIFO */
1009 outw (UDC_EP_Sel | epnum, UDC_EP_NUM);
1011 omap1510_udc_epn_rx (epnum);
1013 /* deselect the endpoint FIFO */
1014 outw (epnum, UDC_EP_NUM);
1016 valid_irq++;
1018 if (irq_src & UDC_EPn_TX) { /* Endpoint N IN transaction */
1019 /* Determine the endpoint number for this interrupt */
1020 epnum = (inw (UDC_EPN_STAT) & 0x000f) | USB_DIR_IN;
1021 UDCDBGA ("TX on ep %x", epnum);
1023 /* acknowledge interrupt */
1024 outw (UDC_EPn_TX, UDC_IRQ_SRC);
1026 if (epnum) {
1027 /* select the endpoint FIFO */
1028 outw (UDC_EP_Sel | UDC_EP_Dir | epnum, UDC_EP_NUM);
1030 omap1510_udc_epn_tx (epnum);
1032 /* deselect the endpoint FIFO */
1033 outw (UDC_EP_Dir | epnum, UDC_EP_NUM);
1035 valid_irq++;
1037 if (!valid_irq)
1038 serial_printf (": unknown non-ISO interrupt, IRQ_SRC %.4x\n",
1039 irq_src);
1043 -------------------------------------------------------------------------------
1048 * Start of public functions.
1051 /* Called to start packet transmission. */
1052 int udc_endpoint_write (struct usb_endpoint_instance *endpoint)
1054 unsigned short epnum =
1055 endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK;
1057 UDCDBGA ("Starting transmit on ep %x", epnum);
1059 if (endpoint->tx_urb) {
1060 /* select the endpoint FIFO */
1061 outw (UDC_EP_Sel | UDC_EP_Dir | epnum, UDC_EP_NUM);
1062 /* write data to FIFO */
1063 omap1510_write_noniso_tx_fifo (endpoint);
1064 /* enable tx FIFO to start transmission */
1065 outw (UDC_Set_FIFO_En, UDC_CTRL);
1066 /* deselect the endpoint FIFO */
1067 outw (UDC_EP_Dir | epnum, UDC_EP_NUM);
1070 return 0;
1073 /* Start to initialize h/w stuff */
1074 int udc_init (void)
1076 u16 udc_rev;
1077 uchar value;
1078 ulong gpio;
1079 int i;
1081 /* Let the device settle down before we start */
1082 for (i = 0; i < UDC_INIT_MDELAY; i++) udelay(1000);
1084 udc_device = NULL;
1086 UDCDBG ("starting");
1088 /* Check peripheral reset. Must be 1 to make sure
1089 MPU TIPB peripheral reset is inactive */
1090 UDCREG (ARM_RSTCT2);
1092 /* Set and check clock control.
1093 * We might ought to be using the clock control API to do
1094 * this instead of fiddling with the clock registers directly
1095 * here.
1097 outw ((1 << 4) | (1 << 5), CLOCK_CTRL);
1098 UDCREG (CLOCK_CTRL);
1100 #ifdef CONFIG_OMAP1510
1101 /* This code was originally implemented for OMAP1510 and
1102 * therefore is only applicable for OMAP1510 boards. For
1103 * OMAP5912 or OMAP16xx the register APLL_CTRL does not
1104 * exist and DPLL_CTRL is already configured.
1107 /* Set and check APLL */
1108 outw (0x0008, APLL_CTRL);
1109 UDCREG (APLL_CTRL);
1110 /* Set and check DPLL */
1111 outw (0x2210, DPLL_CTRL);
1112 UDCREG (DPLL_CTRL);
1113 #endif
1114 /* Set and check SOFT
1115 * The below line of code has been changed to perform a
1116 * read-modify-write instead of a simple write for
1117 * configuring the SOFT_REQ register. This allows the code
1118 * to be compatible with OMAP5912 and OMAP16xx devices
1120 outw ((1 << 4) | (1 << 3) | 1 | (inw(SOFT_REQ)), SOFT_REQ);
1122 /* Short delay to wait for DPLL */
1123 udelay (1000);
1125 /* Print banner with device revision */
1126 udc_rev = inw (UDC_REV) & 0xff;
1127 #ifdef CONFIG_OMAP1510
1128 printf ("USB: TI OMAP1510 USB function module rev %d.%d\n",
1129 udc_rev >> 4, udc_rev & 0xf);
1130 #endif
1132 #ifdef CONFIG_OMAP1610
1133 printf ("USB: TI OMAP5912 USB function module rev %d.%d\n",
1134 udc_rev >> 4, udc_rev & 0xf);
1135 #endif
1137 #ifdef CONFIG_OMAP_SX1
1138 i2c_read (0x32, 0x04, 1, &value, 1);
1139 value |= 0x04;
1140 i2c_write (0x32, 0x04, 1, &value, 1);
1142 i2c_read (0x32, 0x03, 1, &value, 1);
1143 value |= 0x01;
1144 i2c_write (0x32, 0x03, 1, &value, 1);
1146 gpio = inl(GPIO_PIN_CONTROL_REG);
1147 gpio |= 0x0002; /* A_IRDA_OFF */
1148 gpio |= 0x0800; /* A_SWITCH */
1149 gpio |= 0x8000; /* A_USB_ON */
1150 outl (gpio, GPIO_PIN_CONTROL_REG);
1152 gpio = inl(GPIO_DIR_CONTROL_REG);
1153 gpio &= ~0x0002; /* A_IRDA_OFF */
1154 gpio &= ~0x0800; /* A_SWITCH */
1155 gpio &= ~0x8000; /* A_USB_ON */
1156 outl (gpio, GPIO_DIR_CONTROL_REG);
1158 gpio = inl(GPIO_DATA_OUTPUT_REG);
1159 gpio |= 0x0002; /* A_IRDA_OFF */
1160 gpio &= ~0x0800; /* A_SWITCH */
1161 gpio &= ~0x8000; /* A_USB_ON */
1162 outl (gpio, GPIO_DATA_OUTPUT_REG);
1163 #endif
1165 /* The VBUS_MODE bit selects whether VBUS detection is done via
1166 * software (1) or hardware (0). When software detection is
1167 * selected, VBUS_CTRL selects whether USB is not connected (0)
1168 * or connected (1).
1170 outl (inl (FUNC_MUX_CTRL_0) | UDC_VBUS_MODE, FUNC_MUX_CTRL_0);
1171 outl (inl (FUNC_MUX_CTRL_0) & ~UDC_VBUS_CTRL, FUNC_MUX_CTRL_0);
1172 UDCREGL (FUNC_MUX_CTRL_0);
1175 * At this point, device is ready for configuration...
1178 UDCDBG ("disable USB interrupts");
1179 outw (0, UDC_IRQ_EN);
1180 UDCREG (UDC_IRQ_EN);
1182 UDCDBG ("disable USB DMA");
1183 outw (0, UDC_DMA_IRQ_EN);
1184 UDCREG (UDC_DMA_IRQ_EN);
1186 UDCDBG ("initialize SYSCON1");
1187 outw (UDC_Self_Pwr | UDC_Pullup_En, UDC_SYSCON1);
1188 UDCREG (UDC_SYSCON1);
1190 return 0;
1193 /* Stall endpoint */
1194 static void udc_stall_ep (unsigned int ep_addr)
1196 /*int ep_addr = PHYS_EP_TO_EP_ADDR(ep); */
1197 int ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK;
1199 UDCDBGA ("stall ep_addr %d", ep_addr);
1201 /* REVISIT?
1202 * The OMAP TRM section 14.2.4.2 says we must check that the FIFO
1203 * is empty before halting the endpoint. The current implementation
1204 * doesn't check that the FIFO is empty.
1207 if (!ep_num) {
1208 outw (UDC_Stall_Cmd, UDC_SYSCON2);
1209 } else if ((ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT) {
1210 if (inw (UDC_EP_RX (ep_num)) & UDC_EPn_RX_Valid) {
1211 /* we have a valid rx endpoint, so halt it */
1212 outw (UDC_EP_Sel | ep_num, UDC_EP_NUM);
1213 outw (UDC_Set_Halt, UDC_CTRL);
1214 outw (ep_num, UDC_EP_NUM);
1216 } else {
1217 if (inw (UDC_EP_TX (ep_num)) & UDC_EPn_TX_Valid) {
1218 /* we have a valid tx endpoint, so halt it */
1219 outw (UDC_EP_Sel | UDC_EP_Dir | ep_num, UDC_EP_NUM);
1220 outw (UDC_Set_Halt, UDC_CTRL);
1221 outw (ep_num, UDC_EP_NUM);
1226 /* Reset endpoint */
1227 #if 0
1228 static void udc_reset_ep (unsigned int ep_addr)
1230 /*int ep_addr = PHYS_EP_TO_EP_ADDR(ep); */
1231 int ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK;
1233 UDCDBGA ("reset ep_addr %d", ep_addr);
1235 if (!ep_num) {
1236 /* control endpoint 0 can't be reset */
1237 } else if ((ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT) {
1238 UDCDBGA ("UDC_EP_RX(%d) = 0x%04x", ep_num,
1239 inw (UDC_EP_RX (ep_num)));
1240 if (inw (UDC_EP_RX (ep_num)) & UDC_EPn_RX_Valid) {
1241 /* we have a valid rx endpoint, so reset it */
1242 outw (ep_num | UDC_EP_Sel, UDC_EP_NUM);
1243 outw (UDC_Reset_EP, UDC_CTRL);
1244 outw (ep_num, UDC_EP_NUM);
1245 UDCDBGA ("OUT endpoint %d reset", ep_num);
1247 } else {
1248 UDCDBGA ("UDC_EP_TX(%d) = 0x%04x", ep_num,
1249 inw (UDC_EP_TX (ep_num)));
1250 /* Resetting of tx endpoints seems to be causing the USB function
1251 * module to fail, which causes problems when the driver is
1252 * uninstalled. We'll skip resetting tx endpoints for now until
1253 * we figure out what the problem is.
1255 #if 0
1256 if (inw (UDC_EP_TX (ep_num)) & UDC_EPn_TX_Valid) {
1257 /* we have a valid tx endpoint, so reset it */
1258 outw (ep_num | UDC_EP_Dir | UDC_EP_Sel, UDC_EP_NUM);
1259 outw (UDC_Reset_EP, UDC_CTRL);
1260 outw (ep_num | UDC_EP_Dir, UDC_EP_NUM);
1261 UDCDBGA ("IN endpoint %d reset", ep_num);
1263 #endif
1266 #endif
1268 /* ************************************************************************** */
1271 * udc_check_ep - check logical endpoint
1273 * Return physical endpoint number to use for this logical endpoint or zero if not valid.
1275 #if 0
1276 int udc_check_ep (int logical_endpoint, int packetsize)
1278 if ((logical_endpoint == 0x80) ||
1279 ((logical_endpoint & 0x8f) != logical_endpoint)) {
1280 return 0;
1283 switch (packetsize) {
1284 case 8:
1285 case 16:
1286 case 32:
1287 case 64:
1288 case 128:
1289 case 256:
1290 case 512:
1291 break;
1292 default:
1293 return 0;
1296 return EP_ADDR_TO_PHYS_EP (logical_endpoint);
1298 #endif
1301 * udc_setup_ep - setup endpoint
1303 * Associate a physical endpoint with endpoint_instance
1305 void udc_setup_ep (struct usb_device_instance *device,
1306 unsigned int ep, struct usb_endpoint_instance *endpoint)
1308 UDCDBGA ("setting up endpoint addr %x", endpoint->endpoint_address);
1310 /* This routine gets called by bi_modinit for endpoint 0 and from
1311 * bi_config for all of the other endpoints. bi_config gets called
1312 * during the DEVICE_CREATE, DEVICE_CONFIGURED, and
1313 * DEVICE_SET_INTERFACE events. We need to reconfigure the OMAP packet
1314 * RAM after bi_config scans the selected device configuration and
1315 * initializes the endpoint structures, but before this routine enables
1316 * the OUT endpoint FIFOs. Since bi_config calls this routine in a
1317 * loop for endpoints 1 through UDC_MAX_ENDPOINTS, we reconfigure our
1318 * packet RAM here when ep==1.
1319 * I really hate to do this here, but it seems like the API exported
1320 * by the USB bus interface controller driver to the usbd-bi module
1321 * isn't quite right so there is no good place to do this.
1323 if (ep == 1) {
1324 omap1510_deconfigure_device ();
1325 omap1510_configure_device (device);
1328 if (endpoint && (ep < UDC_MAX_ENDPOINTS)) {
1329 int ep_addr = endpoint->endpoint_address;
1331 if (!ep_addr) {
1332 /* nothing to do for endpoint 0 */
1333 } else if ((ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) {
1334 /* nothing to do for IN (tx) endpoints */
1335 } else { /* OUT (rx) endpoint */
1336 if (endpoint->rcv_packetSize) {
1337 /*struct urb* urb = &(urb_out_array[ep&0xFF]); */
1338 /*urb->endpoint = endpoint; */
1339 /*urb->device = device; */
1340 /*urb->buffer_length = sizeof(urb->buffer); */
1342 /*endpoint->rcv_urb = urb; */
1343 omap1510_prepare_endpoint_for_rx (ep_addr);
1350 * udc_disable_ep - disable endpoint
1351 * @ep:
1353 * Disable specified endpoint
1355 #if 0
1356 void udc_disable_ep (unsigned int ep_addr)
1358 /*int ep_addr = PHYS_EP_TO_EP_ADDR(ep); */
1359 int ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK;
1360 struct usb_endpoint_instance *endpoint = omap1510_find_ep (ep_addr); /*udc_device->bus->endpoint_array + ep; */
1362 UDCDBGA ("disable ep_addr %d", ep_addr);
1364 if (!ep_num) {
1365 /* nothing to do for endpoint 0 */ ;
1366 } else if ((ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) {
1367 if (endpoint->tx_packetSize) {
1368 /* we have a valid tx endpoint */
1369 /*usbd_flush_tx(endpoint); */
1370 endpoint->tx_urb = NULL;
1372 } else {
1373 if (endpoint->rcv_packetSize) {
1374 /* we have a valid rx endpoint */
1375 /*usbd_flush_rcv(endpoint); */
1376 endpoint->rcv_urb = NULL;
1380 #endif
1382 /* ************************************************************************** */
1385 * udc_connected - is the USB cable connected
1387 * Return non-zero if cable is connected.
1389 #if 0
1390 int udc_connected (void)
1392 return ((inw (UDC_DEVSTAT) & UDC_ATT) == UDC_ATT);
1394 #endif
1396 /* Turn on the USB connection by enabling the pullup resistor */
1397 void udc_connect (void)
1399 UDCDBG ("connect, enable Pullup");
1400 outl (0x00000018, FUNC_MUX_CTRL_D);
1403 /* Turn off the USB connection by disabling the pullup resistor */
1404 void udc_disconnect (void)
1406 UDCDBG ("disconnect, disable Pullup");
1407 outl (0x00000000, FUNC_MUX_CTRL_D);
1410 /* ************************************************************************** */
1414 * udc_disable_interrupts - disable interrupts
1415 * switch off interrupts
1417 #if 0
1418 void udc_disable_interrupts (struct usb_device_instance *device)
1420 UDCDBG ("disabling all interrupts");
1421 outw (0, UDC_IRQ_EN);
1423 #endif
1425 /* ************************************************************************** */
1428 * udc_ep0_packetsize - return ep0 packetsize
1430 #if 0
1431 int udc_ep0_packetsize (void)
1433 return EP0_PACKETSIZE;
1435 #endif
1437 /* Switch on the UDC */
1438 void udc_enable (struct usb_device_instance *device)
1440 UDCDBGA ("enable device %p, status %d", device, device->status);
1442 /* initialize driver state variables */
1443 udc_devstat = 0;
1445 /* Save the device structure pointer */
1446 udc_device = device;
1448 /* Setup ep0 urb */
1449 if (!ep0_urb) {
1450 ep0_urb =
1451 usbd_alloc_urb (udc_device,
1452 udc_device->bus->endpoint_array);
1453 } else {
1454 serial_printf ("udc_enable: ep0_urb already allocated %p\n",
1455 ep0_urb);
1458 UDCDBG ("Check clock status");
1459 UDCREG (STATUS_REQ);
1461 /* The VBUS_MODE bit selects whether VBUS detection is done via
1462 * software (1) or hardware (0). When software detection is
1463 * selected, VBUS_CTRL selects whether USB is not connected (0)
1464 * or connected (1).
1466 outl (inl (FUNC_MUX_CTRL_0) | UDC_VBUS_CTRL | UDC_VBUS_MODE,
1467 FUNC_MUX_CTRL_0);
1468 UDCREGL (FUNC_MUX_CTRL_0);
1470 omap1510_configure_device (device);
1473 /* Switch off the UDC */
1474 void udc_disable (void)
1476 UDCDBG ("disable UDC");
1478 omap1510_deconfigure_device ();
1480 /* The VBUS_MODE bit selects whether VBUS detection is done via
1481 * software (1) or hardware (0). When software detection is
1482 * selected, VBUS_CTRL selects whether USB is not connected (0)
1483 * or connected (1).
1485 outl (inl (FUNC_MUX_CTRL_0) | UDC_VBUS_MODE, FUNC_MUX_CTRL_0);
1486 outl (inl (FUNC_MUX_CTRL_0) & ~UDC_VBUS_CTRL, FUNC_MUX_CTRL_0);
1487 UDCREGL (FUNC_MUX_CTRL_0);
1489 /* Free ep0 URB */
1490 if (ep0_urb) {
1491 /*usbd_dealloc_urb(ep0_urb); */
1492 ep0_urb = NULL;
1495 /* Reset device pointer.
1496 * We ought to do this here to balance the initialization of udc_device
1497 * in udc_enable, but some of our other exported functions get called
1498 * by the bus interface driver after udc_disable, so we have to hang on
1499 * to the device pointer to avoid a null pointer dereference. */
1500 /* udc_device = NULL; */
1504 * udc_startup - allow udc code to do any additional startup
1506 void udc_startup_events (struct usb_device_instance *device)
1508 /* The DEVICE_INIT event puts the USB device in the state STATE_INIT. */
1509 usbd_device_event_irq (device, DEVICE_INIT, 0);
1511 /* The DEVICE_CREATE event puts the USB device in the state
1512 * STATE_ATTACHED.
1514 usbd_device_event_irq (device, DEVICE_CREATE, 0);
1516 /* Some USB controller driver implementations signal
1517 * DEVICE_HUB_CONFIGURED and DEVICE_RESET events here.
1518 * DEVICE_HUB_CONFIGURED causes a transition to the state STATE_POWERED,
1519 * and DEVICE_RESET causes a transition to the state STATE_DEFAULT.
1520 * The OMAP USB client controller has the capability to detect when the
1521 * USB cable is connected to a powered USB bus via the ATT bit in the
1522 * DEVSTAT register, so we will defer the DEVICE_HUB_CONFIGURED and
1523 * DEVICE_RESET events until later.
1526 udc_enable (device);
1530 * udc_irq - do pseudo interrupts
1532 void udc_irq(void)
1534 /* Loop while we have interrupts.
1535 * If we don't do this, the input chain
1536 * polling delay is likely to miss
1537 * host requests.
1539 while (inw (UDC_IRQ_SRC) & ~UDC_SOF_Flg) {
1540 /* Handle any new IRQs */
1541 omap1510_udc_irq ();
1542 omap1510_udc_noniso_irq ();
1546 /* Flow control */
1547 void udc_set_nak(int epid)
1549 /* TODO: implement this functionality in omap1510 */
1552 void udc_unset_nak (int epid)
1554 /* TODO: implement this functionality in omap1510 */