4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
23 * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved.
27 * The CPU module for the AMD Athlon64 and Opteron processors
30 #include <sys/types.h>
31 #include <sys/cmn_err.h>
32 #include <sys/sunddi.h>
33 #include <sys/cpu_module.h>
34 #include <sys/cpu_module_ms_impl.h>
35 #include <sys/cpuvar.h>
36 #include <sys/x86_archext.h>
39 #include <sys/modctl.h>
41 #include <sys/mca_x86.h>
45 int ao_ms_support_disable
= 0;
47 static struct ao_chipshared
*ao_shared
[AO_MAX_CHIPS
];
50 * This cpu module supports AMD family 0xf revisions B/C/D/E/F/G. If
51 * a family 0xf cpu beyond the rev G model limit is detected then
52 * return ENOTSUP and let the generic x86 CPU module load instead.
54 uint_t ao_model_limit
= 0x6f;
57 ao_ms_init(cmi_hdl_t hdl
, void **datap
)
59 uint_t chipid
= cmi_hdl_chipid(hdl
);
60 struct ao_chipshared
*sp
, *osp
;
64 if (ao_ms_support_disable
|| cmi_hdl_model(hdl
) >= ao_model_limit
)
67 if (!is_x86_feature(x86_featureset
, X86FSET_MCA
))
70 if (cmi_hdl_rdmsr(hdl
, IA32_MSR_MCG_CAP
, &cap
) != CMI_SUCCESS
)
73 if (!(cap
& MCG_CAP_CTL_P
))
76 if ((cap
& MCG_CAP_COUNT_MASK
) != AMD_MCA_BANK_COUNT
) {
77 cmn_err(CE_WARN
, "Chip %d core %d has %llu MCA banks, "
78 "expected %u: disabling AMD-specific MCA support on "
79 "this CPU", chipid
, cmi_hdl_coreid(hdl
),
80 (u_longlong_t
)cap
& MCG_CAP_COUNT_MASK
,
85 ao
= *datap
= kmem_zalloc(sizeof (ao_ms_data_t
), KM_SLEEP
);
86 cmi_hdl_hold(hdl
); /* release in fini */
90 * Allocate the chipshared structure if it appears not to have been
91 * allocated already (by a sibling core). Install the newly
92 * allocated pointer atomically in case a sibling core beats
95 if ((sp
= ao_shared
[chipid
]) == NULL
) {
96 sp
= kmem_zalloc(sizeof (struct ao_chipshared
), KM_SLEEP
);
97 sp
->aos_chiprev
= cmi_hdl_chiprev(hdl
);
100 osp
= atomic_cas_ptr(&ao_shared
[chipid
], NULL
, sp
);
102 kmem_free(sp
, sizeof (struct ao_chipshared
));
106 ao
->ao_ms_shared
= sp
;
113 ao_ms_post_mpstartup(cmi_hdl_t hdl
)
115 (void) ddi_install_driver("mc-amd");
118 cms_api_ver_t _cms_api_version
= CMS_API_VERSION_2
;
120 const cms_ops_t _cms_ops
= {
121 ao_ms_init
, /* cms_init */
122 ao_ms_post_startup
, /* cms_post_startup */
123 ao_ms_post_mpstartup
, /* cms_post_mpstartup */
124 NULL
, /* cms_logout_size */
125 ao_ms_mcgctl_val
, /* cms_mcgctl_val */
126 ao_ms_bankctl_skipinit
, /* cms_bankctl_skipinit */
127 ao_ms_bankctl_val
, /* cms_bankctl_val */
128 NULL
, /* cms_bankstatus_skipinit */
129 NULL
, /* cms_bankstatus_val */
130 ao_ms_mca_init
, /* cms_mca_init */
131 ao_ms_poll_ownermask
, /* cms_poll_ownermask */
132 NULL
, /* cms_bank_logout */
133 ao_ms_error_action
, /* cms_error_action */
134 ao_ms_disp_match
, /* cms_disp_match */
135 ao_ms_ereport_class
, /* cms_ereport_class */
136 NULL
, /* cms_ereport_detector */
137 ao_ms_ereport_includestack
, /* cms_ereport_includestack */
138 ao_ms_ereport_add_logout
, /* cms_ereport_add_logout */
139 ao_ms_msrinject
, /* cms_msrinject */
143 static struct modlcpu modlcpu
= {
145 "AMD Athlon64/Opteron Model-Specific Support"
148 static struct modlinkage modlinkage
= {
157 return (mod_install(&modlinkage
));
161 _info(struct modinfo
*modinfop
)
163 return (mod_info(&modlinkage
, modinfop
));
169 return (mod_remove(&modlinkage
));