4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
22 * Copyright 2006 Sun Microsystems, Inc. All rights reserved.
23 * Use is subject to license terms.
26 #ifndef _SYS_NXGE_NXGE_ESPC_H
27 #define _SYS_NXGE_NXGE_ESPC_H
29 #pragma ident "%Z%%M% %I% %E% SMI"
35 #include <nxge_espc_hw.h>
37 #define ESPC_MAC_ADDR_0 ESPC_NCR_REGN(0)
38 #define ESPC_MAC_ADDR_1 ESPC_NCR_REGN(1)
39 #define ESPC_NUM_PORTS_MACS ESPC_NCR_REGN(2)
40 #define ESPC_MOD_STR_LEN ESPC_NCR_REGN(4)
41 #define ESPC_MOD_STR_1 ESPC_NCR_REGN(5)
42 #define ESPC_MOD_STR_2 ESPC_NCR_REGN(6)
43 #define ESPC_MOD_STR_3 ESPC_NCR_REGN(7)
44 #define ESPC_MOD_STR_4 ESPC_NCR_REGN(8)
45 #define ESPC_MOD_STR_5 ESPC_NCR_REGN(9)
46 #define ESPC_MOD_STR_6 ESPC_NCR_REGN(10)
47 #define ESPC_MOD_STR_7 ESPC_NCR_REGN(11)
48 #define ESPC_MOD_STR_8 ESPC_NCR_REGN(12)
49 #define ESPC_BD_MOD_STR_LEN ESPC_NCR_REGN(13)
50 #define ESPC_BD_MOD_STR_1 ESPC_NCR_REGN(14)
51 #define ESPC_BD_MOD_STR_2 ESPC_NCR_REGN(15)
52 #define ESPC_BD_MOD_STR_3 ESPC_NCR_REGN(16)
53 #define ESPC_BD_MOD_STR_4 ESPC_NCR_REGN(17)
54 #define ESPC_PHY_TYPE ESPC_NCR_REGN(18)
55 #define ESPC_MAX_FM_SZ ESPC_NCR_REGN(19)
56 #define ESPC_INTR_NUM ESPC_NCR_REGN(20)
57 #define ESPC_VER_IMGSZ ESPC_NCR_REGN(21)
58 #define ESPC_CHKSUM ESPC_NCR_REGN(22)
60 #define NUM_PORTS_MASK 0xff
61 #define NUM_MAC_ADDRS_MASK 0xff0000
62 #define NUM_MAC_ADDRS_SHIFT 16
63 #define MOD_STR_LEN_MASK 0xffff
64 #define BD_MOD_STR_LEN_MASK 0xffff
65 #define MAX_FM_SZ_MASK 0xffff
66 #define VER_NUM_MASK 0xffff
67 #define IMG_SZ_MASK 0xffff0000
68 #define IMG_SZ_SHIFT 16
69 #define CHKSUM_MASK 0xff
72 #define ESPC_MOD_STR(n) (ESPC_MOD_STR_1 + n*8)
73 #define MAX_MOD_STR_LEN 32
76 #define ESPC_BD_MOD_STR(n) (ESPC_BD_MOD_STR_1 + n*8)
77 #define MAX_BD_MOD_STR_LEN 16
79 #define ESC_PHY_10G_FIBER 0x0
80 #define ESC_PHY_10G_COPPER 0x1
81 #define ESC_PHY_1G_FIBER 0x2
82 #define ESC_PHY_1G_COPPER 0x3
83 #define ESC_PHY_NONE 0xf
85 #define ESC_IMG_CHKSUM_VAL 0xab
87 typedef union _mac_addr_0_t
{
91 #if defined(_BIG_ENDIAN)
92 uint32_t msw
; /* Most significant word */
93 uint32_t lsw
; /* Least significant word */
94 #elif defined(_LITTLE_ENDIAN)
95 uint32_t lsw
; /* Least significant word */
96 uint32_t msw
; /* Most significant word */
100 #if defined(_BIG_ENDIAN)
104 #if defined(_BIT_FIELDS_HTOL)
109 #elif defined(_BIT_FIELDS_LTOH)
117 #if defined(_LITTLE_ENDIAN)
123 typedef union _mac_addr_1_t
{
127 #if defined(_BIG_ENDIAN)
128 uint32_t msw
; /* Most significant word */
129 uint32_t lsw
; /* Least significant word */
130 #elif defined(_LITTLE_ENDIAN)
131 uint32_t lsw
; /* Least significant word */
132 uint32_t msw
; /* Most significant word */
136 #if defined(_BIG_ENDIAN)
140 #if defined(_BIT_FIELDS_HTOL)
144 #elif defined(_BIT_FIELDS_LTOH)
151 #if defined(_LITTLE_ENDIAN)
158 typedef union _phy_type_t
{
162 #if defined(_BIG_ENDIAN)
163 uint32_t msw
; /* Most significant word */
164 uint32_t lsw
; /* Least significant word */
165 #elif defined(_LITTLE_ENDIAN)
166 uint32_t lsw
; /* Least significant word */
167 uint32_t msw
; /* Most significant word */
171 #if defined(_BIG_ENDIAN)
175 #if defined(_BIT_FIELDS_HTOL)
176 uint32_t pt0_phy_type
: 8;
177 uint32_t pt1_phy_type
: 8;
178 uint32_t pt2_phy_type
: 8;
179 uint32_t pt3_phy_type
: 8;
180 #elif defined(_BIT_FIELDS_LTOH)
181 uint32_t pt3_phy_type
: 8;
182 uint32_t pt2_phy_type
: 8;
183 uint32_t pt1_phy_type
: 8;
184 uint32_t pt0_phy_type
: 8;
188 #if defined(_LITTLE_ENDIAN)
195 typedef union _intr_num_t
{
199 #if defined(_BIG_ENDIAN)
200 uint32_t msw
; /* Most significant word */
201 uint32_t lsw
; /* Least significant word */
202 #elif defined(_LITTLE_ENDIAN)
203 uint32_t lsw
; /* Least significant word */
204 uint32_t msw
; /* Most significant word */
208 #if defined(_BIG_ENDIAN)
212 #if defined(_BIT_FIELDS_HTOL)
213 uint32_t pt0_intr_num
: 8;
214 uint32_t pt1_intr_num
: 8;
215 uint32_t pt2_intr_num
: 8;
216 uint32_t pt3_intr_num
: 8;
217 #elif defined(_BIT_FIELDS_LTOH)
218 uint32_t pt3_intr_num
: 8;
219 uint32_t pt2_intr_num
: 8;
220 uint32_t pt1_intr_num
: 8;
221 uint32_t pt0_intr_num
: 8;
225 #if defined(_LITTLE_ENDIAN)
236 #endif /* _SYS_NXGE_NXGE_ESPC_H */