lib/libcrypto/rc4/asm/rc4-586.pl

   1 #!/usr/bin/env perl
   2
   3 # ====================================================================
   4 # [Re]written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
   5 # project. The module is, however, dual licensed under OpenSSL and
   6 # CRYPTOGAMS licenses depending on where you obtain it. For further
   7 # details see http://www.openssl.org/~appro/cryptogams/.
   8 # ====================================================================
   9
  10 # At some point it became apparent that the original SSLeay RC4
  11 # assembler implementation performs suboptimally on latest IA-32
  12 # microarchitectures. After re-tuning performance has changed as
  13 # following:
  14 #
  15 # Pentium       -10%
  16 # Pentium III   +12%
  17 # AMD           +50%(*)
  18 # P4            +250%(**)
  19 #
  20 # (*)   This number is actually a trade-off:-) It's possible to
  21 #       achieve +72%, but at the cost of -48% off PIII performance.
  22 #       In other words code performing further 13% faster on AMD
  23 #       would perform almost 2 times slower on Intel PIII...
  24 #       For reference! This code delivers ~80% of rc4-amd64.pl
  25 #       performance on the same Opteron machine.
  26 # (**)  This number requires compressed key schedule set up by
  27 #       RC4_set_key [see commentary below for further details].
  28 #
  29 #                                       <appro@fy.chalmers.se>
  30
  31 # May 2011
  32 #
  33 # Optimize for Core2 and Westmere [and incidentally Opteron]. Current
  34 # performance in cycles per processed byte (less is better) and
  35 # improvement relative to previous version of this module is:
  36 #
  37 # Pentium       10.2                    # original numbers
  38 # Pentium III   7.8(*)
  39 # Intel P4      7.5
  40 #
  41 # Opteron       6.1/+20%                # new MMX numbers
  42 # Core2         5.3/+67%(**)
  43 # Westmere      5.1/+94%(**)
  44 # Sandy Bridge  5.0/+8%
  45 # Atom          12.6/+6%
  46 #
  47 # (*)   PIII can actually deliver 6.6 cycles per byte with MMX code,
  48 #       but this specific code performs poorly on Core2. And vice
  49 #       versa, below MMX/SSE code delivering 5.8/7.1 on Core2 performs
  50 #       poorly on PIII, at 8.0/14.5:-( As PIII is not a "hot" CPU
  51 #       [anymore], I chose to discard PIII-specific code path and opt
  52 #       for original IALU-only code, which is why MMX/SSE code path
  53 #       is guarded by SSE2 bit (see below), not MMX/SSE.
  54 # (**)  Performance vs. block size on Core2 and Westmere had a maximum
  55 #       at ... 64 bytes block size. And it was quite a maximum, 40-60%
  56 #       in comparison to largest 8KB block size. Above improvement
  57 #       coefficients are for the largest block size.
  58
  59 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
  60 push(@INC,"${dir}","${dir}../../perlasm");
  61 require "x86asm.pl";
  62
  63 &asm_init($ARGV[0],"rc4-586.pl");
  64
  65 $xx="eax";
  66 $yy="ebx";
  67 $tx="ecx";
  68 $ty="edx";
  69 $inp="esi";
  70 $out="ebp";
  71 $dat="edi";
  72
  73 sub RC4_loop {
  74   my $i=shift;
  75   my $func = ($i==0)?*mov:*or;
  76
  77         &add    (&LB($yy),&LB($tx));
  78         &mov    ($ty,&DWP(0,$dat,$yy,4));
  79         &mov    (&DWP(0,$dat,$yy,4),$tx);
  80         &mov    (&DWP(0,$dat,$xx,4),$ty);
  81         &add    ($ty,$tx);
  82         &inc    (&LB($xx));
  83         &and    ($ty,0xff);
  84         &ror    ($out,8)        if ($i!=0);
  85         if ($i<3) {
  86           &mov  ($tx,&DWP(0,$dat,$xx,4));
  87         } else {
  88           &mov  ($tx,&wparam(3));       # reload [re-biased] out
  89         }
  90         &$func  ($out,&DWP(0,$dat,$ty,4));
  91 }
  92
  93 if ($alt=0) {
  94   # >20% faster on Atom and Sandy Bridge[!], 8% faster on Opteron,
  95   # but ~40% slower on Core2 and Westmere... Attempt to add movz
  96   # brings down Opteron by 25%, Atom and Sandy Bridge by 15%, yet
  97   # on Core2 with movz it's almost 20% slower than below alternative
  98   # code... Yes, it's a total mess...
  99   my @XX=($xx,$out);
 100   $RC4_loop_mmx = sub {         # SSE actually...
 101     my $i=shift;
 102     my $j=$i<=0?0:$i>>1;
 103     my $mm=$i<=0?"mm0":"mm".($i&1);
 104
 105         &add    (&LB($yy),&LB($tx));
 106         &lea    (@XX[1],&DWP(1,@XX[0]));
 107         &pxor   ("mm2","mm0")                           if ($i==0);
 108         &psllq  ("mm1",8)                               if ($i==0);
 109         &and    (@XX[1],0xff);
 110         &pxor   ("mm0","mm0")                           if ($i<=0);
 111         &mov    ($ty,&DWP(0,$dat,$yy,4));
 112         &mov    (&DWP(0,$dat,$yy,4),$tx);
 113         &pxor   ("mm1","mm2")                           if ($i==0);
 114         &mov    (&DWP(0,$dat,$XX[0],4),$ty);
 115         &add    (&LB($ty),&LB($tx));
 116         &movd   (@XX[0],"mm7")                          if ($i==0);
 117         &mov    ($tx,&DWP(0,$dat,@XX[1],4));
 118         &pxor   ("mm1","mm1")                           if ($i==1);
 119         &movq   ("mm2",&QWP(0,$inp))                    if ($i==1);
 120         &movq   (&QWP(-8,(@XX[0],$inp)),"mm1")          if ($i==0);
 121         &pinsrw ($mm,&DWP(0,$dat,$ty,4),$j);
 122
 123         push    (@XX,shift(@XX))                        if ($i>=0);
 124   }
 125 } else {
 126   # Using pinsrw here improves performane on Intel CPUs by 2-3%, but
 127   # brings down AMD by 7%...
 128   $RC4_loop_mmx = sub {
 129     my $i=shift;
 130
 131         &add    (&LB($yy),&LB($tx));
 132         &psllq  ("mm1",8*(($i-1)&7))                    if (abs($i)!=1);
 133         &mov    ($ty,&DWP(0,$dat,$yy,4));
 134         &mov    (&DWP(0,$dat,$yy,4),$tx);
 135         &mov    (&DWP(0,$dat,$xx,4),$ty);
 136         &inc    ($xx);
 137         &add    ($ty,$tx);
 138         &movz   ($xx,&LB($xx));                         # (*)
 139         &movz   ($ty,&LB($ty));                         # (*)
 140         &pxor   ("mm2",$i==1?"mm0":"mm1")               if ($i>=0);
 141         &movq   ("mm0",&QWP(0,$inp))                    if ($i<=0);
 142         &movq   (&QWP(-8,($out,$inp)),"mm2")            if ($i==0);
 143         &mov    ($tx,&DWP(0,$dat,$xx,4));
 144         &movd   ($i>0?"mm1":"mm2",&DWP(0,$dat,$ty,4));
 145
 146         # (*)   This is the key to Core2 and Westmere performance.
 147         #       Whithout movz out-of-order execution logic confuses
 148         #       itself and fails to reorder loads and stores. Problem
 149         #       appears to be fixed in Sandy Bridge...
 150   }
 151 }
 152
 153 &external_label("OPENSSL_ia32cap_P");
 154
 155 # void RC4(RC4_KEY *key,size_t len,const unsigned char *inp,unsigned char *out);
 156 &function_begin("RC4");
 157         &mov    ($dat,&wparam(0));      # load key schedule pointer
 158         &mov    ($ty, &wparam(1));      # load len
 159         &mov    ($inp,&wparam(2));      # load inp
 160         &mov    ($out,&wparam(3));      # load out
 161
 162         &xor    ($xx,$xx);              # avoid partial register stalls
 163         &xor    ($yy,$yy);
 164
 165         &cmp    ($ty,0);                # safety net
 166         &je     (&label("abort"));
 167
 168         &mov    (&LB($xx),&BP(0,$dat)); # load key->x
 169         &mov    (&LB($yy),&BP(4,$dat)); # load key->y
 170         &add    ($dat,8);
 171
 172         &lea    ($tx,&DWP(0,$inp,$ty));
 173         &sub    ($out,$inp);            # re-bias out
 174         &mov    (&wparam(1),$tx);       # save input+len
 175
 176         &inc    (&LB($xx));
 177
 178         # detect compressed key schedule...
 179         &cmp    (&DWP(256,$dat),-1);
 180         &je     (&label("RC4_CHAR"));
 181
 182         &mov    ($tx,&DWP(0,$dat,$xx,4));
 183
 184         &and    ($ty,-4);               # how many 4-byte chunks?
 185         &jz     (&label("loop1"));
 186
 187         &test   ($ty,-8);
 188         &mov    (&wparam(3),$out);      # $out as accumulator in these loops
 189         &jz     (&label("go4loop4"));
 190
 191         &picmeup($out,"OPENSSL_ia32cap_P");
 192         # check SSE2 bit [could have been MMX]
 193         &bt     (&DWP(0,$out),"\$IA32CAP_BIT0_SSE2");
 194         &jnc    (&label("go4loop4"));
 195
 196         &mov    ($out,&wparam(3))       if (!$alt);
 197         &movd   ("mm7",&wparam(3))      if ($alt);
 198         &and    ($ty,-8);
 199         &lea    ($ty,&DWP(-8,$inp,$ty));
 200         &mov    (&DWP(-4,$dat),$ty);    # save input+(len/8)*8-8
 201
 202         &$RC4_loop_mmx(-1);
 203         &jmp(&label("loop_mmx_enter"));
 204
 205         &set_label("loop_mmx",16);
 206                 &$RC4_loop_mmx(0);
 207         &set_label("loop_mmx_enter");
 208                 for     ($i=1;$i<8;$i++) { &$RC4_loop_mmx($i); }
 209                 &mov    ($ty,$yy);
 210                 &xor    ($yy,$yy);              # this is second key to Core2
 211                 &mov    (&LB($yy),&LB($ty));    # and Westmere performance...
 212                 &cmp    ($inp,&DWP(-4,$dat));
 213                 &lea    ($inp,&DWP(8,$inp));
 214         &jb     (&label("loop_mmx"));
 215
 216     if ($alt) {
 217         &movd   ($out,"mm7");
 218         &pxor   ("mm2","mm0");
 219         &psllq  ("mm1",8);
 220         &pxor   ("mm1","mm2");
 221         &movq   (&QWP(-8,$out,$inp),"mm1");
 222     } else {
 223         &psllq  ("mm1",56);
 224         &pxor   ("mm2","mm1");
 225         &movq   (&QWP(-8,$out,$inp),"mm2");
 226     }
 227         &emms   ();
 228
 229         &cmp    ($inp,&wparam(1));      # compare to input+len
 230         &je     (&label("done"));
 231         &jmp    (&label("loop1"));
 232
 233 &set_label("go4loop4",16);
 234         &lea    ($ty,&DWP(-4,$inp,$ty));
 235         &mov    (&wparam(2),$ty);       # save input+(len/4)*4-4
 236
 237         &set_label("loop4");
 238                 for ($i=0;$i<4;$i++) { RC4_loop($i); }
 239                 &ror    ($out,8);
 240                 &xor    ($out,&DWP(0,$inp));
 241                 &cmp    ($inp,&wparam(2));      # compare to input+(len/4)*4-4
 242                 &mov    (&DWP(0,$tx,$inp),$out);# $tx holds re-biased out here
 243                 &lea    ($inp,&DWP(4,$inp));
 244                 &mov    ($tx,&DWP(0,$dat,$xx,4));
 245         &jb     (&label("loop4"));
 246
 247         &cmp    ($inp,&wparam(1));      # compare to input+len
 248         &je     (&label("done"));
 249         &mov    ($out,&wparam(3));      # restore $out
 250
 251         &set_label("loop1",16);
 252                 &add    (&LB($yy),&LB($tx));
 253                 &mov    ($ty,&DWP(0,$dat,$yy,4));
 254                 &mov    (&DWP(0,$dat,$yy,4),$tx);
 255                 &mov    (&DWP(0,$dat,$xx,4),$ty);
 256                 &add    ($ty,$tx);
 257                 &inc    (&LB($xx));
 258                 &and    ($ty,0xff);
 259                 &mov    ($ty,&DWP(0,$dat,$ty,4));
 260                 &xor    (&LB($ty),&BP(0,$inp));
 261                 &lea    ($inp,&DWP(1,$inp));
 262                 &mov    ($tx,&DWP(0,$dat,$xx,4));
 263                 &cmp    ($inp,&wparam(1));      # compare to input+len
 264                 &mov    (&BP(-1,$out,$inp),&LB($ty));
 265         &jb     (&label("loop1"));
 266
 267         &jmp    (&label("done"));
 268
 269 # this is essentially Intel P4 specific codepath...
 270 &set_label("RC4_CHAR",16);
 271         &movz   ($tx,&BP(0,$dat,$xx));
 272         # strangely enough unrolled loop performs over 20% slower...
 273         &set_label("cloop1");
 274                 &add    (&LB($yy),&LB($tx));
 275                 &movz   ($ty,&BP(0,$dat,$yy));
 276                 &mov    (&BP(0,$dat,$yy),&LB($tx));
 277                 &mov    (&BP(0,$dat,$xx),&LB($ty));
 278                 &add    (&LB($ty),&LB($tx));
 279                 &movz   ($ty,&BP(0,$dat,$ty));
 280                 &add    (&LB($xx),1);
 281                 &xor    (&LB($ty),&BP(0,$inp));
 282                 &lea    ($inp,&DWP(1,$inp));
 283                 &movz   ($tx,&BP(0,$dat,$xx));
 284                 &cmp    ($inp,&wparam(1));
 285                 &mov    (&BP(-1,$out,$inp),&LB($ty));
 286         &jb     (&label("cloop1"));
 287
 288 &set_label("done");
 289         &dec    (&LB($xx));
 290         &mov    (&DWP(-4,$dat),$yy);            # save key->y
 291         &mov    (&BP(-8,$dat),&LB($xx));        # save key->x
 292 &set_label("abort");
 293 &function_end("RC4");
 294
 295 ########################################################################
 296
 297 $inp="esi";
 298 $out="edi";
 299 $idi="ebp";
 300 $ido="ecx";
 301 $idx="edx";
 302
 303 # void RC4_set_key(RC4_KEY *key,int len,const unsigned char *data);
 304 &function_begin("RC4_set_key");
 305         &mov    ($out,&wparam(0));              # load key
 306         &mov    ($idi,&wparam(1));              # load len
 307         &mov    ($inp,&wparam(2));              # load data
 308         &picmeup($idx,"OPENSSL_ia32cap_P");
 309
 310         &lea    ($out,&DWP(2*4,$out));          # &key->data
 311         &lea    ($inp,&DWP(0,$inp,$idi));       # $inp to point at the end
 312         &neg    ($idi);
 313         &xor    ("eax","eax");
 314         &mov    (&DWP(-4,$out),$idi);           # borrow key->y
 315
 316         &bt     (&DWP(0,$idx),"\$IA32CAP_BIT0_INTELP4");
 317         &jc     (&label("c1stloop"));
 318
 319 &set_label("w1stloop",16);
 320         &mov    (&DWP(0,$out,"eax",4),"eax");   # key->data[i]=i;
 321         &add    (&LB("eax"),1);                 # i++;
 322         &jnc    (&label("w1stloop"));
 323
 324         &xor    ($ido,$ido);
 325         &xor    ($idx,$idx);
 326
 327 &set_label("w2ndloop",16);
 328         &mov    ("eax",&DWP(0,$out,$ido,4));
 329         &add    (&LB($idx),&BP(0,$inp,$idi));
 330         &add    (&LB($idx),&LB("eax"));
 331         &add    ($idi,1);
 332         &mov    ("ebx",&DWP(0,$out,$idx,4));
 333         &jnz    (&label("wnowrap"));
 334           &mov  ($idi,&DWP(-4,$out));
 335         &set_label("wnowrap");
 336         &mov    (&DWP(0,$out,$idx,4),"eax");
 337         &mov    (&DWP(0,$out,$ido,4),"ebx");
 338         &add    (&LB($ido),1);
 339         &jnc    (&label("w2ndloop"));
 340 &jmp    (&label("exit"));
 341
 342 # Unlike all other x86 [and x86_64] implementations, Intel P4 core
 343 # [including EM64T] was found to perform poorly with above "32-bit" key
 344 # schedule, a.k.a. RC4_INT. Performance improvement for IA-32 hand-coded
 345 # assembler turned out to be 3.5x if re-coded for compressed 8-bit one,
 346 # a.k.a. RC4_CHAR! It's however inappropriate to just switch to 8-bit
 347 # schedule for x86[_64], because non-P4 implementations suffer from
 348 # significant performance losses then, e.g. PIII exhibits >2x
 349 # deterioration, and so does Opteron. In order to assure optimal
 350 # all-round performance, we detect P4 at run-time and set up compressed
 351 # key schedule, which is recognized by RC4 procedure.
 352
 353 &set_label("c1stloop",16);
 354         &mov    (&BP(0,$out,"eax"),&LB("eax")); # key->data[i]=i;
 355         &add    (&LB("eax"),1);                 # i++;
 356         &jnc    (&label("c1stloop"));
 357
 358         &xor    ($ido,$ido);
 359         &xor    ($idx,$idx);
 360         &xor    ("ebx","ebx");
 361
 362 &set_label("c2ndloop",16);
 363         &mov    (&LB("eax"),&BP(0,$out,$ido));
 364         &add    (&LB($idx),&BP(0,$inp,$idi));
 365         &add    (&LB($idx),&LB("eax"));
 366         &add    ($idi,1);
 367         &mov    (&LB("ebx"),&BP(0,$out,$idx));
 368         &jnz    (&label("cnowrap"));
 369           &mov  ($idi,&DWP(-4,$out));
 370         &set_label("cnowrap");
 371         &mov    (&BP(0,$out,$idx),&LB("eax"));
 372         &mov    (&BP(0,$out,$ido),&LB("ebx"));
 373         &add    (&LB($ido),1);
 374         &jnc    (&label("c2ndloop"));
 375
 376         &mov    (&DWP(256,$out),-1);            # mark schedule as compressed
 377
 378 &set_label("exit");
 379         &xor    ("eax","eax");
 380         &mov    (&DWP(-8,$out),"eax");          # key->x=0;
 381         &mov    (&DWP(-4,$out),"eax");          # key->y=0;
 382 &function_end("RC4_set_key");
 383
 384 # const char *RC4_options(void);
 385 &function_begin_B("RC4_options");
 386         &call   (&label("pic_point"));
 387 &set_label("pic_point");
 388         &blindpop("eax");
 389         &lea    ("eax",&DWP(&label("opts")."-".&label("pic_point"),"eax"));
 390         &picmeup("edx","OPENSSL_ia32cap_P");
 391         &mov    ("edx",&DWP(0,"edx"));
 392         &bt     ("edx","\$IA32CAP_BIT0_INTELP4");
 393         &jc     (&label("1xchar"));
 394         &bt     ("edx","\$IA32CAP_BIT0_SSE2");
 395         &jnc    (&label("ret"));
 396         &add    ("eax",25);
 397         &ret    ();
 398 &set_label("1xchar");
 399         &add    ("eax",12);
 400 &set_label("ret");
 401         &ret    ();
 402 &set_label("opts",64);
 403 &asciz  ("rc4(4x,int)");
 404 &asciz  ("rc4(1x,char)");
 405 &asciz  ("rc4(8x,mmx)");
 406 &asciz  ("RC4 for x86, CRYPTOGAMS by <appro\@openssl.org>");
 407 &align  (64);
 408 &function_end_B("RC4_options");
 409
 410 &asm_finish();
 411