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powernow-k8 requires that a data structure for
[wrt350n-kernel.git] / arch / i386 / kernel / cpu / cpufreq / powernow-k8.c
blob9cf7b67b8afcb5f1c254f0c42a22d3de60692bef
1 /*
2 * (c) 2003, 2004 Advanced Micro Devices, Inc.
3 * Your use of this code is subject to the terms and conditions of the
4 * GNU general public license version 2. See "COPYING" or
5 * http://www.gnu.org/licenses/gpl.html
6 *
7 * Support : mark.langsdorf@amd.com
8 *
9 * Based on the powernow-k7.c module written by Dave Jones.
10 * (C) 2003 Dave Jones <davej@codemonkey.org.uk> on behalf of SuSE Labs
11 * (C) 2004 Dominik Brodowski <linux@brodo.de>
12 * (C) 2004 Pavel Machek <pavel@suse.cz>
13 * Licensed under the terms of the GNU GPL License version 2.
14 * Based upon datasheets & sample CPUs kindly provided by AMD.
15 *
16 * Valuable input gratefully received from Dave Jones, Pavel Machek,
17 * Dominik Brodowski, and others.
18 * Originally developed by Paul Devriendt.
19 * Processor information obtained from Chapter 9 (Power and Thermal Management)
20 * of the "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD
21 * Opteron Processors" available for download from www.amd.com
22 *
23 * Tables for specific CPUs can be infrerred from
24 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/30430.pdf
25 */
26
27 #include <linux/kernel.h>
28 #include <linux/smp.h>
29 #include <linux/module.h>
30 #include <linux/init.h>
31 #include <linux/cpufreq.h>
32 #include <linux/slab.h>
33 #include <linux/string.h>
34 #include <linux/cpumask.h>
35
36 #include <asm/msr.h>
37 #include <asm/io.h>
38 #include <asm/delay.h>
39
40 #ifdef CONFIG_X86_POWERNOW_K8_ACPI
41 #include <linux/acpi.h>
42 #include <acpi/processor.h>
43 #endif
44
45 #define PFX "powernow-k8: "
46 #define BFX PFX "BIOS error: "
47 #define VERSION "version 1.40.4"
48 #include "powernow-k8.h"
49
50 /* serialize freq changes */
51 static DECLARE_MUTEX(fidvid_sem);
52
53 static struct powernow_k8_data *powernow_data[NR_CPUS];
54
55 #ifndef CONFIG_SMP
56 static cpumask_t cpu_core_map[1];
57 #endif
58
59 /* Return a frequency in MHz, given an input fid */
60 static u32 find_freq_from_fid(u32 fid)
61 {
62 return 800 + (fid * 100);
63 }
64
65 /* Return a frequency in KHz, given an input fid */
66 static u32 find_khz_freq_from_fid(u32 fid)
67 {
68 return 1000 * find_freq_from_fid(fid);
69 }
70
71 /* Return a voltage in miliVolts, given an input vid */
72 static u32 find_millivolts_from_vid(struct powernow_k8_data *data, u32 vid)
73 {
74 return 1550-vid*25;
75 }
76
77 /* Return the vco fid for an input fid
78 *
79 * Each "low" fid has corresponding "high" fid, and you can get to "low" fids
80 * only from corresponding high fids. This returns "high" fid corresponding to
81 * "low" one.
82 */
83 static u32 convert_fid_to_vco_fid(u32 fid)
84 {
85 if (fid < HI_FID_TABLE_BOTTOM) {
86 return 8 + (2 * fid);
87 } else {
88 return fid;
89 }
90 }
91
92 /*
93 * Return 1 if the pending bit is set. Unless we just instructed the processor
94 * to transition to a new state, seeing this bit set is really bad news.
95 */
96 static int pending_bit_stuck(void)
97 {
98 u32 lo, hi;
99
100 rdmsr(MSR_FIDVID_STATUS, lo, hi);
101 return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0;
102 }
103
104 /*
105 * Update the global current fid / vid values from the status msr.
106 * Returns 1 on error.
107 */
108 static int query_current_values_with_pending_wait(struct powernow_k8_data *data)
109 {
110 u32 lo, hi;
111 u32 i = 0;
112
113 lo = MSR_S_LO_CHANGE_PENDING;
114 while (lo & MSR_S_LO_CHANGE_PENDING) {
115 if (i++ > 0x1000000) {
116 printk(KERN_ERR PFX "detected change pending stuck\n");
117 return 1;
118 }
119 rdmsr(MSR_FIDVID_STATUS, lo, hi);
120 }
121
122 data->currvid = hi & MSR_S_HI_CURRENT_VID;
123 data->currfid = lo & MSR_S_LO_CURRENT_FID;
124
125 return 0;
126 }
127
128 /* the isochronous relief time */
129 static void count_off_irt(struct powernow_k8_data *data)
130 {
131 udelay((1 << data->irt) * 10);
132 return;
133 }
134
135 /* the voltage stabalization time */
136 static void count_off_vst(struct powernow_k8_data *data)
137 {
138 udelay(data->vstable * VST_UNITS_20US);
139 return;
140 }
141
142 /* need to init the control msr to a safe value (for each cpu) */
143 static void fidvid_msr_init(void)
144 {
145 u32 lo, hi;
146 u8 fid, vid;
147
148 rdmsr(MSR_FIDVID_STATUS, lo, hi);
149 vid = hi & MSR_S_HI_CURRENT_VID;
150 fid = lo & MSR_S_LO_CURRENT_FID;
151 lo = fid | (vid << MSR_C_LO_VID_SHIFT);
152 hi = MSR_C_HI_STP_GNT_BENIGN;
153 dprintk("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi);
154 wrmsr(MSR_FIDVID_CTL, lo, hi);
155 }
156
157
158 /* write the new fid value along with the other control fields to the msr */
159 static int write_new_fid(struct powernow_k8_data *data, u32 fid)
160 {
161 u32 lo;
162 u32 savevid = data->currvid;
163
164 if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) {
165 printk(KERN_ERR PFX "internal error - overflow on fid write\n");
166 return 1;
167 }
168
169 lo = fid | (data->currvid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID;
170
171 dprintk("writing fid 0x%x, lo 0x%x, hi 0x%x\n",
172 fid, lo, data->plllock * PLL_LOCK_CONVERSION);
173
174 wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION);
175
176 if (query_current_values_with_pending_wait(data))
177 return 1;
178
179 count_off_irt(data);
180
181 if (savevid != data->currvid) {
182 printk(KERN_ERR PFX "vid change on fid trans, old 0x%x, new 0x%x\n",
183 savevid, data->currvid);
184 return 1;
185 }
186
187 if (fid != data->currfid) {
188 printk(KERN_ERR PFX "fid trans failed, fid 0x%x, curr 0x%x\n", fid,
189 data->currfid);
190 return 1;
191 }
192
193 return 0;
194 }
195
196 /* Write a new vid to the hardware */
197 static int write_new_vid(struct powernow_k8_data *data, u32 vid)
198 {
199 u32 lo;
200 u32 savefid = data->currfid;
201
202 if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) {
203 printk(KERN_ERR PFX "internal error - overflow on vid write\n");
204 return 1;
205 }
206
207 lo = data->currfid | (vid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID;
208
209 dprintk("writing vid 0x%x, lo 0x%x, hi 0x%x\n",
210 vid, lo, STOP_GRANT_5NS);
211
212 wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS);
213
214 if (query_current_values_with_pending_wait(data))
215 return 1;
216
217 if (savefid != data->currfid) {
218 printk(KERN_ERR PFX "fid changed on vid trans, old 0x%x new 0x%x\n",
219 savefid, data->currfid);
220 return 1;
221 }
222
223 if (vid != data->currvid) {
224 printk(KERN_ERR PFX "vid trans failed, vid 0x%x, curr 0x%x\n", vid,
225 data->currvid);
226 return 1;
227 }
228
229 return 0;
230 }
231
232 /*
233 * Reduce the vid by the max of step or reqvid.
234 * Decreasing vid codes represent increasing voltages:
235 * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of 0x1f is off.
236 */
237 static int decrease_vid_code_by_step(struct powernow_k8_data *data, u32 reqvid, u32 step)
238 {
239 if ((data->currvid - reqvid) > step)
240 reqvid = data->currvid - step;
241
242 if (write_new_vid(data, reqvid))
243 return 1;
244
245 count_off_vst(data);
246
247 return 0;
248 }
249
250 /* Change the fid and vid, by the 3 phases. */
251 static int transition_fid_vid(struct powernow_k8_data *data, u32 reqfid, u32 reqvid)
252 {
253 if (core_voltage_pre_transition(data, reqvid))
254 return 1;
255
256 if (core_frequency_transition(data, reqfid))
257 return 1;
258
259 if (core_voltage_post_transition(data, reqvid))
260 return 1;
261
262 if (query_current_values_with_pending_wait(data))
263 return 1;
264
265 if ((reqfid != data->currfid) || (reqvid != data->currvid)) {
266 printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, curr 0x%x 0x%x\n",
267 smp_processor_id(),
268 reqfid, reqvid, data->currfid, data->currvid);
269 return 1;
270 }
271
272 dprintk("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n",
273 smp_processor_id(), data->currfid, data->currvid);
274
275 return 0;
276 }
277
278 /* Phase 1 - core voltage transition ... setup voltage */
279 static int core_voltage_pre_transition(struct powernow_k8_data *data, u32 reqvid)
280 {
281 u32 rvosteps = data->rvo;
282 u32 savefid = data->currfid;
283 u32 maxvid, lo;
284
285 dprintk("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, reqvid 0x%x, rvo 0x%x\n",
286 smp_processor_id(),
287 data->currfid, data->currvid, reqvid, data->rvo);
288
289 rdmsr(MSR_FIDVID_STATUS, lo, maxvid);
290 maxvid = 0x1f & (maxvid >> 16);
291 dprintk("ph1 maxvid=0x%x\n", maxvid);
292 if (reqvid < maxvid) /* lower numbers are higher voltages */
293 reqvid = maxvid;
294
295 while (data->currvid > reqvid) {
296 dprintk("ph1: curr 0x%x, req vid 0x%x\n",
297 data->currvid, reqvid);
298 if (decrease_vid_code_by_step(data, reqvid, data->vidmvs))
299 return 1;
300 }
301
302 while ((rvosteps > 0) && ((data->rvo + data->currvid) > reqvid)) {
303 if (data->currvid == maxvid) {
304 rvosteps = 0;
305 } else {
306 dprintk("ph1: changing vid for rvo, req 0x%x\n",
307 data->currvid - 1);
308 if (decrease_vid_code_by_step(data, data->currvid - 1, 1))
309 return 1;
310 rvosteps--;
311 }
312 }
313
314 if (query_current_values_with_pending_wait(data))
315 return 1;
316
317 if (savefid != data->currfid) {
318 printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n", data->currfid);
319 return 1;
320 }
321
322 dprintk("ph1 complete, currfid 0x%x, currvid 0x%x\n",
323 data->currfid, data->currvid);
324
325 return 0;
326 }
327
328 /* Phase 2 - core frequency transition */
329 static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
330 {
331 u32 vcoreqfid, vcocurrfid, vcofiddiff, savevid = data->currvid;
332
333 if ((reqfid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) {
334 printk(KERN_ERR PFX "ph2: illegal lo-lo transition 0x%x 0x%x\n",
335 reqfid, data->currfid);
336 return 1;
337 }
338
339 if (data->currfid == reqfid) {
340 printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n", data->currfid);
341 return 0;
342 }
343
344 dprintk("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, reqfid 0x%x\n",
345 smp_processor_id(),
346 data->currfid, data->currvid, reqfid);
347
348 vcoreqfid = convert_fid_to_vco_fid(reqfid);
349 vcocurrfid = convert_fid_to_vco_fid(data->currfid);
350 vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
351 : vcoreqfid - vcocurrfid;
352
353 while (vcofiddiff > 2) {
354 if (reqfid > data->currfid) {
355 if (data->currfid > LO_FID_TABLE_TOP) {
356 if (write_new_fid(data, data->currfid + 2)) {
357 return 1;
358 }
359 } else {
360 if (write_new_fid
361 (data, 2 + convert_fid_to_vco_fid(data->currfid))) {
362 return 1;
363 }
364 }
365 } else {
366 if (write_new_fid(data, data->currfid - 2))
367 return 1;
368 }
369
370 vcocurrfid = convert_fid_to_vco_fid(data->currfid);
371 vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
372 : vcoreqfid - vcocurrfid;
373 }
374
375 if (write_new_fid(data, reqfid))
376 return 1;
377
378 if (query_current_values_with_pending_wait(data))
379 return 1;
380
381 if (data->currfid != reqfid) {
382 printk(KERN_ERR PFX
383 "ph2: mismatch, failed fid transition, curr 0x%x, req 0x%x\n",
384 data->currfid, reqfid);
385 return 1;
386 }
387
388 if (savevid != data->currvid) {
389 printk(KERN_ERR PFX "ph2: vid changed, save 0x%x, curr 0x%x\n",
390 savevid, data->currvid);
391 return 1;
392 }
393
394 dprintk("ph2 complete, currfid 0x%x, currvid 0x%x\n",
395 data->currfid, data->currvid);
396
397 return 0;
398 }
399
400 /* Phase 3 - core voltage transition flow ... jump to the final vid. */
401 static int core_voltage_post_transition(struct powernow_k8_data *data, u32 reqvid)
402 {
403 u32 savefid = data->currfid;
404 u32 savereqvid = reqvid;
405
406 dprintk("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n",
407 smp_processor_id(),
408 data->currfid, data->currvid);
409
410 if (reqvid != data->currvid) {
411 if (write_new_vid(data, reqvid))
412 return 1;
413
414 if (savefid != data->currfid) {
415 printk(KERN_ERR PFX
416 "ph3: bad fid change, save 0x%x, curr 0x%x\n",
417 savefid, data->currfid);
418 return 1;
419 }
420
421 if (data->currvid != reqvid) {
422 printk(KERN_ERR PFX
423 "ph3: failed vid transition\n, req 0x%x, curr 0x%x",
424 reqvid, data->currvid);
425 return 1;
426 }
427 }
428
429 if (query_current_values_with_pending_wait(data))
430 return 1;
431
432 if (savereqvid != data->currvid) {
433 dprintk("ph3 failed, currvid 0x%x\n", data->currvid);
434 return 1;
435 }
436
437 if (savefid != data->currfid) {
438 dprintk("ph3 failed, currfid changed 0x%x\n",
439 data->currfid);
440 return 1;
441 }
442
443 dprintk("ph3 complete, currfid 0x%x, currvid 0x%x\n",
444 data->currfid, data->currvid);
445
446 return 0;
447 }
448
449 static int check_supported_cpu(unsigned int cpu)
450 {
451 cpumask_t oldmask = CPU_MASK_ALL;
452 u32 eax, ebx, ecx, edx;
453 unsigned int rc = 0;
454
455 oldmask = current->cpus_allowed;
456 set_cpus_allowed(current, cpumask_of_cpu(cpu));
457 schedule();
458
459 if (smp_processor_id() != cpu) {
460 printk(KERN_ERR "limiting to cpu %u failed\n", cpu);
461 goto out;
462 }
463
464 if (current_cpu_data.x86_vendor != X86_VENDOR_AMD)
465 goto out;
466
467 eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
468 if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) ||
469 ((eax & CPUID_XFAM) != CPUID_XFAM_K8) ||
470 ((eax & CPUID_XMOD) > CPUID_XMOD_REV_E)) {
471 printk(KERN_INFO PFX "Processor cpuid %x not supported\n", eax);
472 goto out;
473 }
474
475 eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES);
476 if (eax < CPUID_FREQ_VOLT_CAPABILITIES) {
477 printk(KERN_INFO PFX
478 "No frequency change capabilities detected\n");
479 goto out;
480 }
481
482 cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
483 if ((edx & P_STATE_TRANSITION_CAPABLE) != P_STATE_TRANSITION_CAPABLE) {
484 printk(KERN_INFO PFX "Power state transitions not supported\n");
485 goto out;
486 }
487
488 rc = 1;
489
490 out:
491 set_cpus_allowed(current, oldmask);
492 schedule();
493 return rc;
494
495 }
496
497 static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid)
498 {
499 unsigned int j;
500 u8 lastfid = 0xff;
501
502 for (j = 0; j < data->numps; j++) {
503 if (pst[j].vid > LEAST_VID) {
504 printk(KERN_ERR PFX "vid %d invalid : 0x%x\n", j, pst[j].vid);
505 return -EINVAL;
506 }
507 if (pst[j].vid < data->rvo) { /* vid + rvo >= 0 */
508 printk(KERN_ERR BFX "0 vid exceeded with pstate %d\n", j);
509 return -ENODEV;
510 }
511 if (pst[j].vid < maxvid + data->rvo) { /* vid + rvo >= maxvid */
512 printk(KERN_ERR BFX "maxvid exceeded with pstate %d\n", j);
513 return -ENODEV;
514 }
515 if ((pst[j].fid > MAX_FID)
516 || (pst[j].fid & 1)
517 || (j && (pst[j].fid < HI_FID_TABLE_BOTTOM))) {
518 /* Only first fid is allowed to be in "low" range */
519 printk(KERN_ERR PFX "two low fids - %d : 0x%x\n", j, pst[j].fid);
520 return -EINVAL;
521 }
522 if (pst[j].fid < lastfid)
523 lastfid = pst[j].fid;
524 }
525 if (lastfid & 1) {
526 printk(KERN_ERR PFX "lastfid invalid\n");
527 return -EINVAL;
528 }
529 if (lastfid > LO_FID_TABLE_TOP)
530 printk(KERN_INFO PFX "first fid not from lo freq table\n");
531
532 return 0;
533 }
534
535 static void print_basics(struct powernow_k8_data *data)
536 {
537 int j;
538 for (j = 0; j < data->numps; j++) {
539 if (data->powernow_table[j].frequency != CPUFREQ_ENTRY_INVALID)
540 printk(KERN_INFO PFX " %d : fid 0x%x (%d MHz), vid 0x%x (%d mV)\n", j,
541 data->powernow_table[j].index & 0xff,
542 data->powernow_table[j].frequency/1000,
543 data->powernow_table[j].index >> 8,
544 find_millivolts_from_vid(data, data->powernow_table[j].index >> 8));
545 }
546 if (data->batps)
547 printk(KERN_INFO PFX "Only %d pstates on battery\n", data->batps);
548 }
549
550 static int fill_powernow_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid)
551 {
552 struct cpufreq_frequency_table *powernow_table;
553 unsigned int j;
554
555 if (data->batps) { /* use ACPI support to get full speed on mains power */
556 printk(KERN_WARNING PFX "Only %d pstates usable (use ACPI driver for full range\n", data->batps);
557 data->numps = data->batps;
558 }
559
560 for ( j=1; j<data->numps; j++ ) {
561 if (pst[j-1].fid >= pst[j].fid) {
562 printk(KERN_ERR PFX "PST out of sequence\n");
563 return -EINVAL;
564 }
565 }
566
567 if (data->numps < 2) {
568 printk(KERN_ERR PFX "no p states to transition\n");
569 return -ENODEV;
570 }
571
572 if (check_pst_table(data, pst, maxvid))
573 return -EINVAL;
574
575 powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
576 * (data->numps + 1)), GFP_KERNEL);
577 if (!powernow_table) {
578 printk(KERN_ERR PFX "powernow_table memory alloc failure\n");
579 return -ENOMEM;
580 }
581
582 for (j = 0; j < data->numps; j++) {
583 powernow_table[j].index = pst[j].fid; /* lower 8 bits */
584 powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */
585 powernow_table[j].frequency = find_khz_freq_from_fid(pst[j].fid);
586 }
587 powernow_table[data->numps].frequency = CPUFREQ_TABLE_END;
588 powernow_table[data->numps].index = 0;
589
590 if (query_current_values_with_pending_wait(data)) {
591 kfree(powernow_table);
592 return -EIO;
593 }
594
595 dprintk("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid);
596 data->powernow_table = powernow_table;
597 print_basics(data);
598
599 for (j = 0; j < data->numps; j++)
600 if ((pst[j].fid==data->currfid) && (pst[j].vid==data->currvid))
601 return 0;
602
603 dprintk("currfid/vid do not match PST, ignoring\n");
604 return 0;
605 }
606
607 /* Find and validate the PSB/PST table in BIOS. */
608 static int find_psb_table(struct powernow_k8_data *data)
609 {
610 struct psb_s *psb;
611 unsigned int i;
612 u32 mvs;
613 u8 maxvid;
614 u32 cpst = 0;
615 u32 thiscpuid;
616
617 for (i = 0xc0000; i < 0xffff0; i += 0x10) {
618 /* Scan BIOS looking for the signature. */
619 /* It can not be at ffff0 - it is too big. */
620
621 psb = phys_to_virt(i);
622 if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0)
623 continue;
624
625 dprintk("found PSB header at 0x%p\n", psb);
626
627 dprintk("table vers: 0x%x\n", psb->tableversion);
628 if (psb->tableversion != PSB_VERSION_1_4) {
629 printk(KERN_INFO BFX "PSB table is not v1.4\n");
630 return -ENODEV;
631 }
632
633 dprintk("flags: 0x%x\n", psb->flags1);
634 if (psb->flags1) {
635 printk(KERN_ERR BFX "unknown flags\n");
636 return -ENODEV;
637 }
638
639 data->vstable = psb->vstable;
640 dprintk("voltage stabilization time: %d(*20us)\n", data->vstable);
641
642 dprintk("flags2: 0x%x\n", psb->flags2);
643 data->rvo = psb->flags2 & 3;
644 data->irt = ((psb->flags2) >> 2) & 3;
645 mvs = ((psb->flags2) >> 4) & 3;
646 data->vidmvs = 1 << mvs;
647 data->batps = ((psb->flags2) >> 6) & 3;
648
649 dprintk("ramp voltage offset: %d\n", data->rvo);
650 dprintk("isochronous relief time: %d\n", data->irt);
651 dprintk("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs);
652
653 dprintk("numpst: 0x%x\n", psb->num_tables);
654 cpst = psb->num_tables;
655 if ((psb->cpuid == 0x00000fc0) || (psb->cpuid == 0x00000fe0) ){
656 thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
657 if ((thiscpuid == 0x00000fc0) || (thiscpuid == 0x00000fe0) ) {
658 cpst = 1;
659 }
660 }
661 if (cpst != 1) {
662 printk(KERN_ERR BFX "numpst must be 1\n");
663 return -ENODEV;
664 }
665
666 data->plllock = psb->plllocktime;
667 dprintk("plllocktime: 0x%x (units 1us)\n", psb->plllocktime);
668 dprintk("maxfid: 0x%x\n", psb->maxfid);
669 dprintk("maxvid: 0x%x\n", psb->maxvid);
670 maxvid = psb->maxvid;
671
672 data->numps = psb->numps;
673 dprintk("numpstates: 0x%x\n", data->numps);
674 return fill_powernow_table(data, (struct pst_s *)(psb+1), maxvid);
675 }
676 /*
677 * If you see this message, complain to BIOS manufacturer. If
678 * he tells you "we do not support Linux" or some similar
679 * nonsense, remember that Windows 2000 uses the same legacy
680 * mechanism that the old Linux PSB driver uses. Tell them it
681 * is broken with Windows 2000.
682 *
683 * The reference to the AMD documentation is chapter 9 in the
684 * BIOS and Kernel Developer's Guide, which is available on
685 * www.amd.com
686 */
687 printk(KERN_INFO PFX "BIOS error - no PSB or ACPI _PSS objects\n");
688 return -ENODEV;
689 }
690
691 #ifdef CONFIG_X86_POWERNOW_K8_ACPI
692 static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index)
693 {
694 if (!data->acpi_data.state_count)
695 return;
696
697 data->irt = (data->acpi_data.states[index].control >> IRT_SHIFT) & IRT_MASK;
698 data->rvo = (data->acpi_data.states[index].control >> RVO_SHIFT) & RVO_MASK;
699 data->plllock = (data->acpi_data.states[index].control >> PLL_L_SHIFT) & PLL_L_MASK;
700 data->vidmvs = 1 << ((data->acpi_data.states[index].control >> MVS_SHIFT) & MVS_MASK);
701 data->vstable = (data->acpi_data.states[index].control >> VST_SHIFT) & VST_MASK;
702 }
703
704 static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
705 {
706 int i;
707 int cntlofreq = 0;
708 struct cpufreq_frequency_table *powernow_table;
709
710 if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) {
711 dprintk("register performance failed: bad ACPI data\n");
712 return -EIO;
713 }
714
715 /* verify the data contained in the ACPI structures */
716 if (data->acpi_data.state_count <= 1) {
717 dprintk("No ACPI P-States\n");
718 goto err_out;
719 }
720
721 if ((data->acpi_data.control_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
722 (data->acpi_data.status_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
723 dprintk("Invalid control/status registers (%x - %x)\n",
724 data->acpi_data.control_register.space_id,
725 data->acpi_data.status_register.space_id);
726 goto err_out;
727 }
728
729 /* fill in data->powernow_table */
730 powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
731 * (data->acpi_data.state_count + 1)), GFP_KERNEL);
732 if (!powernow_table) {
733 dprintk("powernow_table memory alloc failure\n");
734 goto err_out;
735 }
736
737 for (i = 0; i < data->acpi_data.state_count; i++) {
738 u32 fid = data->acpi_data.states[i].control & FID_MASK;
739 u32 vid = (data->acpi_data.states[i].control >> VID_SHIFT) & VID_MASK;
740
741 dprintk(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid);
742
743 powernow_table[i].index = fid; /* lower 8 bits */
744 powernow_table[i].index |= (vid << 8); /* upper 8 bits */
745 powernow_table[i].frequency = find_khz_freq_from_fid(fid);
746
747 /* verify frequency is OK */
748 if ((powernow_table[i].frequency > (MAX_FREQ * 1000)) ||
749 (powernow_table[i].frequency < (MIN_FREQ * 1000))) {
750 dprintk("invalid freq %u kHz, ignoring\n", powernow_table[i].frequency);
751 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
752 continue;
753 }
754
755 /* verify voltage is OK - BIOSs are using "off" to indicate invalid */
756 if (vid == 0x1f) {
757 dprintk("invalid vid %u, ignoring\n", vid);
758 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
759 continue;
760 }
761
762 /* verify only 1 entry from the lo frequency table */
763 if (fid < HI_FID_TABLE_BOTTOM) {
764 if (cntlofreq) {
765 /* if both entries are the same, ignore this
766 * one...
767 */
768 if ((powernow_table[i].frequency != powernow_table[cntlofreq].frequency) ||
769 (powernow_table[i].index != powernow_table[cntlofreq].index)) {
770 printk(KERN_ERR PFX "Too many lo freq table entries\n");
771 goto err_out_mem;
772 }
773
774 dprintk("double low frequency table entry, ignoring it.\n");
775 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
776 continue;
777 } else
778 cntlofreq = i;
779 }
780
781 if (powernow_table[i].frequency != (data->acpi_data.states[i].core_frequency * 1000)) {
782 printk(KERN_INFO PFX "invalid freq entries %u kHz vs. %u kHz\n",
783 powernow_table[i].frequency,
784 (unsigned int) (data->acpi_data.states[i].core_frequency * 1000));
785 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
786 continue;
787 }
788 }
789
790 powernow_table[data->acpi_data.state_count].frequency = CPUFREQ_TABLE_END;
791 powernow_table[data->acpi_data.state_count].index = 0;
792 data->powernow_table = powernow_table;
793
794 /* fill in data */
795 data->numps = data->acpi_data.state_count;
796 print_basics(data);
797 powernow_k8_acpi_pst_values(data, 0);
798
799 /* notify BIOS that we exist */
800 acpi_processor_notify_smm(THIS_MODULE);
801
802 return 0;
803
804 err_out_mem:
805 kfree(powernow_table);
806
807 err_out:
808 acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
809
810 /* data->acpi_data.state_count informs us at ->exit() whether ACPI was used */
811 data->acpi_data.state_count = 0;
812
813 return -ENODEV;
814 }
815
816 static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data)
817 {
818 if (data->acpi_data.state_count)
819 acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
820 }
821
822 #else
823 static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) { return -ENODEV; }
824 static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) { return; }
825 static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index) { return; }
826 #endif /* CONFIG_X86_POWERNOW_K8_ACPI */
827
828 /* Take a frequency, and issue the fid/vid transition command */
829 static int transition_frequency(struct powernow_k8_data *data, unsigned int index)
830 {
831 u32 fid;
832 u32 vid;
833 int res, i;
834 struct cpufreq_freqs freqs;
835
836 dprintk("cpu %d transition to index %u\n", smp_processor_id(), index);
837
838 /* fid are the lower 8 bits of the index we stored into
839 * the cpufreq frequency table in find_psb_table, vid are
840 * the upper 8 bits.
841 */
842
843 fid = data->powernow_table[index].index & 0xFF;
844 vid = (data->powernow_table[index].index & 0xFF00) >> 8;
845
846 dprintk("table matched fid 0x%x, giving vid 0x%x\n", fid, vid);
847
848 if (query_current_values_with_pending_wait(data))
849 return 1;
850
851 if ((data->currvid == vid) && (data->currfid == fid)) {
852 dprintk("target matches current values (fid 0x%x, vid 0x%x)\n",
853 fid, vid);
854 return 0;
855 }
856
857 if ((fid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) {
858 printk(KERN_ERR PFX
859 "ignoring illegal change in lo freq table-%x to 0x%x\n",
860 data->currfid, fid);
861 return 1;
862 }
863
864 dprintk("cpu %d, changing to fid 0x%x, vid 0x%x\n",
865 smp_processor_id(), fid, vid);
866
867 freqs.cpu = data->cpu;
868 freqs.old = find_khz_freq_from_fid(data->currfid);
869 freqs.new = find_khz_freq_from_fid(fid);
870 for_each_cpu_mask(i, cpu_core_map[data->cpu]) {
871 freqs.cpu = i;
872 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
873 }
874
875 res = transition_fid_vid(data, fid, vid);
876
877 freqs.new = find_khz_freq_from_fid(data->currfid);
878 for_each_cpu_mask(i, cpu_core_map[data->cpu]) {
879 freqs.cpu = i;
880 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
881 }
882 return res;
883 }
884
885 /* Driver entry point to switch to the target frequency */
886 static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsigned relation)
887 {
888 cpumask_t oldmask = CPU_MASK_ALL;
889 struct powernow_k8_data *data = powernow_data[pol->cpu];
890 u32 checkfid = data->currfid;
891 u32 checkvid = data->currvid;
892 unsigned int newstate;
893 int ret = -EIO;
894 int i;
895
896 /* only run on specific CPU from here on */
897 oldmask = current->cpus_allowed;
898 set_cpus_allowed(current, cpumask_of_cpu(pol->cpu));
899 schedule();
900
901 if (smp_processor_id() != pol->cpu) {
902 printk(KERN_ERR "limiting to cpu %u failed\n", pol->cpu);
903 goto err_out;
904 }
905
906 if (pending_bit_stuck()) {
907 printk(KERN_ERR PFX "failing targ, change pending bit set\n");
908 goto err_out;
909 }
910
911 dprintk("targ: cpu %d, %d kHz, min %d, max %d, relation %d\n",
912 pol->cpu, targfreq, pol->min, pol->max, relation);
913
914 if (query_current_values_with_pending_wait(data)) {
915 ret = -EIO;
916 goto err_out;
917 }
918
919 dprintk("targ: curr fid 0x%x, vid 0x%x\n",
920 data->currfid, data->currvid);
921
922 if ((checkvid != data->currvid) || (checkfid != data->currfid)) {
923 printk(KERN_INFO PFX
924 "error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n",
925 checkfid, data->currfid, checkvid, data->currvid);
926 }
927
928 if (cpufreq_frequency_table_target(pol, data->powernow_table, targfreq, relation, &newstate))
929 goto err_out;
930
931 down(&fidvid_sem);
932
933 for_each_cpu_mask(i, cpu_core_map[pol->cpu]) {
934 /* make sure the sibling is initialized */
935 if (!powernow_data[i]) {
936 ret = 0;
937 up(&fidvid_sem);
938 goto err_out;
939 }
940 }
941
942 powernow_k8_acpi_pst_values(data, newstate);
943
944 if (transition_frequency(data, newstate)) {
945 printk(KERN_ERR PFX "transition frequency failed\n");
946 ret = 1;
947 up(&fidvid_sem);
948 goto err_out;
949 }
950
951 /* Update all the fid/vids of our siblings */
952 for_each_cpu_mask(i, cpu_core_map[pol->cpu]) {
953 powernow_data[i]->currvid = data->currvid;
954 powernow_data[i]->currfid = data->currfid;
955 }
956 up(&fidvid_sem);
957
958 pol->cur = find_khz_freq_from_fid(data->currfid);
959 ret = 0;
960
961 err_out:
962 set_cpus_allowed(current, oldmask);
963 schedule();
964
965 return ret;
966 }
967
968 /* Driver entry point to verify the policy and range of frequencies */
969 static int powernowk8_verify(struct cpufreq_policy *pol)
970 {
971 struct powernow_k8_data *data = powernow_data[pol->cpu];
972
973 return cpufreq_frequency_table_verify(pol, data->powernow_table);
974 }
975
976 /* per CPU init entry point to the driver */
977 static int __init powernowk8_cpu_init(struct cpufreq_policy *pol)
978 {
979 struct powernow_k8_data *data;
980 cpumask_t oldmask = CPU_MASK_ALL;
981 int rc, i;
982
983 if (!check_supported_cpu(pol->cpu))
984 return -ENODEV;
985
986 data = kmalloc(sizeof(struct powernow_k8_data), GFP_KERNEL);
987 if (!data) {
988 printk(KERN_ERR PFX "unable to alloc powernow_k8_data");
989 return -ENOMEM;
990 }
991 memset(data,0,sizeof(struct powernow_k8_data));
992
993 data->cpu = pol->cpu;
994
995 if (powernow_k8_cpu_init_acpi(data)) {
996 /*
997 * Use the PSB BIOS structure. This is only availabe on
998 * an UP version, and is deprecated by AMD.
999 */
1000
1001 if ((num_online_cpus() != 1) || (num_possible_cpus() != 1)) {
1002 printk(KERN_ERR PFX "MP systems not supported by PSB BIOS structure\n");
1003 kfree(data);
1004 return -ENODEV;
1005 }
1006 if (pol->cpu != 0) {
1007 printk(KERN_ERR PFX "init not cpu 0\n");
1008 kfree(data);
1009 return -ENODEV;
1010 }
1011 rc = find_psb_table(data);
1012 if (rc) {
1013 kfree(data);
1014 return -ENODEV;
1015 }
1016 }
1017
1018 /* only run on specific CPU from here on */
1019 oldmask = current->cpus_allowed;
1020 set_cpus_allowed(current, cpumask_of_cpu(pol->cpu));
1021 schedule();
1022
1023 if (smp_processor_id() != pol->cpu) {
1024 printk(KERN_ERR "limiting to cpu %u failed\n", pol->cpu);
1025 goto err_out;
1026 }
1027
1028 if (pending_bit_stuck()) {
1029 printk(KERN_ERR PFX "failing init, change pending bit set\n");
1030 goto err_out;
1031 }
1032
1033 if (query_current_values_with_pending_wait(data))
1034 goto err_out;
1035
1036 fidvid_msr_init();
1037
1038 /* run on any CPU again */
1039 set_cpus_allowed(current, oldmask);
1040 schedule();
1041
1042 pol->governor = CPUFREQ_DEFAULT_GOVERNOR;
1043 pol->cpus = cpu_core_map[pol->cpu];
1044
1045 /* Take a crude guess here.
1046 * That guess was in microseconds, so multiply with 1000 */
1047 pol->cpuinfo.transition_latency = (((data->rvo + 8) * data->vstable * VST_UNITS_20US)
1048 + (3 * (1 << data->irt) * 10)) * 1000;
1049
1050 pol->cur = find_khz_freq_from_fid(data->currfid);
1051 dprintk("policy current frequency %d kHz\n", pol->cur);
1052
1053 /* min/max the cpu is capable of */
1054 if (cpufreq_frequency_table_cpuinfo(pol, data->powernow_table)) {
1055 printk(KERN_ERR PFX "invalid powernow_table\n");
1056 powernow_k8_cpu_exit_acpi(data);
1057 kfree(data->powernow_table);
1058 kfree(data);
1059 return -EINVAL;
1060 }
1061
1062 cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu);
1063
1064 printk("cpu_init done, current fid 0x%x, vid 0x%x\n",
1065 data->currfid, data->currvid);
1066
1067 for_each_cpu_mask(i, cpu_core_map[pol->cpu]) {
1068 powernow_data[i] = data;
1069 }
1070
1071 return 0;
1072
1073 err_out:
1074 set_cpus_allowed(current, oldmask);
1075 schedule();
1076 powernow_k8_cpu_exit_acpi(data);
1077
1078 kfree(data);
1079 return -ENODEV;
1080 }
1081
1082 static int __devexit powernowk8_cpu_exit (struct cpufreq_policy *pol)
1083 {
1084 struct powernow_k8_data *data = powernow_data[pol->cpu];
1085
1086 if (!data)
1087 return -EINVAL;
1088
1089 powernow_k8_cpu_exit_acpi(data);
1090
1091 cpufreq_frequency_table_put_attr(pol->cpu);
1092
1093 kfree(data->powernow_table);
1094 kfree(data);
1095
1096 return 0;
1097 }
1098
1099 static unsigned int powernowk8_get (unsigned int cpu)
1100 {
1101 struct powernow_k8_data *data = powernow_data[cpu];
1102 cpumask_t oldmask = current->cpus_allowed;
1103 unsigned int khz = 0;
1104
1105 set_cpus_allowed(current, cpumask_of_cpu(cpu));
1106 if (smp_processor_id() != cpu) {
1107 printk(KERN_ERR PFX "limiting to CPU %d failed in powernowk8_get\n", cpu);
1108 set_cpus_allowed(current, oldmask);
1109 return 0;
1110 }
1111 preempt_disable();
1112
1113 if (query_current_values_with_pending_wait(data))
1114 goto out;
1115
1116 khz = find_khz_freq_from_fid(data->currfid);
1117
1118 out:
1119 preempt_enable_no_resched();
1120 set_cpus_allowed(current, oldmask);
1121
1122 return khz;
1123 }
1124
1125 static struct freq_attr* powernow_k8_attr[] = {
1126 &cpufreq_freq_attr_scaling_available_freqs,
1127 NULL,
1128 };
1129
1130 static struct cpufreq_driver cpufreq_amd64_driver = {
1131 .verify = powernowk8_verify,
1132 .target = powernowk8_target,
1133 .init = powernowk8_cpu_init,
1134 .exit = __devexit_p(powernowk8_cpu_exit),
1135 .get = powernowk8_get,
1136 .name = "powernow-k8",
1137 .owner = THIS_MODULE,
1138 .attr = powernow_k8_attr,
1139 };
1140
1141 /* driver entry point for init */
1142 static int __init powernowk8_init(void)
1143 {
1144 unsigned int i, supported_cpus = 0;
1145
1146 for (i=0; i<NR_CPUS; i++) {
1147 if (!cpu_online(i))
1148 continue;
1149 if (check_supported_cpu(i))
1150 supported_cpus++;
1151 }
1152
1153 if (supported_cpus == num_online_cpus()) {
1154 printk(KERN_INFO PFX "Found %d AMD Athlon 64 / Opteron processors (" VERSION ")\n",
1155 supported_cpus);
1156 return cpufreq_register_driver(&cpufreq_amd64_driver);
1157 }
1158
1159 return -ENODEV;
1160 }
1161
1162 /* driver entry point for term */
1163 static void __exit powernowk8_exit(void)
1164 {
1165 dprintk("exit\n");
1166
1167 cpufreq_unregister_driver(&cpufreq_amd64_driver);
1168 }
1169
1170 MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and Mark Langsdorf <mark.langsdorf@amd.com.");
1171 MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver.");
1172 MODULE_LICENSE("GPL");
1173
1174 late_initcall(powernowk8_init);
1175 module_exit(powernowk8_exit);
1176
WRT350N Kernel Patches