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x86: coding style fixes in arch/x86/lib/io_64.c
[wrt350n-kernel.git] / drivers / s390 / cio / qdio.c
blob097fc0967e9d2925594d4062c308dc7274be48b4
1 /*
2 *
3 * linux/drivers/s390/cio/qdio.c
4 *
5 * Linux for S/390 QDIO base support, Hipersocket base support
6 * version 2
7 *
8 * Copyright 2000,2002 IBM Corporation
9 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
10 * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
11 *
12 * Restriction: only 63 iqdio subchannels would have its own indicator,
13 * after that, subsequent subchannels share one indicator
14 *
15 *
16 *
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2, or (at your option)
21 * any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 */
32
33 #include <linux/module.h>
34 #include <linux/init.h>
35
36 #include <linux/slab.h>
37 #include <linux/kernel.h>
38 #include <linux/proc_fs.h>
39 #include <linux/timer.h>
40 #include <linux/mempool.h>
41
42 #include <asm/ccwdev.h>
43 #include <asm/io.h>
44 #include <asm/atomic.h>
45 #include <asm/semaphore.h>
46 #include <asm/timex.h>
47
48 #include <asm/debug.h>
49 #include <asm/s390_rdev.h>
50 #include <asm/qdio.h>
51 #include <asm/airq.h>
52
53 #include "cio.h"
54 #include "css.h"
55 #include "device.h"
56 #include "qdio.h"
57 #include "ioasm.h"
58 #include "chsc.h"
59
60 /****************** MODULE PARAMETER VARIABLES ********************/
61 MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>");
62 MODULE_DESCRIPTION("QDIO base support version 2, " \
63 "Copyright 2000 IBM Corporation");
64 MODULE_LICENSE("GPL");
65
66 /******************** HERE WE GO ***********************************/
67
68 static const char version[] = "QDIO base support version 2";
69
70 static int qdio_performance_stats = 0;
71 static int proc_perf_file_registration;
72 static struct qdio_perf_stats perf_stats;
73
74 static int hydra_thinints;
75 static int is_passthrough = 0;
76 static int omit_svs;
77
78 static int indicator_used[INDICATORS_PER_CACHELINE];
79 static __u32 * volatile indicators;
80 static __u32 volatile spare_indicator;
81 static atomic_t spare_indicator_usecount;
82 #define QDIO_MEMPOOL_SCSSC_ELEMENTS 2
83 static mempool_t *qdio_mempool_scssc;
84 static struct kmem_cache *qdio_q_cache;
85
86 static debug_info_t *qdio_dbf_setup;
87 static debug_info_t *qdio_dbf_sbal;
88 static debug_info_t *qdio_dbf_trace;
89 static debug_info_t *qdio_dbf_sense;
90 #ifdef CONFIG_QDIO_DEBUG
91 static debug_info_t *qdio_dbf_slsb_out;
92 static debug_info_t *qdio_dbf_slsb_in;
93 #endif /* CONFIG_QDIO_DEBUG */
94
95 /* iQDIO stuff: */
96 static volatile struct qdio_q *tiq_list=NULL; /* volatile as it could change
97 during a while loop */
98 static DEFINE_SPINLOCK(ttiq_list_lock);
99 static void *tiqdio_ind;
100 static void tiqdio_tl(unsigned long);
101 static DECLARE_TASKLET(tiqdio_tasklet,tiqdio_tl,0);
102
103 /* not a macro, as one of the arguments is atomic_read */
104 static inline int
105 qdio_min(int a,int b)
106 {
107 if (a<b)
108 return a;
109 else
110 return b;
111 }
112
113 /***************** SCRUBBER HELPER ROUTINES **********************/
114 #ifdef CONFIG_64BIT
115 static inline void qdio_perf_stat_inc(atomic64_t *count)
116 {
117 if (qdio_performance_stats)
118 atomic64_inc(count);
119 }
120
121 static inline void qdio_perf_stat_dec(atomic64_t *count)
122 {
123 if (qdio_performance_stats)
124 atomic64_dec(count);
125 }
126 #else /* CONFIG_64BIT */
127 static inline void qdio_perf_stat_inc(atomic_t *count)
128 {
129 if (qdio_performance_stats)
130 atomic_inc(count);
131 }
132
133 static inline void qdio_perf_stat_dec(atomic_t *count)
134 {
135 if (qdio_performance_stats)
136 atomic_dec(count);
137 }
138 #endif /* CONFIG_64BIT */
139
140 static inline __u64
141 qdio_get_micros(void)
142 {
143 return (get_clock() >> 12); /* time>>12 is microseconds */
144 }
145
146 /*
147 * unfortunately, we can't just xchg the values; in do_QDIO we want to reserve
148 * the q in any case, so that we'll not be interrupted when we are in
149 * qdio_mark_tiq... shouldn't have a really bad impact, as reserving almost
150 * ever works (last famous words)
151 */
152 static inline int
153 qdio_reserve_q(struct qdio_q *q)
154 {
155 return atomic_add_return(1,&q->use_count) - 1;
156 }
157
158 static inline void
159 qdio_release_q(struct qdio_q *q)
160 {
161 atomic_dec(&q->use_count);
162 }
163
164 /*check ccq */
165 static int
166 qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
167 {
168 char dbf_text[15];
169
170 if (ccq == 0 || ccq == 32)
171 return 0;
172 if (ccq == 96 || ccq == 97)
173 return 1;
174 /*notify devices immediately*/
175 sprintf(dbf_text,"%d", ccq);
176 QDIO_DBF_TEXT2(1,trace,dbf_text);
177 return -EIO;
178 }
179 /* EQBS: extract buffer states */
180 static int
181 qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
182 unsigned int *start, unsigned int *cnt)
183 {
184 struct qdio_irq *irq;
185 unsigned int tmp_cnt, q_no, ccq;
186 int rc ;
187 char dbf_text[15];
188
189 ccq = 0;
190 tmp_cnt = *cnt;
191 irq = (struct qdio_irq*)q->irq_ptr;
192 q_no = q->q_no;
193 if(!q->is_input_q)
194 q_no += irq->no_input_qs;
195 again:
196 ccq = do_eqbs(irq->sch_token, state, q_no, start, cnt);
197 rc = qdio_check_ccq(q, ccq);
198 if ((ccq == 96) && (tmp_cnt != *cnt))
199 rc = 0;
200 if (rc == 1) {
201 QDIO_DBF_TEXT5(1,trace,"eqAGAIN");
202 goto again;
203 }
204 if (rc < 0) {
205 QDIO_DBF_TEXT2(1,trace,"eqberr");
206 sprintf(dbf_text,"%2x,%2x,%d,%d",tmp_cnt, *cnt, ccq, q_no);
207 QDIO_DBF_TEXT2(1,trace,dbf_text);
208 q->handler(q->cdev,QDIO_STATUS_ACTIVATE_CHECK_CONDITION|
209 QDIO_STATUS_LOOK_FOR_ERROR,
210 0, 0, 0, -1, -1, q->int_parm);
211 return 0;
212 }
213 return (tmp_cnt - *cnt);
214 }
215
216 /* SQBS: set buffer states */
217 static int
218 qdio_do_sqbs(struct qdio_q *q, unsigned char state,
219 unsigned int *start, unsigned int *cnt)
220 {
221 struct qdio_irq *irq;
222 unsigned int tmp_cnt, q_no, ccq;
223 int rc;
224 char dbf_text[15];
225
226 ccq = 0;
227 tmp_cnt = *cnt;
228 irq = (struct qdio_irq*)q->irq_ptr;
229 q_no = q->q_no;
230 if(!q->is_input_q)
231 q_no += irq->no_input_qs;
232 again:
233 ccq = do_sqbs(irq->sch_token, state, q_no, start, cnt);
234 rc = qdio_check_ccq(q, ccq);
235 if (rc == 1) {
236 QDIO_DBF_TEXT5(1,trace,"sqAGAIN");
237 goto again;
238 }
239 if (rc < 0) {
240 QDIO_DBF_TEXT3(1,trace,"sqberr");
241 sprintf(dbf_text,"%2x,%2x",tmp_cnt,*cnt);
242 QDIO_DBF_TEXT3(1,trace,dbf_text);
243 sprintf(dbf_text,"%d,%d",ccq,q_no);
244 QDIO_DBF_TEXT3(1,trace,dbf_text);
245 q->handler(q->cdev,QDIO_STATUS_ACTIVATE_CHECK_CONDITION|
246 QDIO_STATUS_LOOK_FOR_ERROR,
247 0, 0, 0, -1, -1, q->int_parm);
248 return 0;
249 }
250 return (tmp_cnt - *cnt);
251 }
252
253 static inline int
254 qdio_set_slsb(struct qdio_q *q, unsigned int *bufno,
255 unsigned char state, unsigned int *count)
256 {
257 volatile char *slsb;
258 struct qdio_irq *irq;
259
260 irq = (struct qdio_irq*)q->irq_ptr;
261 if (!irq->is_qebsm) {
262 slsb = (char *)&q->slsb.acc.val[(*bufno)];
263 xchg(slsb, state);
264 return 1;
265 }
266 return qdio_do_sqbs(q, state, bufno, count);
267 }
268
269 #ifdef CONFIG_QDIO_DEBUG
270 static inline void
271 qdio_trace_slsb(struct qdio_q *q)
272 {
273 if (q->queue_type==QDIO_TRACE_QTYPE) {
274 if (q->is_input_q)
275 QDIO_DBF_HEX2(0,slsb_in,&q->slsb,
276 QDIO_MAX_BUFFERS_PER_Q);
277 else
278 QDIO_DBF_HEX2(0,slsb_out,&q->slsb,
279 QDIO_MAX_BUFFERS_PER_Q);
280 }
281 }
282 #endif
283
284 static inline int
285 set_slsb(struct qdio_q *q, unsigned int *bufno,
286 unsigned char state, unsigned int *count)
287 {
288 int rc;
289 #ifdef CONFIG_QDIO_DEBUG
290 qdio_trace_slsb(q);
291 #endif
292 rc = qdio_set_slsb(q, bufno, state, count);
293 #ifdef CONFIG_QDIO_DEBUG
294 qdio_trace_slsb(q);
295 #endif
296 return rc;
297 }
298 static inline int
299 qdio_siga_sync(struct qdio_q *q, unsigned int gpr2,
300 unsigned int gpr3)
301 {
302 int cc;
303
304 QDIO_DBF_TEXT4(0,trace,"sigasync");
305 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
306
307 qdio_perf_stat_inc(&perf_stats.siga_syncs);
308
309 cc = do_siga_sync(q->schid, gpr2, gpr3);
310 if (cc)
311 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
312
313 return cc;
314 }
315
316 static inline int
317 qdio_siga_sync_q(struct qdio_q *q)
318 {
319 if (q->is_input_q)
320 return qdio_siga_sync(q, 0, q->mask);
321 return qdio_siga_sync(q, q->mask, 0);
322 }
323
324 static int
325 __do_siga_output(struct qdio_q *q, unsigned int *busy_bit)
326 {
327 struct qdio_irq *irq;
328 unsigned int fc = 0;
329 unsigned long schid;
330
331 irq = (struct qdio_irq *) q->irq_ptr;
332 if (!irq->is_qebsm)
333 schid = *((u32 *)&q->schid);
334 else {
335 schid = irq->sch_token;
336 fc |= 0x80;
337 }
338 return do_siga_output(schid, q->mask, busy_bit, fc);
339 }
340
341 /*
342 * returns QDIO_SIGA_ERROR_ACCESS_EXCEPTION as cc, when SIGA returns
343 * an access exception
344 */
345 static int
346 qdio_siga_output(struct qdio_q *q)
347 {
348 int cc;
349 __u32 busy_bit;
350 __u64 start_time=0;
351
352 qdio_perf_stat_inc(&perf_stats.siga_outs);
353
354 QDIO_DBF_TEXT4(0,trace,"sigaout");
355 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
356
357 for (;;) {
358 cc = __do_siga_output(q, &busy_bit);
359 //QDIO_PRINT_ERR("cc=%x, busy=%x\n",cc,busy_bit);
360 if ((cc==2) && (busy_bit) && (q->is_iqdio_q)) {
361 if (!start_time)
362 start_time=NOW;
363 if ((NOW-start_time)>QDIO_BUSY_BIT_PATIENCE)
364 break;
365 } else
366 break;
367 }
368
369 if ((cc==2) && (busy_bit))
370 cc |= QDIO_SIGA_ERROR_B_BIT_SET;
371
372 if (cc)
373 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
374
375 return cc;
376 }
377
378 static int
379 qdio_siga_input(struct qdio_q *q)
380 {
381 int cc;
382
383 QDIO_DBF_TEXT4(0,trace,"sigain");
384 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
385
386 qdio_perf_stat_inc(&perf_stats.siga_ins);
387
388 cc = do_siga_input(q->schid, q->mask);
389
390 if (cc)
391 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
392
393 return cc;
394 }
395
396 /* locked by the locks in qdio_activate and qdio_cleanup */
397 static __u32 *
398 qdio_get_indicator(void)
399 {
400 int i;
401
402 for (i = 0; i < INDICATORS_PER_CACHELINE; i++)
403 if (!indicator_used[i]) {
404 indicator_used[i]=1;
405 return indicators+i;
406 }
407 atomic_inc(&spare_indicator_usecount);
408 return (__u32 * volatile) &spare_indicator;
409 }
410
411 /* locked by the locks in qdio_activate and qdio_cleanup */
412 static void
413 qdio_put_indicator(__u32 *addr)
414 {
415 int i;
416
417 if ( (addr) && (addr!=&spare_indicator) ) {
418 i=addr-indicators;
419 indicator_used[i]=0;
420 }
421 if (addr == &spare_indicator)
422 atomic_dec(&spare_indicator_usecount);
423 }
424
425 static inline void
426 tiqdio_clear_summary_bit(__u32 *location)
427 {
428 QDIO_DBF_TEXT5(0,trace,"clrsummb");
429 QDIO_DBF_HEX5(0,trace,&location,sizeof(void*));
430
431 xchg(location,0);
432 }
433
434 static inline void
435 tiqdio_set_summary_bit(__u32 *location)
436 {
437 QDIO_DBF_TEXT5(0,trace,"setsummb");
438 QDIO_DBF_HEX5(0,trace,&location,sizeof(void*));
439
440 xchg(location,-1);
441 }
442
443 static inline void
444 tiqdio_sched_tl(void)
445 {
446 tasklet_hi_schedule(&tiqdio_tasklet);
447 }
448
449 static void
450 qdio_mark_tiq(struct qdio_q *q)
451 {
452 unsigned long flags;
453
454 QDIO_DBF_TEXT4(0,trace,"mark iq");
455 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
456
457 spin_lock_irqsave(&ttiq_list_lock,flags);
458 if (unlikely(atomic_read(&q->is_in_shutdown)))
459 goto out_unlock;
460
461 if (!q->is_input_q)
462 goto out_unlock;
463
464 if ((q->list_prev) || (q->list_next))
465 goto out_unlock;
466
467 if (!tiq_list) {
468 tiq_list=q;
469 q->list_prev=q;
470 q->list_next=q;
471 } else {
472 q->list_next=tiq_list;
473 q->list_prev=tiq_list->list_prev;
474 tiq_list->list_prev->list_next=q;
475 tiq_list->list_prev=q;
476 }
477 spin_unlock_irqrestore(&ttiq_list_lock,flags);
478
479 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
480 tiqdio_sched_tl();
481 return;
482 out_unlock:
483 spin_unlock_irqrestore(&ttiq_list_lock,flags);
484 return;
485 }
486
487 static inline void
488 qdio_mark_q(struct qdio_q *q)
489 {
490 QDIO_DBF_TEXT4(0,trace,"mark q");
491 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
492
493 if (unlikely(atomic_read(&q->is_in_shutdown)))
494 return;
495
496 tasklet_schedule(&q->tasklet);
497 }
498
499 static int
500 qdio_stop_polling(struct qdio_q *q)
501 {
502 #ifdef QDIO_USE_PROCESSING_STATE
503 unsigned int tmp, gsf, count = 1;
504 unsigned char state = 0;
505 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
506
507 if (!atomic_xchg(&q->polling,0))
508 return 1;
509
510 QDIO_DBF_TEXT4(0,trace,"stoppoll");
511 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
512
513 /* show the card that we are not polling anymore */
514 if (!q->is_input_q)
515 return 1;
516
517 tmp = gsf = GET_SAVED_FRONTIER(q);
518 tmp = ((tmp + QDIO_MAX_BUFFERS_PER_Q-1) & (QDIO_MAX_BUFFERS_PER_Q-1) );
519 set_slsb(q, &tmp, SLSB_P_INPUT_NOT_INIT, &count);
520
521 /*
522 * we don't issue this SYNC_MEMORY, as we trust Rick T and
523 * moreover will not use the PROCESSING state under VM, so
524 * q->polling was 0 anyway
525 */
526 /*SYNC_MEMORY;*/
527 if (irq->is_qebsm) {
528 count = 1;
529 qdio_do_eqbs(q, &state, &gsf, &count);
530 } else
531 state = q->slsb.acc.val[gsf];
532 if (state != SLSB_P_INPUT_PRIMED)
533 return 1;
534 /*
535 * set our summary bit again, as otherwise there is a
536 * small window we can miss between resetting it and
537 * checking for PRIMED state
538 */
539 if (q->is_thinint_q)
540 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
541 return 0;
542
543 #else /* QDIO_USE_PROCESSING_STATE */
544 return 1;
545 #endif /* QDIO_USE_PROCESSING_STATE */
546 }
547
548 /*
549 * see the comment in do_QDIO and before qdio_reserve_q about the
550 * sophisticated locking outside of unmark_q, so that we don't need to
551 * disable the interrupts :-)
552 */
553 static void
554 qdio_unmark_q(struct qdio_q *q)
555 {
556 unsigned long flags;
557
558 QDIO_DBF_TEXT4(0,trace,"unmark q");
559 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
560
561 if ((!q->list_prev)||(!q->list_next))
562 return;
563
564 if ((q->is_thinint_q)&&(q->is_input_q)) {
565 /* iQDIO */
566 spin_lock_irqsave(&ttiq_list_lock,flags);
567 /* in case cleanup has done this already and simultanously
568 * qdio_unmark_q is called from the interrupt handler, we've
569 * got to check this in this specific case again */
570 if ((!q->list_prev)||(!q->list_next))
571 goto out;
572 if (q->list_next==q) {
573 /* q was the only interesting q */
574 tiq_list=NULL;
575 q->list_next=NULL;
576 q->list_prev=NULL;
577 } else {
578 q->list_next->list_prev=q->list_prev;
579 q->list_prev->list_next=q->list_next;
580 tiq_list=q->list_next;
581 q->list_next=NULL;
582 q->list_prev=NULL;
583 }
584 out:
585 spin_unlock_irqrestore(&ttiq_list_lock,flags);
586 }
587 }
588
589 static inline unsigned long
590 tiqdio_clear_global_summary(void)
591 {
592 unsigned long time;
593
594 QDIO_DBF_TEXT5(0,trace,"clrglobl");
595
596 time = do_clear_global_summary();
597
598 QDIO_DBF_HEX5(0,trace,&time,sizeof(unsigned long));
599
600 return time;
601 }
602
603
604 /************************* OUTBOUND ROUTINES *******************************/
605 static int
606 qdio_qebsm_get_outbound_buffer_frontier(struct qdio_q *q)
607 {
608 struct qdio_irq *irq;
609 unsigned char state;
610 unsigned int cnt, count, ftc;
611
612 irq = (struct qdio_irq *) q->irq_ptr;
613 if ((!q->is_iqdio_q) && (!q->hydra_gives_outbound_pcis))
614 SYNC_MEMORY;
615
616 ftc = q->first_to_check;
617 count = qdio_min(atomic_read(&q->number_of_buffers_used),
618 (QDIO_MAX_BUFFERS_PER_Q-1));
619 if (count == 0)
620 return q->first_to_check;
621 cnt = qdio_do_eqbs(q, &state, &ftc, &count);
622 if (cnt == 0)
623 return q->first_to_check;
624 switch (state) {
625 case SLSB_P_OUTPUT_ERROR:
626 QDIO_DBF_TEXT3(0,trace,"outperr");
627 atomic_sub(cnt , &q->number_of_buffers_used);
628 if (q->qdio_error)
629 q->error_status_flags |=
630 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
631 q->qdio_error = SLSB_P_OUTPUT_ERROR;
632 q->error_status_flags |= QDIO_STATUS_LOOK_FOR_ERROR;
633 q->first_to_check = ftc;
634 break;
635 case SLSB_P_OUTPUT_EMPTY:
636 QDIO_DBF_TEXT5(0,trace,"outpempt");
637 atomic_sub(cnt, &q->number_of_buffers_used);
638 q->first_to_check = ftc;
639 break;
640 case SLSB_CU_OUTPUT_PRIMED:
641 /* all buffers primed */
642 QDIO_DBF_TEXT5(0,trace,"outpprim");
643 break;
644 default:
645 break;
646 }
647 QDIO_DBF_HEX4(0,trace,&q->first_to_check,sizeof(int));
648 return q->first_to_check;
649 }
650
651 static int
652 qdio_qebsm_get_inbound_buffer_frontier(struct qdio_q *q)
653 {
654 struct qdio_irq *irq;
655 unsigned char state;
656 int tmp, ftc, count, cnt;
657 char dbf_text[15];
658
659
660 irq = (struct qdio_irq *) q->irq_ptr;
661 ftc = q->first_to_check;
662 count = qdio_min(atomic_read(&q->number_of_buffers_used),
663 (QDIO_MAX_BUFFERS_PER_Q-1));
664 if (count == 0)
665 return q->first_to_check;
666 cnt = qdio_do_eqbs(q, &state, &ftc, &count);
667 if (cnt == 0)
668 return q->first_to_check;
669 switch (state) {
670 case SLSB_P_INPUT_ERROR :
671 #ifdef CONFIG_QDIO_DEBUG
672 QDIO_DBF_TEXT3(1,trace,"inperr");
673 sprintf(dbf_text,"%2x,%2x",ftc,count);
674 QDIO_DBF_TEXT3(1,trace,dbf_text);
675 #endif /* CONFIG_QDIO_DEBUG */
676 if (q->qdio_error)
677 q->error_status_flags |=
678 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
679 q->qdio_error = SLSB_P_INPUT_ERROR;
680 q->error_status_flags |= QDIO_STATUS_LOOK_FOR_ERROR;
681 atomic_sub(cnt, &q->number_of_buffers_used);
682 q->first_to_check = ftc;
683 break;
684 case SLSB_P_INPUT_PRIMED :
685 QDIO_DBF_TEXT3(0,trace,"inptprim");
686 sprintf(dbf_text,"%2x,%2x",ftc,count);
687 QDIO_DBF_TEXT3(1,trace,dbf_text);
688 tmp = 0;
689 ftc = q->first_to_check;
690 #ifdef QDIO_USE_PROCESSING_STATE
691 if (cnt > 1) {
692 cnt -= 1;
693 tmp = set_slsb(q, &ftc, SLSB_P_INPUT_NOT_INIT, &cnt);
694 if (!tmp)
695 break;
696 }
697 cnt = 1;
698 tmp += set_slsb(q, &ftc,
699 SLSB_P_INPUT_PROCESSING, &cnt);
700 atomic_set(&q->polling, 1);
701 #else
702 tmp = set_slsb(q, &ftc, SLSB_P_INPUT_NOT_INIT, &cnt);
703 #endif
704 atomic_sub(tmp, &q->number_of_buffers_used);
705 q->first_to_check = ftc;
706 break;
707 case SLSB_CU_INPUT_EMPTY:
708 case SLSB_P_INPUT_NOT_INIT:
709 case SLSB_P_INPUT_PROCESSING:
710 QDIO_DBF_TEXT5(0,trace,"inpnipro");
711 break;
712 default:
713 break;
714 }
715 QDIO_DBF_HEX4(0,trace,&q->first_to_check,sizeof(int));
716 return q->first_to_check;
717 }
718
719 static int
720 qdio_get_outbound_buffer_frontier(struct qdio_q *q)
721 {
722 struct qdio_irq *irq;
723 volatile char *slsb;
724 unsigned int count = 1;
725 int first_not_to_check, f, f_mod_no;
726 char dbf_text[15];
727
728 QDIO_DBF_TEXT4(0,trace,"getobfro");
729 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
730
731 irq = (struct qdio_irq *) q->irq_ptr;
732 if (irq->is_qebsm)
733 return qdio_qebsm_get_outbound_buffer_frontier(q);
734
735 slsb=&q->slsb.acc.val[0];
736 f_mod_no=f=q->first_to_check;
737 /*
738 * f points to already processed elements, so f+no_used is correct...
739 * ... but: we don't check 128 buffers, as otherwise
740 * qdio_has_outbound_q_moved would return 0
741 */
742 first_not_to_check=f+qdio_min(atomic_read(&q->number_of_buffers_used),
743 (QDIO_MAX_BUFFERS_PER_Q-1));
744
745 if (((!q->is_iqdio_q) && (!q->hydra_gives_outbound_pcis)) ||
746 (q->queue_type == QDIO_IQDIO_QFMT_ASYNCH))
747 SYNC_MEMORY;
748
749 check_next:
750 if (f==first_not_to_check)
751 goto out;
752
753 switch(slsb[f_mod_no]) {
754
755 /* the adapter has not fetched the output yet */
756 case SLSB_CU_OUTPUT_PRIMED:
757 QDIO_DBF_TEXT5(0,trace,"outpprim");
758 break;
759
760 /* the adapter got it */
761 case SLSB_P_OUTPUT_EMPTY:
762 atomic_dec(&q->number_of_buffers_used);
763 f++;
764 f_mod_no=f&(QDIO_MAX_BUFFERS_PER_Q-1);
765 QDIO_DBF_TEXT5(0,trace,"outpempt");
766 goto check_next;
767
768 case SLSB_P_OUTPUT_ERROR:
769 QDIO_DBF_TEXT3(0,trace,"outperr");
770 sprintf(dbf_text,"%x-%x-%x",f_mod_no,
771 q->sbal[f_mod_no]->element[14].sbalf.value,
772 q->sbal[f_mod_no]->element[15].sbalf.value);
773 QDIO_DBF_TEXT3(1,trace,dbf_text);
774 QDIO_DBF_HEX2(1,sbal,q->sbal[f_mod_no],256);
775
776 /* kind of process the buffer */
777 set_slsb(q, &f_mod_no, SLSB_P_OUTPUT_NOT_INIT, &count);
778
779 /*
780 * we increment the frontier, as this buffer
781 * was processed obviously
782 */
783 atomic_dec(&q->number_of_buffers_used);
784 f_mod_no=(f_mod_no+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
785
786 if (q->qdio_error)
787 q->error_status_flags|=
788 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
789 q->qdio_error=SLSB_P_OUTPUT_ERROR;
790 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
791
792 break;
793
794 /* no new buffers */
795 default:
796 QDIO_DBF_TEXT5(0,trace,"outpni");
797 }
798 out:
799 return (q->first_to_check=f_mod_no);
800 }
801
802 /* all buffers are processed */
803 static int
804 qdio_is_outbound_q_done(struct qdio_q *q)
805 {
806 int no_used;
807 #ifdef CONFIG_QDIO_DEBUG
808 char dbf_text[15];
809 #endif
810
811 no_used=atomic_read(&q->number_of_buffers_used);
812
813 #ifdef CONFIG_QDIO_DEBUG
814 if (no_used) {
815 sprintf(dbf_text,"oqisnt%02x",no_used);
816 QDIO_DBF_TEXT4(0,trace,dbf_text);
817 } else {
818 QDIO_DBF_TEXT4(0,trace,"oqisdone");
819 }
820 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
821 #endif /* CONFIG_QDIO_DEBUG */
822 return (no_used==0);
823 }
824
825 static int
826 qdio_has_outbound_q_moved(struct qdio_q *q)
827 {
828 int i;
829
830 i=qdio_get_outbound_buffer_frontier(q);
831
832 if ( (i!=GET_SAVED_FRONTIER(q)) ||
833 (q->error_status_flags&QDIO_STATUS_LOOK_FOR_ERROR) ) {
834 SAVE_FRONTIER(q,i);
835 QDIO_DBF_TEXT4(0,trace,"oqhasmvd");
836 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
837 return 1;
838 } else {
839 QDIO_DBF_TEXT4(0,trace,"oqhsntmv");
840 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
841 return 0;
842 }
843 }
844
845 static void
846 qdio_kick_outbound_q(struct qdio_q *q)
847 {
848 int result;
849 #ifdef CONFIG_QDIO_DEBUG
850 char dbf_text[15];
851
852 QDIO_DBF_TEXT4(0,trace,"kickoutq");
853 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
854 #endif /* CONFIG_QDIO_DEBUG */
855
856 if (!q->siga_out)
857 return;
858
859 /* here's the story with cc=2 and busy bit set (thanks, Rick):
860 * VM's CP could present us cc=2 and busy bit set on SIGA-write
861 * during reconfiguration of their Guest LAN (only in HIPERS mode,
862 * QDIO mode is asynchronous -- cc=2 and busy bit there will take
863 * the queues down immediately; and not being under VM we have a
864 * problem on cc=2 and busy bit set right away).
865 *
866 * Therefore qdio_siga_output will try for a short time constantly,
867 * if such a condition occurs. If it doesn't change, it will
868 * increase the busy_siga_counter and save the timestamp, and
869 * schedule the queue for later processing (via mark_q, using the
870 * queue tasklet). __qdio_outbound_processing will check out the
871 * counter. If non-zero, it will call qdio_kick_outbound_q as often
872 * as the value of the counter. This will attempt further SIGA
873 * instructions. For each successful SIGA, the counter is
874 * decreased, for failing SIGAs the counter remains the same, after
875 * all.
876 * After some time of no movement, qdio_kick_outbound_q will
877 * finally fail and reflect corresponding error codes to call
878 * the upper layer module and have it take the queues down.
879 *
880 * Note that this is a change from the original HiperSockets design
881 * (saying cc=2 and busy bit means take the queues down), but in
882 * these days Guest LAN didn't exist... excessive cc=2 with busy bit
883 * conditions will still take the queues down, but the threshold is
884 * higher due to the Guest LAN environment.
885 */
886
887
888 result=qdio_siga_output(q);
889
890 switch (result) {
891 case 0:
892 /* went smooth this time, reset timestamp */
893 #ifdef CONFIG_QDIO_DEBUG
894 QDIO_DBF_TEXT3(0,trace,"cc2reslv");
895 sprintf(dbf_text,"%4x%2x%2x",q->schid.sch_no,q->q_no,
896 atomic_read(&q->busy_siga_counter));
897 QDIO_DBF_TEXT3(0,trace,dbf_text);
898 #endif /* CONFIG_QDIO_DEBUG */
899 q->timing.busy_start=0;
900 break;
901 case (2|QDIO_SIGA_ERROR_B_BIT_SET):
902 /* cc=2 and busy bit: */
903 atomic_inc(&q->busy_siga_counter);
904
905 /* if the last siga was successful, save
906 * timestamp here */
907 if (!q->timing.busy_start)
908 q->timing.busy_start=NOW;
909
910 /* if we're in time, don't touch error_status_flags
911 * and siga_error */
912 if (NOW-q->timing.busy_start<QDIO_BUSY_BIT_GIVE_UP) {
913 qdio_mark_q(q);
914 break;
915 }
916 QDIO_DBF_TEXT2(0,trace,"cc2REPRT");
917 #ifdef CONFIG_QDIO_DEBUG
918 sprintf(dbf_text,"%4x%2x%2x",q->schid.sch_no,q->q_no,
919 atomic_read(&q->busy_siga_counter));
920 QDIO_DBF_TEXT3(0,trace,dbf_text);
921 #endif /* CONFIG_QDIO_DEBUG */
922 /* else fallthrough and report error */
923 default:
924 /* for plain cc=1, 2 or 3: */
925 if (q->siga_error)
926 q->error_status_flags|=
927 QDIO_STATUS_MORE_THAN_ONE_SIGA_ERROR;
928 q->error_status_flags|=
929 QDIO_STATUS_LOOK_FOR_ERROR;
930 q->siga_error=result;
931 }
932 }
933
934 static void
935 qdio_kick_outbound_handler(struct qdio_q *q)
936 {
937 int start, end, real_end, count;
938 #ifdef CONFIG_QDIO_DEBUG
939 char dbf_text[15];
940 #endif
941
942 start = q->first_element_to_kick;
943 /* last_move_ftc was just updated */
944 real_end = GET_SAVED_FRONTIER(q);
945 end = (real_end+QDIO_MAX_BUFFERS_PER_Q-1)&
946 (QDIO_MAX_BUFFERS_PER_Q-1);
947 count = (end+QDIO_MAX_BUFFERS_PER_Q+1-start)&
948 (QDIO_MAX_BUFFERS_PER_Q-1);
949
950 #ifdef CONFIG_QDIO_DEBUG
951 QDIO_DBF_TEXT4(0,trace,"kickouth");
952 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
953
954 sprintf(dbf_text,"s=%2xc=%2x",start,count);
955 QDIO_DBF_TEXT4(0,trace,dbf_text);
956 #endif /* CONFIG_QDIO_DEBUG */
957
958 if (q->state==QDIO_IRQ_STATE_ACTIVE)
959 q->handler(q->cdev,QDIO_STATUS_OUTBOUND_INT|
960 q->error_status_flags,
961 q->qdio_error,q->siga_error,q->q_no,start,count,
962 q->int_parm);
963
964 /* for the next time: */
965 q->first_element_to_kick=real_end;
966 q->qdio_error=0;
967 q->siga_error=0;
968 q->error_status_flags=0;
969 }
970
971 static void
972 __qdio_outbound_processing(struct qdio_q *q)
973 {
974 int siga_attempts;
975
976 QDIO_DBF_TEXT4(0,trace,"qoutproc");
977 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
978
979 if (unlikely(qdio_reserve_q(q))) {
980 qdio_release_q(q);
981 qdio_perf_stat_inc(&perf_stats.outbound_tl_runs_resched);
982 /* as we're sissies, we'll check next time */
983 if (likely(!atomic_read(&q->is_in_shutdown))) {
984 qdio_mark_q(q);
985 QDIO_DBF_TEXT4(0,trace,"busy,agn");
986 }
987 return;
988 }
989 qdio_perf_stat_inc(&perf_stats.outbound_tl_runs);
990 qdio_perf_stat_inc(&perf_stats.tl_runs);
991
992 /* see comment in qdio_kick_outbound_q */
993 siga_attempts=atomic_read(&q->busy_siga_counter);
994 while (siga_attempts) {
995 atomic_dec(&q->busy_siga_counter);
996 qdio_kick_outbound_q(q);
997 siga_attempts--;
998 }
999
1000 if (qdio_has_outbound_q_moved(q))
1001 qdio_kick_outbound_handler(q);
1002
1003 if (q->queue_type == QDIO_ZFCP_QFMT) {
1004 if ((!q->hydra_gives_outbound_pcis) &&
1005 (!qdio_is_outbound_q_done(q)))
1006 qdio_mark_q(q);
1007 }
1008 else if (((!q->is_iqdio_q) && (!q->is_pci_out)) ||
1009 (q->queue_type == QDIO_IQDIO_QFMT_ASYNCH)) {
1010 /*
1011 * make sure buffer switch from PRIMED to EMPTY is noticed
1012 * and outbound_handler is called
1013 */
1014 if (qdio_is_outbound_q_done(q)) {
1015 del_timer(&q->timer);
1016 } else {
1017 if (!timer_pending(&q->timer))
1018 mod_timer(&q->timer, jiffies +
1019 QDIO_FORCE_CHECK_TIMEOUT);
1020 }
1021 }
1022
1023 qdio_release_q(q);
1024 }
1025
1026 static void
1027 qdio_outbound_processing(unsigned long q)
1028 {
1029 __qdio_outbound_processing((struct qdio_q *) q);
1030 }
1031
1032 /************************* INBOUND ROUTINES *******************************/
1033
1034
1035 static int
1036 qdio_get_inbound_buffer_frontier(struct qdio_q *q)
1037 {
1038 struct qdio_irq *irq;
1039 int f,f_mod_no;
1040 volatile char *slsb;
1041 unsigned int count = 1;
1042 int first_not_to_check;
1043 #ifdef CONFIG_QDIO_DEBUG
1044 char dbf_text[15];
1045 #endif /* CONFIG_QDIO_DEBUG */
1046 #ifdef QDIO_USE_PROCESSING_STATE
1047 int last_position=-1;
1048 #endif /* QDIO_USE_PROCESSING_STATE */
1049
1050 QDIO_DBF_TEXT4(0,trace,"getibfro");
1051 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1052
1053 irq = (struct qdio_irq *) q->irq_ptr;
1054 if (irq->is_qebsm)
1055 return qdio_qebsm_get_inbound_buffer_frontier(q);
1056
1057 slsb=&q->slsb.acc.val[0];
1058 f_mod_no=f=q->first_to_check;
1059 /*
1060 * we don't check 128 buffers, as otherwise qdio_has_inbound_q_moved
1061 * would return 0
1062 */
1063 first_not_to_check=f+qdio_min(atomic_read(&q->number_of_buffers_used),
1064 (QDIO_MAX_BUFFERS_PER_Q-1));
1065
1066 /*
1067 * we don't use this one, as a PCI or we after a thin interrupt
1068 * will sync the queues
1069 */
1070 /* SYNC_MEMORY;*/
1071
1072 check_next:
1073 f_mod_no=f&(QDIO_MAX_BUFFERS_PER_Q-1);
1074 if (f==first_not_to_check)
1075 goto out;
1076 switch (slsb[f_mod_no]) {
1077
1078 /* CU_EMPTY means frontier is reached */
1079 case SLSB_CU_INPUT_EMPTY:
1080 QDIO_DBF_TEXT5(0,trace,"inptempt");
1081 break;
1082
1083 /* P_PRIMED means set slsb to P_PROCESSING and move on */
1084 case SLSB_P_INPUT_PRIMED:
1085 QDIO_DBF_TEXT5(0,trace,"inptprim");
1086
1087 #ifdef QDIO_USE_PROCESSING_STATE
1088 /*
1089 * as soon as running under VM, polling the input queues will
1090 * kill VM in terms of CP overhead
1091 */
1092 if (q->siga_sync) {
1093 set_slsb(q, &f_mod_no, SLSB_P_INPUT_NOT_INIT, &count);
1094 } else {
1095 /* set the previous buffer to NOT_INIT. The current
1096 * buffer will be set to PROCESSING at the end of
1097 * this function to avoid further interrupts. */
1098 if (last_position>=0)
1099 set_slsb(q, &last_position,
1100 SLSB_P_INPUT_NOT_INIT, &count);
1101 atomic_set(&q->polling,1);
1102 last_position=f_mod_no;
1103 }
1104 #else /* QDIO_USE_PROCESSING_STATE */
1105 set_slsb(q, &f_mod_no, SLSB_P_INPUT_NOT_INIT, &count);
1106 #endif /* QDIO_USE_PROCESSING_STATE */
1107 /*
1108 * not needed, as the inbound queue will be synced on the next
1109 * siga-r, resp. tiqdio_is_inbound_q_done will do the siga-s
1110 */
1111 /*SYNC_MEMORY;*/
1112 f++;
1113 atomic_dec(&q->number_of_buffers_used);
1114 goto check_next;
1115
1116 case SLSB_P_INPUT_NOT_INIT:
1117 case SLSB_P_INPUT_PROCESSING:
1118 QDIO_DBF_TEXT5(0,trace,"inpnipro");
1119 break;
1120
1121 /* P_ERROR means frontier is reached, break and report error */
1122 case SLSB_P_INPUT_ERROR:
1123 #ifdef CONFIG_QDIO_DEBUG
1124 sprintf(dbf_text,"inperr%2x",f_mod_no);
1125 QDIO_DBF_TEXT3(1,trace,dbf_text);
1126 #endif /* CONFIG_QDIO_DEBUG */
1127 QDIO_DBF_HEX2(1,sbal,q->sbal[f_mod_no],256);
1128
1129 /* kind of process the buffer */
1130 set_slsb(q, &f_mod_no, SLSB_P_INPUT_NOT_INIT, &count);
1131
1132 if (q->qdio_error)
1133 q->error_status_flags|=
1134 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
1135 q->qdio_error=SLSB_P_INPUT_ERROR;
1136 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
1137
1138 /* we increment the frontier, as this buffer
1139 * was processed obviously */
1140 f_mod_no=(f_mod_no+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
1141 atomic_dec(&q->number_of_buffers_used);
1142
1143 #ifdef QDIO_USE_PROCESSING_STATE
1144 last_position=-1;
1145 #endif /* QDIO_USE_PROCESSING_STATE */
1146
1147 break;
1148
1149 /* everything else means frontier not changed (HALTED or so) */
1150 default:
1151 break;
1152 }
1153 out:
1154 q->first_to_check=f_mod_no;
1155
1156 #ifdef QDIO_USE_PROCESSING_STATE
1157 if (last_position>=0)
1158 set_slsb(q, &last_position, SLSB_P_INPUT_PROCESSING, &count);
1159 #endif /* QDIO_USE_PROCESSING_STATE */
1160
1161 QDIO_DBF_HEX4(0,trace,&q->first_to_check,sizeof(int));
1162
1163 return q->first_to_check;
1164 }
1165
1166 static int
1167 qdio_has_inbound_q_moved(struct qdio_q *q)
1168 {
1169 int i;
1170
1171 i=qdio_get_inbound_buffer_frontier(q);
1172 if ( (i!=GET_SAVED_FRONTIER(q)) ||
1173 (q->error_status_flags&QDIO_STATUS_LOOK_FOR_ERROR) ) {
1174 SAVE_FRONTIER(q,i);
1175 if ((!q->siga_sync)&&(!q->hydra_gives_outbound_pcis))
1176 SAVE_TIMESTAMP(q);
1177
1178 QDIO_DBF_TEXT4(0,trace,"inhasmvd");
1179 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1180 return 1;
1181 } else {
1182 QDIO_DBF_TEXT4(0,trace,"inhsntmv");
1183 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1184 return 0;
1185 }
1186 }
1187
1188 /* means, no more buffers to be filled */
1189 static int
1190 tiqdio_is_inbound_q_done(struct qdio_q *q)
1191 {
1192 int no_used;
1193 unsigned int start_buf, count;
1194 unsigned char state = 0;
1195 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
1196
1197 #ifdef CONFIG_QDIO_DEBUG
1198 char dbf_text[15];
1199 #endif
1200
1201 no_used=atomic_read(&q->number_of_buffers_used);
1202
1203 /* propagate the change from 82 to 80 through VM */
1204 SYNC_MEMORY;
1205
1206 #ifdef CONFIG_QDIO_DEBUG
1207 if (no_used) {
1208 sprintf(dbf_text,"iqisnt%02x",no_used);
1209 QDIO_DBF_TEXT4(0,trace,dbf_text);
1210 } else {
1211 QDIO_DBF_TEXT4(0,trace,"iniqisdo");
1212 }
1213 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1214 #endif /* CONFIG_QDIO_DEBUG */
1215
1216 if (!no_used)
1217 return 1;
1218 if (!q->siga_sync && !irq->is_qebsm)
1219 /* we'll check for more primed buffers in qeth_stop_polling */
1220 return 0;
1221 if (irq->is_qebsm) {
1222 count = 1;
1223 start_buf = q->first_to_check;
1224 qdio_do_eqbs(q, &state, &start_buf, &count);
1225 } else
1226 state = q->slsb.acc.val[q->first_to_check];
1227 if (state != SLSB_P_INPUT_PRIMED)
1228 /*
1229 * nothing more to do, if next buffer is not PRIMED.
1230 * note that we did a SYNC_MEMORY before, that there
1231 * has been a sychnronization.
1232 * we will return 0 below, as there is nothing to do
1233 * (stop_polling not necessary, as we have not been
1234 * using the PROCESSING state
1235 */
1236 return 0;
1237
1238 /*
1239 * ok, the next input buffer is primed. that means, that device state
1240 * change indicator and adapter local summary are set, so we will find
1241 * it next time.
1242 * we will return 0 below, as there is nothing to do, except scheduling
1243 * ourselves for the next time.
1244 */
1245 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1246 tiqdio_sched_tl();
1247 return 0;
1248 }
1249
1250 static int
1251 qdio_is_inbound_q_done(struct qdio_q *q)
1252 {
1253 int no_used;
1254 unsigned int start_buf, count;
1255 unsigned char state = 0;
1256 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
1257
1258 #ifdef CONFIG_QDIO_DEBUG
1259 char dbf_text[15];
1260 #endif
1261
1262 no_used=atomic_read(&q->number_of_buffers_used);
1263
1264 /*
1265 * we need that one for synchronization with the adapter, as it
1266 * does a kind of PCI avoidance
1267 */
1268 SYNC_MEMORY;
1269
1270 if (!no_used) {
1271 QDIO_DBF_TEXT4(0,trace,"inqisdnA");
1272 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1273 return 1;
1274 }
1275 if (irq->is_qebsm) {
1276 count = 1;
1277 start_buf = q->first_to_check;
1278 qdio_do_eqbs(q, &state, &start_buf, &count);
1279 } else
1280 state = q->slsb.acc.val[q->first_to_check];
1281 if (state == SLSB_P_INPUT_PRIMED) {
1282 /* we got something to do */
1283 QDIO_DBF_TEXT4(0,trace,"inqisntA");
1284 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1285 return 0;
1286 }
1287
1288 /* on VM, we don't poll, so the q is always done here */
1289 if (q->siga_sync)
1290 return 1;
1291 if (q->hydra_gives_outbound_pcis)
1292 return 1;
1293
1294 /*
1295 * at this point we know, that inbound first_to_check
1296 * has (probably) not moved (see qdio_inbound_processing)
1297 */
1298 if (NOW>GET_SAVED_TIMESTAMP(q)+q->timing.threshold) {
1299 #ifdef CONFIG_QDIO_DEBUG
1300 QDIO_DBF_TEXT4(0,trace,"inqisdon");
1301 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1302 sprintf(dbf_text,"pf%02xcn%02x",q->first_to_check,no_used);
1303 QDIO_DBF_TEXT4(0,trace,dbf_text);
1304 #endif /* CONFIG_QDIO_DEBUG */
1305 return 1;
1306 } else {
1307 #ifdef CONFIG_QDIO_DEBUG
1308 QDIO_DBF_TEXT4(0,trace,"inqisntd");
1309 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1310 sprintf(dbf_text,"pf%02xcn%02x",q->first_to_check,no_used);
1311 QDIO_DBF_TEXT4(0,trace,dbf_text);
1312 #endif /* CONFIG_QDIO_DEBUG */
1313 return 0;
1314 }
1315 }
1316
1317 static void
1318 qdio_kick_inbound_handler(struct qdio_q *q)
1319 {
1320 int count, start, end, real_end, i;
1321 #ifdef CONFIG_QDIO_DEBUG
1322 char dbf_text[15];
1323 #endif
1324
1325 QDIO_DBF_TEXT4(0,trace,"kickinh");
1326 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1327
1328 start=q->first_element_to_kick;
1329 real_end=q->first_to_check;
1330 end=(real_end+QDIO_MAX_BUFFERS_PER_Q-1)&(QDIO_MAX_BUFFERS_PER_Q-1);
1331
1332 i=start;
1333 count=0;
1334 while (1) {
1335 count++;
1336 if (i==end)
1337 break;
1338 i=(i+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
1339 }
1340
1341 #ifdef CONFIG_QDIO_DEBUG
1342 sprintf(dbf_text,"s=%2xc=%2x",start,count);
1343 QDIO_DBF_TEXT4(0,trace,dbf_text);
1344 #endif /* CONFIG_QDIO_DEBUG */
1345
1346 if (likely(q->state==QDIO_IRQ_STATE_ACTIVE))
1347 q->handler(q->cdev,
1348 QDIO_STATUS_INBOUND_INT|q->error_status_flags,
1349 q->qdio_error,q->siga_error,q->q_no,start,count,
1350 q->int_parm);
1351
1352 /* for the next time: */
1353 q->first_element_to_kick=real_end;
1354 q->qdio_error=0;
1355 q->siga_error=0;
1356 q->error_status_flags=0;
1357
1358 qdio_perf_stat_inc(&perf_stats.inbound_cnt);
1359 }
1360
1361 static void
1362 __tiqdio_inbound_processing(struct qdio_q *q, int spare_ind_was_set)
1363 {
1364 struct qdio_irq *irq_ptr;
1365 struct qdio_q *oq;
1366 int i;
1367
1368 QDIO_DBF_TEXT4(0,trace,"iqinproc");
1369 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1370
1371 /*
1372 * we first want to reserve the q, so that we know, that we don't
1373 * interrupt ourselves and call qdio_unmark_q, as is_in_shutdown might
1374 * be set
1375 */
1376 if (unlikely(qdio_reserve_q(q))) {
1377 qdio_release_q(q);
1378 qdio_perf_stat_inc(&perf_stats.inbound_thin_tl_runs_resched);
1379 /*
1380 * as we might just be about to stop polling, we make
1381 * sure that we check again at least once more
1382 */
1383 tiqdio_sched_tl();
1384 return;
1385 }
1386 qdio_perf_stat_inc(&perf_stats.inbound_thin_tl_runs);
1387 if (unlikely(atomic_read(&q->is_in_shutdown))) {
1388 qdio_unmark_q(q);
1389 goto out;
1390 }
1391
1392 /*
1393 * we reset spare_ind_was_set, when the queue does not use the
1394 * spare indicator
1395 */
1396 if (spare_ind_was_set)
1397 spare_ind_was_set = (q->dev_st_chg_ind == &spare_indicator);
1398
1399 if (!(*(q->dev_st_chg_ind)) && !spare_ind_was_set)
1400 goto out;
1401 /*
1402 * q->dev_st_chg_ind is the indicator, be it shared or not.
1403 * only clear it, if indicator is non-shared
1404 */
1405 if (!spare_ind_was_set)
1406 tiqdio_clear_summary_bit((__u32*)q->dev_st_chg_ind);
1407
1408 if (q->hydra_gives_outbound_pcis) {
1409 if (!q->siga_sync_done_on_thinints) {
1410 SYNC_MEMORY_ALL;
1411 } else if (!q->siga_sync_done_on_outb_tis) {
1412 SYNC_MEMORY_ALL_OUTB;
1413 }
1414 } else {
1415 SYNC_MEMORY;
1416 }
1417 /*
1418 * maybe we have to do work on our outbound queues... at least
1419 * we have to check the outbound-int-capable thinint-capable
1420 * queues
1421 */
1422 if (q->hydra_gives_outbound_pcis) {
1423 irq_ptr = (struct qdio_irq*)q->irq_ptr;
1424 for (i=0;i<irq_ptr->no_output_qs;i++) {
1425 oq = irq_ptr->output_qs[i];
1426 if (!qdio_is_outbound_q_done(oq)) {
1427 qdio_perf_stat_dec(&perf_stats.tl_runs);
1428 __qdio_outbound_processing(oq);
1429 }
1430 }
1431 }
1432
1433 if (!qdio_has_inbound_q_moved(q))
1434 goto out;
1435
1436 qdio_kick_inbound_handler(q);
1437 if (tiqdio_is_inbound_q_done(q))
1438 if (!qdio_stop_polling(q)) {
1439 /*
1440 * we set the flags to get into the stuff next time,
1441 * see also comment in qdio_stop_polling
1442 */
1443 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1444 tiqdio_sched_tl();
1445 }
1446 out:
1447 qdio_release_q(q);
1448 }
1449
1450 static void
1451 tiqdio_inbound_processing(unsigned long q)
1452 {
1453 __tiqdio_inbound_processing((struct qdio_q *) q,
1454 atomic_read(&spare_indicator_usecount));
1455 }
1456
1457 static void
1458 __qdio_inbound_processing(struct qdio_q *q)
1459 {
1460 int q_laps=0;
1461
1462 QDIO_DBF_TEXT4(0,trace,"qinproc");
1463 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1464
1465 if (unlikely(qdio_reserve_q(q))) {
1466 qdio_release_q(q);
1467 qdio_perf_stat_inc(&perf_stats.inbound_tl_runs_resched);
1468 /* as we're sissies, we'll check next time */
1469 if (likely(!atomic_read(&q->is_in_shutdown))) {
1470 qdio_mark_q(q);
1471 QDIO_DBF_TEXT4(0,trace,"busy,agn");
1472 }
1473 return;
1474 }
1475 qdio_perf_stat_inc(&perf_stats.inbound_tl_runs);
1476 qdio_perf_stat_inc(&perf_stats.tl_runs);
1477
1478 again:
1479 if (qdio_has_inbound_q_moved(q)) {
1480 qdio_kick_inbound_handler(q);
1481 if (!qdio_stop_polling(q)) {
1482 q_laps++;
1483 if (q_laps<QDIO_Q_LAPS)
1484 goto again;
1485 }
1486 qdio_mark_q(q);
1487 } else {
1488 if (!qdio_is_inbound_q_done(q))
1489 /* means poll time is not yet over */
1490 qdio_mark_q(q);
1491 }
1492
1493 qdio_release_q(q);
1494 }
1495
1496 static void
1497 qdio_inbound_processing(unsigned long q)
1498 {
1499 __qdio_inbound_processing((struct qdio_q *) q);
1500 }
1501
1502 /************************* MAIN ROUTINES *******************************/
1503
1504 #ifdef QDIO_USE_PROCESSING_STATE
1505 static int
1506 tiqdio_reset_processing_state(struct qdio_q *q, int q_laps)
1507 {
1508 if (!q) {
1509 tiqdio_sched_tl();
1510 return 0;
1511 }
1512
1513 /*
1514 * under VM, we have not used the PROCESSING state, so no
1515 * need to stop polling
1516 */
1517 if (q->siga_sync)
1518 return 2;
1519
1520 if (unlikely(qdio_reserve_q(q))) {
1521 qdio_release_q(q);
1522 qdio_perf_stat_inc(&perf_stats.inbound_thin_tl_runs_resched);
1523 /*
1524 * as we might just be about to stop polling, we make
1525 * sure that we check again at least once more
1526 */
1527
1528 /*
1529 * sanity -- we'd get here without setting the
1530 * dev st chg ind
1531 */
1532 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1533 tiqdio_sched_tl();
1534 return 0;
1535 }
1536 if (qdio_stop_polling(q)) {
1537 qdio_release_q(q);
1538 return 2;
1539 }
1540 if (q_laps<QDIO_Q_LAPS-1) {
1541 qdio_release_q(q);
1542 return 3;
1543 }
1544 /*
1545 * we set the flags to get into the stuff
1546 * next time, see also comment in qdio_stop_polling
1547 */
1548 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1549 tiqdio_sched_tl();
1550 qdio_release_q(q);
1551 return 1;
1552
1553 }
1554 #endif /* QDIO_USE_PROCESSING_STATE */
1555
1556 static void
1557 tiqdio_inbound_checks(void)
1558 {
1559 struct qdio_q *q;
1560 int spare_ind_was_set=0;
1561 #ifdef QDIO_USE_PROCESSING_STATE
1562 int q_laps=0;
1563 #endif /* QDIO_USE_PROCESSING_STATE */
1564
1565 QDIO_DBF_TEXT4(0,trace,"iqdinbck");
1566 QDIO_DBF_TEXT5(0,trace,"iqlocsum");
1567
1568 #ifdef QDIO_USE_PROCESSING_STATE
1569 again:
1570 #endif /* QDIO_USE_PROCESSING_STATE */
1571
1572 /* when the spare indicator is used and set, save that and clear it */
1573 if ((atomic_read(&spare_indicator_usecount)) && spare_indicator) {
1574 spare_ind_was_set = 1;
1575 tiqdio_clear_summary_bit((__u32*)&spare_indicator);
1576 }
1577
1578 q=(struct qdio_q*)tiq_list;
1579 do {
1580 if (!q)
1581 break;
1582 __tiqdio_inbound_processing(q, spare_ind_was_set);
1583 q=(struct qdio_q*)q->list_next;
1584 } while (q!=(struct qdio_q*)tiq_list);
1585
1586 #ifdef QDIO_USE_PROCESSING_STATE
1587 q=(struct qdio_q*)tiq_list;
1588 do {
1589 int ret;
1590
1591 ret = tiqdio_reset_processing_state(q, q_laps);
1592 switch (ret) {
1593 case 0:
1594 return;
1595 case 1:
1596 q_laps++;
1597 case 2:
1598 q = (struct qdio_q*)q->list_next;
1599 break;
1600 default:
1601 q_laps++;
1602 goto again;
1603 }
1604 } while (q!=(struct qdio_q*)tiq_list);
1605 #endif /* QDIO_USE_PROCESSING_STATE */
1606 }
1607
1608 static void
1609 tiqdio_tl(unsigned long data)
1610 {
1611 QDIO_DBF_TEXT4(0,trace,"iqdio_tl");
1612
1613 qdio_perf_stat_inc(&perf_stats.tl_runs);
1614
1615 tiqdio_inbound_checks();
1616 }
1617
1618 /********************* GENERAL HELPER_ROUTINES ***********************/
1619
1620 static void
1621 qdio_release_irq_memory(struct qdio_irq *irq_ptr)
1622 {
1623 int i;
1624 struct qdio_q *q;
1625
1626 for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) {
1627 q = irq_ptr->input_qs[i];
1628 if (q) {
1629 free_page((unsigned long) q->slib);
1630 kmem_cache_free(qdio_q_cache, q);
1631 }
1632 q = irq_ptr->output_qs[i];
1633 if (q) {
1634 free_page((unsigned long) q->slib);
1635 kmem_cache_free(qdio_q_cache, q);
1636 }
1637 }
1638 free_page((unsigned long) irq_ptr->qdr);
1639 free_page((unsigned long) irq_ptr);
1640 }
1641
1642 static void
1643 qdio_set_impl_params(struct qdio_irq *irq_ptr,
1644 unsigned int qib_param_field_format,
1645 /* pointer to 128 bytes or NULL, if no param field */
1646 unsigned char *qib_param_field,
1647 /* pointer to no_queues*128 words of data or NULL */
1648 unsigned int no_input_qs,
1649 unsigned int no_output_qs,
1650 unsigned long *input_slib_elements,
1651 unsigned long *output_slib_elements)
1652 {
1653 int i,j;
1654
1655 if (!irq_ptr)
1656 return;
1657
1658 irq_ptr->qib.pfmt=qib_param_field_format;
1659 if (qib_param_field)
1660 memcpy(irq_ptr->qib.parm,qib_param_field,
1661 QDIO_MAX_BUFFERS_PER_Q);
1662
1663 if (input_slib_elements)
1664 for (i=0;i<no_input_qs;i++) {
1665 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1666 irq_ptr->input_qs[i]->slib->slibe[j].parms=
1667 input_slib_elements[
1668 i*QDIO_MAX_BUFFERS_PER_Q+j];
1669 }
1670 if (output_slib_elements)
1671 for (i=0;i<no_output_qs;i++) {
1672 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1673 irq_ptr->output_qs[i]->slib->slibe[j].parms=
1674 output_slib_elements[
1675 i*QDIO_MAX_BUFFERS_PER_Q+j];
1676 }
1677 }
1678
1679 static int
1680 qdio_alloc_qs(struct qdio_irq *irq_ptr,
1681 int no_input_qs, int no_output_qs)
1682 {
1683 int i;
1684 struct qdio_q *q;
1685
1686 for (i = 0; i < no_input_qs; i++) {
1687 q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL);
1688 if (!q)
1689 return -ENOMEM;
1690 memset(q, 0, sizeof(*q));
1691
1692 q->slib = (struct slib *) __get_free_page(GFP_KERNEL);
1693 if (!q->slib) {
1694 kmem_cache_free(qdio_q_cache, q);
1695 return -ENOMEM;
1696 }
1697 irq_ptr->input_qs[i]=q;
1698 }
1699
1700 for (i = 0; i < no_output_qs; i++) {
1701 q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL);
1702 if (!q)
1703 return -ENOMEM;
1704 memset(q, 0, sizeof(*q));
1705
1706 q->slib = (struct slib *) __get_free_page(GFP_KERNEL);
1707 if (!q->slib) {
1708 kmem_cache_free(qdio_q_cache, q);
1709 return -ENOMEM;
1710 }
1711 irq_ptr->output_qs[i]=q;
1712 }
1713 return 0;
1714 }
1715
1716 static void
1717 qdio_fill_qs(struct qdio_irq *irq_ptr, struct ccw_device *cdev,
1718 int no_input_qs, int no_output_qs,
1719 qdio_handler_t *input_handler,
1720 qdio_handler_t *output_handler,
1721 unsigned long int_parm,int q_format,
1722 unsigned long flags,
1723 void **inbound_sbals_array,
1724 void **outbound_sbals_array)
1725 {
1726 struct qdio_q *q;
1727 int i,j;
1728 char dbf_text[20]; /* see qdio_initialize */
1729 void *ptr;
1730 int available;
1731
1732 sprintf(dbf_text,"qfqs%4x",cdev->private->schid.sch_no);
1733 QDIO_DBF_TEXT0(0,setup,dbf_text);
1734 for (i=0;i<no_input_qs;i++) {
1735 q=irq_ptr->input_qs[i];
1736
1737 memset(q,0,((char*)&q->slib)-((char*)q));
1738 sprintf(dbf_text,"in-q%4x",i);
1739 QDIO_DBF_TEXT0(0,setup,dbf_text);
1740 QDIO_DBF_HEX0(0,setup,&q,sizeof(void*));
1741
1742 memset(q->slib,0,PAGE_SIZE);
1743 q->sl=(struct sl*)(((char*)q->slib)+PAGE_SIZE/2);
1744
1745 available=0;
1746
1747 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1748 q->sbal[j]=*(inbound_sbals_array++);
1749
1750 q->queue_type=q_format;
1751 q->int_parm=int_parm;
1752 q->schid = irq_ptr->schid;
1753 q->irq_ptr = irq_ptr;
1754 q->cdev = cdev;
1755 q->mask=1<<(31-i);
1756 q->q_no=i;
1757 q->is_input_q=1;
1758 q->first_to_check=0;
1759 q->last_move_ftc=0;
1760 q->handler=input_handler;
1761 q->dev_st_chg_ind=irq_ptr->dev_st_chg_ind;
1762
1763 /* q->is_thinint_q isn't valid at this time, but
1764 * irq_ptr->is_thinint_irq is
1765 */
1766 if (irq_ptr->is_thinint_irq)
1767 tasklet_init(&q->tasklet, tiqdio_inbound_processing,
1768 (unsigned long) q);
1769 else
1770 tasklet_init(&q->tasklet, qdio_inbound_processing,
1771 (unsigned long) q);
1772
1773 /* actually this is not used for inbound queues. yet. */
1774 atomic_set(&q->busy_siga_counter,0);
1775 q->timing.busy_start=0;
1776
1777 /* for (j=0;j<QDIO_STATS_NUMBER;j++)
1778 q->timing.last_transfer_times[j]=(qdio_get_micros()/
1779 QDIO_STATS_NUMBER)*j;
1780 q->timing.last_transfer_index=QDIO_STATS_NUMBER-1;
1781 */
1782
1783 /* fill in slib */
1784 if (i>0) irq_ptr->input_qs[i-1]->slib->nsliba=
1785 (unsigned long)(q->slib);
1786 q->slib->sla=(unsigned long)(q->sl);
1787 q->slib->slsba=(unsigned long)(&q->slsb.acc.val[0]);
1788
1789 /* fill in sl */
1790 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1791 q->sl->element[j].sbal=(unsigned long)(q->sbal[j]);
1792
1793 QDIO_DBF_TEXT2(0,setup,"sl-sb-b0");
1794 ptr=(void*)q->sl;
1795 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1796 ptr=(void*)&q->slsb;
1797 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1798 ptr=(void*)q->sbal[0];
1799 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1800
1801 /* fill in slsb */
1802 if (!irq_ptr->is_qebsm) {
1803 unsigned int count = 1;
1804 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
1805 set_slsb(q, &j, SLSB_P_INPUT_NOT_INIT, &count);
1806 }
1807 }
1808
1809 for (i=0;i<no_output_qs;i++) {
1810 q=irq_ptr->output_qs[i];
1811 memset(q,0,((char*)&q->slib)-((char*)q));
1812
1813 sprintf(dbf_text,"outq%4x",i);
1814 QDIO_DBF_TEXT0(0,setup,dbf_text);
1815 QDIO_DBF_HEX0(0,setup,&q,sizeof(void*));
1816
1817 memset(q->slib,0,PAGE_SIZE);
1818 q->sl=(struct sl*)(((char*)q->slib)+PAGE_SIZE/2);
1819
1820 available=0;
1821
1822 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1823 q->sbal[j]=*(outbound_sbals_array++);
1824
1825 q->queue_type=q_format;
1826 if ((q->queue_type == QDIO_IQDIO_QFMT) &&
1827 (no_output_qs > 1) &&
1828 (i == no_output_qs-1))
1829 q->queue_type = QDIO_IQDIO_QFMT_ASYNCH;
1830 q->int_parm=int_parm;
1831 q->is_input_q=0;
1832 q->is_pci_out = 0;
1833 q->schid = irq_ptr->schid;
1834 q->cdev = cdev;
1835 q->irq_ptr = irq_ptr;
1836 q->mask=1<<(31-i);
1837 q->q_no=i;
1838 q->first_to_check=0;
1839 q->last_move_ftc=0;
1840 q->handler=output_handler;
1841
1842 tasklet_init(&q->tasklet, qdio_outbound_processing,
1843 (unsigned long) q);
1844 setup_timer(&q->timer, qdio_outbound_processing,
1845 (unsigned long) q);
1846
1847 atomic_set(&q->busy_siga_counter,0);
1848 q->timing.busy_start=0;
1849
1850 /* fill in slib */
1851 if (i>0) irq_ptr->output_qs[i-1]->slib->nsliba=
1852 (unsigned long)(q->slib);
1853 q->slib->sla=(unsigned long)(q->sl);
1854 q->slib->slsba=(unsigned long)(&q->slsb.acc.val[0]);
1855
1856 /* fill in sl */
1857 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1858 q->sl->element[j].sbal=(unsigned long)(q->sbal[j]);
1859
1860 QDIO_DBF_TEXT2(0,setup,"sl-sb-b0");
1861 ptr=(void*)q->sl;
1862 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1863 ptr=(void*)&q->slsb;
1864 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1865 ptr=(void*)q->sbal[0];
1866 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1867
1868 /* fill in slsb */
1869 if (!irq_ptr->is_qebsm) {
1870 unsigned int count = 1;
1871 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
1872 set_slsb(q, &j, SLSB_P_OUTPUT_NOT_INIT, &count);
1873 }
1874 }
1875 }
1876
1877 static void
1878 qdio_fill_thresholds(struct qdio_irq *irq_ptr,
1879 unsigned int no_input_qs,
1880 unsigned int no_output_qs,
1881 unsigned int min_input_threshold,
1882 unsigned int max_input_threshold,
1883 unsigned int min_output_threshold,
1884 unsigned int max_output_threshold)
1885 {
1886 int i;
1887 struct qdio_q *q;
1888
1889 for (i=0;i<no_input_qs;i++) {
1890 q=irq_ptr->input_qs[i];
1891 q->timing.threshold=max_input_threshold;
1892 /* for (j=0;j<QDIO_STATS_CLASSES;j++) {
1893 q->threshold_classes[j].threshold=
1894 min_input_threshold+
1895 (max_input_threshold-min_input_threshold)/
1896 QDIO_STATS_CLASSES;
1897 }
1898 qdio_use_thresholds(q,QDIO_STATS_CLASSES/2);*/
1899 }
1900 for (i=0;i<no_output_qs;i++) {
1901 q=irq_ptr->output_qs[i];
1902 q->timing.threshold=max_output_threshold;
1903 /* for (j=0;j<QDIO_STATS_CLASSES;j++) {
1904 q->threshold_classes[j].threshold=
1905 min_output_threshold+
1906 (max_output_threshold-min_output_threshold)/
1907 QDIO_STATS_CLASSES;
1908 }
1909 qdio_use_thresholds(q,QDIO_STATS_CLASSES/2);*/
1910 }
1911 }
1912
1913 static void tiqdio_thinint_handler(void *ind, void *drv_data)
1914 {
1915 QDIO_DBF_TEXT4(0,trace,"thin_int");
1916
1917 qdio_perf_stat_inc(&perf_stats.thinints);
1918
1919 /* SVS only when needed:
1920 * issue SVS to benefit from iqdio interrupt avoidance
1921 * (SVS clears AISOI)*/
1922 if (!omit_svs)
1923 tiqdio_clear_global_summary();
1924
1925 tiqdio_inbound_checks();
1926 }
1927
1928 static void
1929 qdio_set_state(struct qdio_irq *irq_ptr, enum qdio_irq_states state)
1930 {
1931 int i;
1932 #ifdef CONFIG_QDIO_DEBUG
1933 char dbf_text[15];
1934
1935 QDIO_DBF_TEXT5(0,trace,"newstate");
1936 sprintf(dbf_text,"%4x%4x",irq_ptr->schid.sch_no,state);
1937 QDIO_DBF_TEXT5(0,trace,dbf_text);
1938 #endif /* CONFIG_QDIO_DEBUG */
1939
1940 irq_ptr->state=state;
1941 for (i=0;i<irq_ptr->no_input_qs;i++)
1942 irq_ptr->input_qs[i]->state=state;
1943 for (i=0;i<irq_ptr->no_output_qs;i++)
1944 irq_ptr->output_qs[i]->state=state;
1945 mb();
1946 }
1947
1948 static void
1949 qdio_irq_check_sense(struct subchannel_id schid, struct irb *irb)
1950 {
1951 char dbf_text[15];
1952
1953 if (irb->esw.esw0.erw.cons) {
1954 sprintf(dbf_text,"sens%4x",schid.sch_no);
1955 QDIO_DBF_TEXT2(1,trace,dbf_text);
1956 QDIO_DBF_HEX0(0,sense,irb,QDIO_DBF_SENSE_LEN);
1957
1958 QDIO_PRINT_WARN("sense data available on qdio channel.\n");
1959 QDIO_HEXDUMP16(WARN,"irb: ",irb);
1960 QDIO_HEXDUMP16(WARN,"sense data: ",irb->ecw);
1961 }
1962
1963 }
1964
1965 static void
1966 qdio_handle_pci(struct qdio_irq *irq_ptr)
1967 {
1968 int i;
1969 struct qdio_q *q;
1970
1971 qdio_perf_stat_inc(&perf_stats.pcis);
1972 for (i=0;i<irq_ptr->no_input_qs;i++) {
1973 q=irq_ptr->input_qs[i];
1974 if (q->is_input_q&QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT)
1975 qdio_mark_q(q);
1976 else {
1977 qdio_perf_stat_dec(&perf_stats.tl_runs);
1978 __qdio_inbound_processing(q);
1979 }
1980 }
1981 if (!irq_ptr->hydra_gives_outbound_pcis)
1982 return;
1983 for (i=0;i<irq_ptr->no_output_qs;i++) {
1984 q=irq_ptr->output_qs[i];
1985 if (qdio_is_outbound_q_done(q))
1986 continue;
1987 qdio_perf_stat_dec(&perf_stats.tl_runs);
1988 if (!irq_ptr->sync_done_on_outb_pcis)
1989 SYNC_MEMORY;
1990 __qdio_outbound_processing(q);
1991 }
1992 }
1993
1994 static void qdio_establish_handle_irq(struct ccw_device*, int, int);
1995
1996 static void
1997 qdio_handle_activate_check(struct ccw_device *cdev, unsigned long intparm,
1998 int cstat, int dstat)
1999 {
2000 struct qdio_irq *irq_ptr;
2001 struct qdio_q *q;
2002 char dbf_text[15];
2003
2004 irq_ptr = cdev->private->qdio_data;
2005
2006 QDIO_DBF_TEXT2(1, trace, "ick2");
2007 sprintf(dbf_text,"%s", cdev->dev.bus_id);
2008 QDIO_DBF_TEXT2(1,trace,dbf_text);
2009 QDIO_DBF_HEX2(0,trace,&intparm,sizeof(int));
2010 QDIO_DBF_HEX2(0,trace,&dstat,sizeof(int));
2011 QDIO_DBF_HEX2(0,trace,&cstat,sizeof(int));
2012 QDIO_PRINT_ERR("received check condition on activate " \
2013 "queues on device %s (cs=x%x, ds=x%x).\n",
2014 cdev->dev.bus_id, cstat, dstat);
2015 if (irq_ptr->no_input_qs) {
2016 q=irq_ptr->input_qs[0];
2017 } else if (irq_ptr->no_output_qs) {
2018 q=irq_ptr->output_qs[0];
2019 } else {
2020 QDIO_PRINT_ERR("oops... no queue registered for device %s!?\n",
2021 cdev->dev.bus_id);
2022 goto omit_handler_call;
2023 }
2024 q->handler(q->cdev,QDIO_STATUS_ACTIVATE_CHECK_CONDITION|
2025 QDIO_STATUS_LOOK_FOR_ERROR,
2026 0,0,0,-1,-1,q->int_parm);
2027 omit_handler_call:
2028 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_STOPPED);
2029
2030 }
2031
2032 static void
2033 qdio_call_shutdown(struct work_struct *work)
2034 {
2035 struct ccw_device_private *priv;
2036 struct ccw_device *cdev;
2037
2038 priv = container_of(work, struct ccw_device_private, kick_work);
2039 cdev = priv->cdev;
2040 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
2041 put_device(&cdev->dev);
2042 }
2043
2044 static void
2045 qdio_timeout_handler(struct ccw_device *cdev)
2046 {
2047 struct qdio_irq *irq_ptr;
2048 char dbf_text[15];
2049
2050 QDIO_DBF_TEXT2(0, trace, "qtoh");
2051 sprintf(dbf_text, "%s", cdev->dev.bus_id);
2052 QDIO_DBF_TEXT2(0, trace, dbf_text);
2053
2054 irq_ptr = cdev->private->qdio_data;
2055 sprintf(dbf_text, "state:%d", irq_ptr->state);
2056 QDIO_DBF_TEXT2(0, trace, dbf_text);
2057
2058 switch (irq_ptr->state) {
2059 case QDIO_IRQ_STATE_INACTIVE:
2060 QDIO_PRINT_ERR("establish queues on irq 0.%x.%04x: timed out\n",
2061 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2062 QDIO_DBF_TEXT2(1,setup,"eq:timeo");
2063 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2064 break;
2065 case QDIO_IRQ_STATE_CLEANUP:
2066 QDIO_PRINT_INFO("Did not get interrupt on cleanup, "
2067 "irq=0.%x.%x.\n",
2068 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2069 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2070 break;
2071 case QDIO_IRQ_STATE_ESTABLISHED:
2072 case QDIO_IRQ_STATE_ACTIVE:
2073 /* I/O has been terminated by common I/O layer. */
2074 QDIO_PRINT_INFO("Queues on irq 0.%x.%04x killed by cio.\n",
2075 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2076 QDIO_DBF_TEXT2(1, trace, "cio:term");
2077 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
2078 if (get_device(&cdev->dev)) {
2079 /* Can't call shutdown from interrupt context. */
2080 PREPARE_WORK(&cdev->private->kick_work,
2081 qdio_call_shutdown);
2082 queue_work(ccw_device_work, &cdev->private->kick_work);
2083 }
2084 break;
2085 default:
2086 BUG();
2087 }
2088 ccw_device_set_timeout(cdev, 0);
2089 wake_up(&cdev->private->wait_q);
2090 }
2091
2092 static void
2093 qdio_handler(struct ccw_device *cdev, unsigned long intparm, struct irb *irb)
2094 {
2095 struct qdio_irq *irq_ptr;
2096 int cstat,dstat;
2097 char dbf_text[15];
2098
2099 #ifdef CONFIG_QDIO_DEBUG
2100 QDIO_DBF_TEXT4(0, trace, "qint");
2101 sprintf(dbf_text, "%s", cdev->dev.bus_id);
2102 QDIO_DBF_TEXT4(0, trace, dbf_text);
2103 #endif /* CONFIG_QDIO_DEBUG */
2104
2105 if (!intparm) {
2106 QDIO_PRINT_ERR("got unsolicited interrupt in qdio " \
2107 "handler, device %s\n", cdev->dev.bus_id);
2108 return;
2109 }
2110
2111 irq_ptr = cdev->private->qdio_data;
2112 if (!irq_ptr) {
2113 QDIO_DBF_TEXT2(1, trace, "uint");
2114 sprintf(dbf_text,"%s", cdev->dev.bus_id);
2115 QDIO_DBF_TEXT2(1,trace,dbf_text);
2116 QDIO_PRINT_ERR("received interrupt on unused device %s!\n",
2117 cdev->dev.bus_id);
2118 return;
2119 }
2120
2121 if (IS_ERR(irb)) {
2122 /* Currently running i/o is in error. */
2123 switch (PTR_ERR(irb)) {
2124 case -EIO:
2125 QDIO_PRINT_ERR("i/o error on device %s\n",
2126 cdev->dev.bus_id);
2127 return;
2128 case -ETIMEDOUT:
2129 qdio_timeout_handler(cdev);
2130 return;
2131 default:
2132 QDIO_PRINT_ERR("unknown error state %ld on device %s\n",
2133 PTR_ERR(irb), cdev->dev.bus_id);
2134 return;
2135 }
2136 }
2137
2138 qdio_irq_check_sense(irq_ptr->schid, irb);
2139
2140 #ifdef CONFIG_QDIO_DEBUG
2141 sprintf(dbf_text, "state:%d", irq_ptr->state);
2142 QDIO_DBF_TEXT4(0, trace, dbf_text);
2143 #endif /* CONFIG_QDIO_DEBUG */
2144
2145 cstat = irb->scsw.cstat;
2146 dstat = irb->scsw.dstat;
2147
2148 switch (irq_ptr->state) {
2149 case QDIO_IRQ_STATE_INACTIVE:
2150 qdio_establish_handle_irq(cdev, cstat, dstat);
2151 break;
2152
2153 case QDIO_IRQ_STATE_CLEANUP:
2154 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2155 break;
2156
2157 case QDIO_IRQ_STATE_ESTABLISHED:
2158 case QDIO_IRQ_STATE_ACTIVE:
2159 if (cstat & SCHN_STAT_PCI) {
2160 qdio_handle_pci(irq_ptr);
2161 break;
2162 }
2163
2164 if ((cstat&~SCHN_STAT_PCI)||dstat) {
2165 qdio_handle_activate_check(cdev, intparm, cstat, dstat);
2166 break;
2167 }
2168 default:
2169 QDIO_PRINT_ERR("got interrupt for queues in state %d on " \
2170 "device %s?!\n",
2171 irq_ptr->state, cdev->dev.bus_id);
2172 }
2173 wake_up(&cdev->private->wait_q);
2174
2175 }
2176
2177 int
2178 qdio_synchronize(struct ccw_device *cdev, unsigned int flags,
2179 unsigned int queue_number)
2180 {
2181 int cc = 0;
2182 struct qdio_q *q;
2183 struct qdio_irq *irq_ptr;
2184 void *ptr;
2185 #ifdef CONFIG_QDIO_DEBUG
2186 char dbf_text[15]="SyncXXXX";
2187 #endif
2188
2189 irq_ptr = cdev->private->qdio_data;
2190 if (!irq_ptr)
2191 return -ENODEV;
2192
2193 #ifdef CONFIG_QDIO_DEBUG
2194 *((int*)(&dbf_text[4])) = irq_ptr->schid.sch_no;
2195 QDIO_DBF_HEX4(0,trace,dbf_text,QDIO_DBF_TRACE_LEN);
2196 *((int*)(&dbf_text[0]))=flags;
2197 *((int*)(&dbf_text[4]))=queue_number;
2198 QDIO_DBF_HEX4(0,trace,dbf_text,QDIO_DBF_TRACE_LEN);
2199 #endif /* CONFIG_QDIO_DEBUG */
2200
2201 if (flags&QDIO_FLAG_SYNC_INPUT) {
2202 q=irq_ptr->input_qs[queue_number];
2203 if (!q)
2204 return -EINVAL;
2205 if (!(irq_ptr->is_qebsm))
2206 cc = do_siga_sync(q->schid, 0, q->mask);
2207 } else if (flags&QDIO_FLAG_SYNC_OUTPUT) {
2208 q=irq_ptr->output_qs[queue_number];
2209 if (!q)
2210 return -EINVAL;
2211 if (!(irq_ptr->is_qebsm))
2212 cc = do_siga_sync(q->schid, q->mask, 0);
2213 } else
2214 return -EINVAL;
2215
2216 ptr=&cc;
2217 if (cc)
2218 QDIO_DBF_HEX3(0,trace,&ptr,sizeof(int));
2219
2220 return cc;
2221 }
2222
2223 static void
2224 qdio_check_subchannel_qebsm(struct qdio_irq *irq_ptr, unsigned char qdioac,
2225 unsigned long token)
2226 {
2227 struct qdio_q *q;
2228 int i;
2229 unsigned int count, start_buf;
2230 char dbf_text[15];
2231
2232 /*check if QEBSM is disabled */
2233 if (!(irq_ptr->is_qebsm) || !(qdioac & 0x01)) {
2234 irq_ptr->is_qebsm = 0;
2235 irq_ptr->sch_token = 0;
2236 irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM;
2237 QDIO_DBF_TEXT0(0,setup,"noV=V");
2238 return;
2239 }
2240 irq_ptr->sch_token = token;
2241 /*input queue*/
2242 for (i = 0; i < irq_ptr->no_input_qs;i++) {
2243 q = irq_ptr->input_qs[i];
2244 count = QDIO_MAX_BUFFERS_PER_Q;
2245 start_buf = 0;
2246 set_slsb(q, &start_buf, SLSB_P_INPUT_NOT_INIT, &count);
2247 }
2248 sprintf(dbf_text,"V=V:%2x",irq_ptr->is_qebsm);
2249 QDIO_DBF_TEXT0(0,setup,dbf_text);
2250 sprintf(dbf_text,"%8lx",irq_ptr->sch_token);
2251 QDIO_DBF_TEXT0(0,setup,dbf_text);
2252 /*output queue*/
2253 for (i = 0; i < irq_ptr->no_output_qs; i++) {
2254 q = irq_ptr->output_qs[i];
2255 count = QDIO_MAX_BUFFERS_PER_Q;
2256 start_buf = 0;
2257 set_slsb(q, &start_buf, SLSB_P_OUTPUT_NOT_INIT, &count);
2258 }
2259 }
2260
2261 static void
2262 qdio_get_ssqd_information(struct qdio_irq *irq_ptr)
2263 {
2264 int result;
2265 unsigned char qdioac;
2266 struct {
2267 struct chsc_header request;
2268 u16 reserved1:10;
2269 u16 ssid:2;
2270 u16 fmt:4;
2271 u16 first_sch;
2272 u16 reserved2;
2273 u16 last_sch;
2274 u32 reserved3;
2275 struct chsc_header response;
2276 u32 reserved4;
2277 u8 flags;
2278 u8 reserved5;
2279 u16 sch;
2280 u8 qfmt;
2281 u8 parm;
2282 u8 qdioac1;
2283 u8 sch_class;
2284 u8 reserved7;
2285 u8 icnt;
2286 u8 reserved8;
2287 u8 ocnt;
2288 u8 reserved9;
2289 u8 mbccnt;
2290 u16 qdioac2;
2291 u64 sch_token;
2292 } *ssqd_area;
2293
2294 QDIO_DBF_TEXT0(0,setup,"getssqd");
2295 qdioac = 0;
2296 ssqd_area = mempool_alloc(qdio_mempool_scssc, GFP_ATOMIC);
2297 if (!ssqd_area) {
2298 QDIO_PRINT_WARN("Could not get memory for chsc. Using all " \
2299 "SIGAs for sch x%x.\n", irq_ptr->schid.sch_no);
2300 irq_ptr->qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY |
2301 CHSC_FLAG_SIGA_OUTPUT_NECESSARY |
2302 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* all flags set */
2303 irq_ptr->is_qebsm = 0;
2304 irq_ptr->sch_token = 0;
2305 irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM;
2306 return;
2307 }
2308
2309 ssqd_area->request = (struct chsc_header) {
2310 .length = 0x0010,
2311 .code = 0x0024,
2312 };
2313 ssqd_area->first_sch = irq_ptr->schid.sch_no;
2314 ssqd_area->last_sch = irq_ptr->schid.sch_no;
2315 ssqd_area->ssid = irq_ptr->schid.ssid;
2316 result = chsc(ssqd_area);
2317
2318 if (result) {
2319 QDIO_PRINT_WARN("CHSC returned cc %i. Using all " \
2320 "SIGAs for sch 0.%x.%x.\n", result,
2321 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2322 qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY |
2323 CHSC_FLAG_SIGA_OUTPUT_NECESSARY |
2324 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* all flags set */
2325 irq_ptr->is_qebsm = 0;
2326 goto out;
2327 }
2328
2329 if (ssqd_area->response.code != QDIO_CHSC_RESPONSE_CODE_OK) {
2330 QDIO_PRINT_WARN("response upon checking SIGA needs " \
2331 "is 0x%x. Using all SIGAs for sch 0.%x.%x.\n",
2332 ssqd_area->response.code,
2333 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2334 qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY |
2335 CHSC_FLAG_SIGA_OUTPUT_NECESSARY |
2336 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* all flags set */
2337 irq_ptr->is_qebsm = 0;
2338 goto out;
2339 }
2340 if (!(ssqd_area->flags & CHSC_FLAG_QDIO_CAPABILITY) ||
2341 !(ssqd_area->flags & CHSC_FLAG_VALIDITY) ||
2342 (ssqd_area->sch != irq_ptr->schid.sch_no)) {
2343 QDIO_PRINT_WARN("huh? problems checking out sch 0.%x.%x... " \
2344 "using all SIGAs.\n",
2345 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2346 qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY |
2347 CHSC_FLAG_SIGA_OUTPUT_NECESSARY |
2348 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* worst case */
2349 irq_ptr->is_qebsm = 0;
2350 goto out;
2351 }
2352 qdioac = ssqd_area->qdioac1;
2353 out:
2354 qdio_check_subchannel_qebsm(irq_ptr, qdioac,
2355 ssqd_area->sch_token);
2356 mempool_free(ssqd_area, qdio_mempool_scssc);
2357 irq_ptr->qdioac = qdioac;
2358 }
2359
2360 static unsigned int
2361 tiqdio_check_chsc_availability(void)
2362 {
2363 char dbf_text[15];
2364
2365 if (!css_characteristics_avail)
2366 return -EIO;
2367
2368 /* Check for bit 41. */
2369 if (!css_general_characteristics.aif) {
2370 QDIO_PRINT_WARN("Adapter interruption facility not " \
2371 "installed.\n");
2372 return -ENOENT;
2373 }
2374
2375 /* Check for bits 107 and 108. */
2376 if (!css_chsc_characteristics.scssc ||
2377 !css_chsc_characteristics.scsscf) {
2378 QDIO_PRINT_WARN("Set Chan Subsys. Char. & Fast-CHSCs " \
2379 "not available.\n");
2380 return -ENOENT;
2381 }
2382
2383 /* Check for OSA/FCP thin interrupts (bit 67). */
2384 hydra_thinints = css_general_characteristics.aif_osa;
2385 sprintf(dbf_text,"hydrati%1x", hydra_thinints);
2386 QDIO_DBF_TEXT0(0,setup,dbf_text);
2387
2388 #ifdef CONFIG_64BIT
2389 /* Check for QEBSM support in general (bit 58). */
2390 is_passthrough = css_general_characteristics.qebsm;
2391 #endif
2392 sprintf(dbf_text,"cssQBS:%1x", is_passthrough);
2393 QDIO_DBF_TEXT0(0,setup,dbf_text);
2394
2395 /* Check for aif time delay disablement fac (bit 56). If installed,
2396 * omit svs even under lpar (good point by rick again) */
2397 omit_svs = css_general_characteristics.aif_tdd;
2398 sprintf(dbf_text,"omitsvs%1x", omit_svs);
2399 QDIO_DBF_TEXT0(0,setup,dbf_text);
2400 return 0;
2401 }
2402
2403
2404 static unsigned int
2405 tiqdio_set_subchannel_ind(struct qdio_irq *irq_ptr, int reset_to_zero)
2406 {
2407 unsigned long real_addr_local_summary_bit;
2408 unsigned long real_addr_dev_st_chg_ind;
2409 void *ptr;
2410 char dbf_text[15];
2411
2412 unsigned int resp_code;
2413 int result;
2414
2415 struct {
2416 struct chsc_header request;
2417 u16 operation_code;
2418 u16 reserved1;
2419 u32 reserved2;
2420 u32 reserved3;
2421 u64 summary_indicator_addr;
2422 u64 subchannel_indicator_addr;
2423 u32 ks:4;
2424 u32 kc:4;
2425 u32 reserved4:21;
2426 u32 isc:3;
2427 u32 word_with_d_bit;
2428 /* set to 0x10000000 to enable
2429 * time delay disablement facility */
2430 u32 reserved5;
2431 struct subchannel_id schid;
2432 u32 reserved6[1004];
2433 struct chsc_header response;
2434 u32 reserved7;
2435 } *scssc_area;
2436
2437 if (!irq_ptr->is_thinint_irq)
2438 return -ENODEV;
2439
2440 if (reset_to_zero) {
2441 real_addr_local_summary_bit=0;
2442 real_addr_dev_st_chg_ind=0;
2443 } else {
2444 real_addr_local_summary_bit=
2445 virt_to_phys((volatile void *)tiqdio_ind);
2446 real_addr_dev_st_chg_ind=
2447 virt_to_phys((volatile void *)irq_ptr->dev_st_chg_ind);
2448 }
2449
2450 scssc_area = mempool_alloc(qdio_mempool_scssc, GFP_ATOMIC);
2451 if (!scssc_area) {
2452 QDIO_PRINT_WARN("No memory for setting indicators on " \
2453 "subchannel 0.%x.%x.\n",
2454 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2455 return -ENOMEM;
2456 }
2457 scssc_area->request = (struct chsc_header) {
2458 .length = 0x0fe0,
2459 .code = 0x0021,
2460 };
2461 scssc_area->operation_code = 0;
2462
2463 scssc_area->summary_indicator_addr = real_addr_local_summary_bit;
2464 scssc_area->subchannel_indicator_addr = real_addr_dev_st_chg_ind;
2465 scssc_area->ks = QDIO_STORAGE_KEY;
2466 scssc_area->kc = QDIO_STORAGE_KEY;
2467 scssc_area->isc = TIQDIO_THININT_ISC;
2468 scssc_area->schid = irq_ptr->schid;
2469 /* enables the time delay disablement facility. Don't care
2470 * whether it is really there (i.e. we haven't checked for
2471 * it) */
2472 if (css_general_characteristics.aif_tdd)
2473 scssc_area->word_with_d_bit = 0x10000000;
2474 else
2475 QDIO_PRINT_WARN("Time delay disablement facility " \
2476 "not available\n");
2477
2478 result = chsc(scssc_area);
2479 if (result) {
2480 QDIO_PRINT_WARN("could not set indicators on irq 0.%x.%x, " \
2481 "cc=%i.\n",
2482 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,result);
2483 result = -EIO;
2484 goto out;
2485 }
2486
2487 resp_code = scssc_area->response.code;
2488 if (resp_code!=QDIO_CHSC_RESPONSE_CODE_OK) {
2489 QDIO_PRINT_WARN("response upon setting indicators " \
2490 "is 0x%x.\n",resp_code);
2491 sprintf(dbf_text,"sidR%4x",resp_code);
2492 QDIO_DBF_TEXT1(0,trace,dbf_text);
2493 QDIO_DBF_TEXT1(0,setup,dbf_text);
2494 ptr=&scssc_area->response;
2495 QDIO_DBF_HEX2(1,setup,&ptr,QDIO_DBF_SETUP_LEN);
2496 result = -EIO;
2497 goto out;
2498 }
2499
2500 QDIO_DBF_TEXT2(0,setup,"setscind");
2501 QDIO_DBF_HEX2(0,setup,&real_addr_local_summary_bit,
2502 sizeof(unsigned long));
2503 QDIO_DBF_HEX2(0,setup,&real_addr_dev_st_chg_ind,sizeof(unsigned long));
2504 result = 0;
2505 out:
2506 mempool_free(scssc_area, qdio_mempool_scssc);
2507 return result;
2508
2509 }
2510
2511 static unsigned int
2512 tiqdio_set_delay_target(struct qdio_irq *irq_ptr, unsigned long delay_target)
2513 {
2514 unsigned int resp_code;
2515 int result;
2516 void *ptr;
2517 char dbf_text[15];
2518
2519 struct {
2520 struct chsc_header request;
2521 u16 operation_code;
2522 u16 reserved1;
2523 u32 reserved2;
2524 u32 reserved3;
2525 u32 reserved4[2];
2526 u32 delay_target;
2527 u32 reserved5[1009];
2528 struct chsc_header response;
2529 u32 reserved6;
2530 } *scsscf_area;
2531
2532 if (!irq_ptr->is_thinint_irq)
2533 return -ENODEV;
2534
2535 scsscf_area = mempool_alloc(qdio_mempool_scssc, GFP_ATOMIC);
2536 if (!scsscf_area) {
2537 QDIO_PRINT_WARN("No memory for setting delay target on " \
2538 "subchannel 0.%x.%x.\n",
2539 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2540 return -ENOMEM;
2541 }
2542 scsscf_area->request = (struct chsc_header) {
2543 .length = 0x0fe0,
2544 .code = 0x1027,
2545 };
2546
2547 scsscf_area->delay_target = delay_target<<16;
2548
2549 result=chsc(scsscf_area);
2550 if (result) {
2551 QDIO_PRINT_WARN("could not set delay target on irq 0.%x.%x, " \
2552 "cc=%i. Continuing.\n",
2553 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
2554 result);
2555 result = -EIO;
2556 goto out;
2557 }
2558
2559 resp_code = scsscf_area->response.code;
2560 if (resp_code!=QDIO_CHSC_RESPONSE_CODE_OK) {
2561 QDIO_PRINT_WARN("response upon setting delay target " \
2562 "is 0x%x. Continuing.\n",resp_code);
2563 sprintf(dbf_text,"sdtR%4x",resp_code);
2564 QDIO_DBF_TEXT1(0,trace,dbf_text);
2565 QDIO_DBF_TEXT1(0,setup,dbf_text);
2566 ptr=&scsscf_area->response;
2567 QDIO_DBF_HEX2(1,trace,&ptr,QDIO_DBF_TRACE_LEN);
2568 }
2569 QDIO_DBF_TEXT2(0,trace,"delytrgt");
2570 QDIO_DBF_HEX2(0,trace,&delay_target,sizeof(unsigned long));
2571 result = 0; /* not critical */
2572 out:
2573 mempool_free(scsscf_area, qdio_mempool_scssc);
2574 return result;
2575 }
2576
2577 int
2578 qdio_cleanup(struct ccw_device *cdev, int how)
2579 {
2580 struct qdio_irq *irq_ptr;
2581 char dbf_text[15];
2582 int rc;
2583
2584 irq_ptr = cdev->private->qdio_data;
2585 if (!irq_ptr)
2586 return -ENODEV;
2587
2588 sprintf(dbf_text,"qcln%4x",irq_ptr->schid.sch_no);
2589 QDIO_DBF_TEXT1(0,trace,dbf_text);
2590 QDIO_DBF_TEXT0(0,setup,dbf_text);
2591
2592 rc = qdio_shutdown(cdev, how);
2593 if ((rc == 0) || (rc == -EINPROGRESS))
2594 rc = qdio_free(cdev);
2595 return rc;
2596 }
2597
2598 int
2599 qdio_shutdown(struct ccw_device *cdev, int how)
2600 {
2601 struct qdio_irq *irq_ptr;
2602 int i;
2603 int result = 0;
2604 int rc;
2605 unsigned long flags;
2606 int timeout;
2607 char dbf_text[15];
2608
2609 irq_ptr = cdev->private->qdio_data;
2610 if (!irq_ptr)
2611 return -ENODEV;
2612
2613 down(&irq_ptr->setting_up_sema);
2614
2615 sprintf(dbf_text,"qsqs%4x",irq_ptr->schid.sch_no);
2616 QDIO_DBF_TEXT1(0,trace,dbf_text);
2617 QDIO_DBF_TEXT0(0,setup,dbf_text);
2618
2619 /* mark all qs as uninteresting */
2620 for (i=0;i<irq_ptr->no_input_qs;i++)
2621 atomic_set(&irq_ptr->input_qs[i]->is_in_shutdown,1);
2622
2623 for (i=0;i<irq_ptr->no_output_qs;i++)
2624 atomic_set(&irq_ptr->output_qs[i]->is_in_shutdown,1);
2625
2626 tasklet_kill(&tiqdio_tasklet);
2627
2628 for (i=0;i<irq_ptr->no_input_qs;i++) {
2629 qdio_unmark_q(irq_ptr->input_qs[i]);
2630 tasklet_kill(&irq_ptr->input_qs[i]->tasklet);
2631 wait_event_interruptible_timeout(cdev->private->wait_q,
2632 !atomic_read(&irq_ptr->
2633 input_qs[i]->
2634 use_count),
2635 QDIO_NO_USE_COUNT_TIMEOUT);
2636 if (atomic_read(&irq_ptr->input_qs[i]->use_count))
2637 result=-EINPROGRESS;
2638 }
2639
2640 for (i=0;i<irq_ptr->no_output_qs;i++) {
2641 tasklet_kill(&irq_ptr->output_qs[i]->tasklet);
2642 del_timer(&irq_ptr->output_qs[i]->timer);
2643 wait_event_interruptible_timeout(cdev->private->wait_q,
2644 !atomic_read(&irq_ptr->
2645 output_qs[i]->
2646 use_count),
2647 QDIO_NO_USE_COUNT_TIMEOUT);
2648 if (atomic_read(&irq_ptr->output_qs[i]->use_count))
2649 result=-EINPROGRESS;
2650 }
2651
2652 /* cleanup subchannel */
2653 spin_lock_irqsave(get_ccwdev_lock(cdev),flags);
2654 if (how&QDIO_FLAG_CLEANUP_USING_CLEAR) {
2655 rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
2656 timeout=QDIO_CLEANUP_CLEAR_TIMEOUT;
2657 } else if (how&QDIO_FLAG_CLEANUP_USING_HALT) {
2658 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
2659 timeout=QDIO_CLEANUP_HALT_TIMEOUT;
2660 } else { /* default behaviour */
2661 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
2662 timeout=QDIO_CLEANUP_HALT_TIMEOUT;
2663 }
2664 if (rc == -ENODEV) {
2665 /* No need to wait for device no longer present. */
2666 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2667 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2668 } else if (((void *)cdev->handler != (void *)qdio_handler) && rc == 0) {
2669 /*
2670 * Whoever put another handler there, has to cope with the
2671 * interrupt theirself. Might happen if qdio_shutdown was
2672 * called on already shutdown queues, but this shouldn't have
2673 * bad side effects.
2674 */
2675 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2676 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2677 } else if (rc == 0) {
2678 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
2679 ccw_device_set_timeout(cdev, timeout);
2680 spin_unlock_irqrestore(get_ccwdev_lock(cdev),flags);
2681
2682 wait_event(cdev->private->wait_q,
2683 irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
2684 irq_ptr->state == QDIO_IRQ_STATE_ERR);
2685 } else {
2686 QDIO_PRINT_INFO("ccw_device_{halt,clear} returned %d for "
2687 "device %s\n", result, cdev->dev.bus_id);
2688 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2689 result = rc;
2690 goto out;
2691 }
2692 if (irq_ptr->is_thinint_irq) {
2693 qdio_put_indicator((__u32*)irq_ptr->dev_st_chg_ind);
2694 tiqdio_set_subchannel_ind(irq_ptr,1);
2695 /* reset adapter interrupt indicators */
2696 }
2697
2698 /* exchange int handlers, if necessary */
2699 if ((void*)cdev->handler == (void*)qdio_handler)
2700 cdev->handler=irq_ptr->original_int_handler;
2701
2702 /* Ignore errors. */
2703 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2704 ccw_device_set_timeout(cdev, 0);
2705 out:
2706 up(&irq_ptr->setting_up_sema);
2707 return result;
2708 }
2709
2710 int
2711 qdio_free(struct ccw_device *cdev)
2712 {
2713 struct qdio_irq *irq_ptr;
2714 char dbf_text[15];
2715
2716 irq_ptr = cdev->private->qdio_data;
2717 if (!irq_ptr)
2718 return -ENODEV;
2719
2720 down(&irq_ptr->setting_up_sema);
2721
2722 sprintf(dbf_text,"qfqs%4x",irq_ptr->schid.sch_no);
2723 QDIO_DBF_TEXT1(0,trace,dbf_text);
2724 QDIO_DBF_TEXT0(0,setup,dbf_text);
2725
2726 cdev->private->qdio_data = NULL;
2727
2728 up(&irq_ptr->setting_up_sema);
2729
2730 qdio_release_irq_memory(irq_ptr);
2731 module_put(THIS_MODULE);
2732 return 0;
2733 }
2734
2735 static void
2736 qdio_allocate_do_dbf(struct qdio_initialize *init_data)
2737 {
2738 char dbf_text[20]; /* if a printf printed out more than 8 chars */
2739
2740 sprintf(dbf_text,"qfmt:%x",init_data->q_format);
2741 QDIO_DBF_TEXT0(0,setup,dbf_text);
2742 QDIO_DBF_HEX0(0,setup,init_data->adapter_name,8);
2743 sprintf(dbf_text,"qpff%4x",init_data->qib_param_field_format);
2744 QDIO_DBF_TEXT0(0,setup,dbf_text);
2745 QDIO_DBF_HEX0(0,setup,&init_data->qib_param_field,sizeof(char*));
2746 QDIO_DBF_HEX0(0,setup,&init_data->input_slib_elements,sizeof(long*));
2747 QDIO_DBF_HEX0(0,setup,&init_data->output_slib_elements,sizeof(long*));
2748 sprintf(dbf_text,"miit%4x",init_data->min_input_threshold);
2749 QDIO_DBF_TEXT0(0,setup,dbf_text);
2750 sprintf(dbf_text,"mait%4x",init_data->max_input_threshold);
2751 QDIO_DBF_TEXT0(0,setup,dbf_text);
2752 sprintf(dbf_text,"miot%4x",init_data->min_output_threshold);
2753 QDIO_DBF_TEXT0(0,setup,dbf_text);
2754 sprintf(dbf_text,"maot%4x",init_data->max_output_threshold);
2755 QDIO_DBF_TEXT0(0,setup,dbf_text);
2756 sprintf(dbf_text,"niq:%4x",init_data->no_input_qs);
2757 QDIO_DBF_TEXT0(0,setup,dbf_text);
2758 sprintf(dbf_text,"noq:%4x",init_data->no_output_qs);
2759 QDIO_DBF_TEXT0(0,setup,dbf_text);
2760 QDIO_DBF_HEX0(0,setup,&init_data->input_handler,sizeof(void*));
2761 QDIO_DBF_HEX0(0,setup,&init_data->output_handler,sizeof(void*));
2762 QDIO_DBF_HEX0(0,setup,&init_data->int_parm,sizeof(long));
2763 QDIO_DBF_HEX0(0,setup,&init_data->flags,sizeof(long));
2764 QDIO_DBF_HEX0(0,setup,&init_data->input_sbal_addr_array,sizeof(void*));
2765 QDIO_DBF_HEX0(0,setup,&init_data->output_sbal_addr_array,sizeof(void*));
2766 }
2767
2768 static void
2769 qdio_allocate_fill_input_desc(struct qdio_irq *irq_ptr, int i, int iqfmt)
2770 {
2771 irq_ptr->input_qs[i]->is_iqdio_q = iqfmt;
2772 irq_ptr->input_qs[i]->is_thinint_q = irq_ptr->is_thinint_irq;
2773
2774 irq_ptr->qdr->qdf0[i].sliba=(unsigned long)(irq_ptr->input_qs[i]->slib);
2775
2776 irq_ptr->qdr->qdf0[i].sla=(unsigned long)(irq_ptr->input_qs[i]->sl);
2777
2778 irq_ptr->qdr->qdf0[i].slsba=
2779 (unsigned long)(&irq_ptr->input_qs[i]->slsb.acc.val[0]);
2780
2781 irq_ptr->qdr->qdf0[i].akey=QDIO_STORAGE_KEY;
2782 irq_ptr->qdr->qdf0[i].bkey=QDIO_STORAGE_KEY;
2783 irq_ptr->qdr->qdf0[i].ckey=QDIO_STORAGE_KEY;
2784 irq_ptr->qdr->qdf0[i].dkey=QDIO_STORAGE_KEY;
2785 }
2786
2787 static void
2788 qdio_allocate_fill_output_desc(struct qdio_irq *irq_ptr, int i,
2789 int j, int iqfmt)
2790 {
2791 irq_ptr->output_qs[i]->is_iqdio_q = iqfmt;
2792 irq_ptr->output_qs[i]->is_thinint_q = irq_ptr->is_thinint_irq;
2793
2794 irq_ptr->qdr->qdf0[i+j].sliba=(unsigned long)(irq_ptr->output_qs[i]->slib);
2795
2796 irq_ptr->qdr->qdf0[i+j].sla=(unsigned long)(irq_ptr->output_qs[i]->sl);
2797
2798 irq_ptr->qdr->qdf0[i+j].slsba=
2799 (unsigned long)(&irq_ptr->output_qs[i]->slsb.acc.val[0]);
2800
2801 irq_ptr->qdr->qdf0[i+j].akey=QDIO_STORAGE_KEY;
2802 irq_ptr->qdr->qdf0[i+j].bkey=QDIO_STORAGE_KEY;
2803 irq_ptr->qdr->qdf0[i+j].ckey=QDIO_STORAGE_KEY;
2804 irq_ptr->qdr->qdf0[i+j].dkey=QDIO_STORAGE_KEY;
2805 }
2806
2807
2808 static void
2809 qdio_initialize_set_siga_flags_input(struct qdio_irq *irq_ptr)
2810 {
2811 int i;
2812
2813 for (i=0;i<irq_ptr->no_input_qs;i++) {
2814 irq_ptr->input_qs[i]->siga_sync=
2815 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY;
2816 irq_ptr->input_qs[i]->siga_in=
2817 irq_ptr->qdioac&CHSC_FLAG_SIGA_INPUT_NECESSARY;
2818 irq_ptr->input_qs[i]->siga_out=
2819 irq_ptr->qdioac&CHSC_FLAG_SIGA_OUTPUT_NECESSARY;
2820 irq_ptr->input_qs[i]->siga_sync_done_on_thinints=
2821 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS;
2822 irq_ptr->input_qs[i]->hydra_gives_outbound_pcis=
2823 irq_ptr->hydra_gives_outbound_pcis;
2824 irq_ptr->input_qs[i]->siga_sync_done_on_outb_tis=
2825 ((irq_ptr->qdioac&
2826 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2827 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS))==
2828 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2829 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS));
2830
2831 }
2832 }
2833
2834 static void
2835 qdio_initialize_set_siga_flags_output(struct qdio_irq *irq_ptr)
2836 {
2837 int i;
2838
2839 for (i=0;i<irq_ptr->no_output_qs;i++) {
2840 irq_ptr->output_qs[i]->siga_sync=
2841 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY;
2842 irq_ptr->output_qs[i]->siga_in=
2843 irq_ptr->qdioac&CHSC_FLAG_SIGA_INPUT_NECESSARY;
2844 irq_ptr->output_qs[i]->siga_out=
2845 irq_ptr->qdioac&CHSC_FLAG_SIGA_OUTPUT_NECESSARY;
2846 irq_ptr->output_qs[i]->siga_sync_done_on_thinints=
2847 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS;
2848 irq_ptr->output_qs[i]->hydra_gives_outbound_pcis=
2849 irq_ptr->hydra_gives_outbound_pcis;
2850 irq_ptr->output_qs[i]->siga_sync_done_on_outb_tis=
2851 ((irq_ptr->qdioac&
2852 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2853 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS))==
2854 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2855 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS));
2856
2857 }
2858 }
2859
2860 static int
2861 qdio_establish_irq_check_for_errors(struct ccw_device *cdev, int cstat,
2862 int dstat)
2863 {
2864 char dbf_text[15];
2865 struct qdio_irq *irq_ptr;
2866
2867 irq_ptr = cdev->private->qdio_data;
2868
2869 if (cstat || (dstat & ~(DEV_STAT_CHN_END|DEV_STAT_DEV_END))) {
2870 sprintf(dbf_text,"ick1%4x",irq_ptr->schid.sch_no);
2871 QDIO_DBF_TEXT2(1,trace,dbf_text);
2872 QDIO_DBF_HEX2(0,trace,&dstat,sizeof(int));
2873 QDIO_DBF_HEX2(0,trace,&cstat,sizeof(int));
2874 QDIO_PRINT_ERR("received check condition on establish " \
2875 "queues on irq 0.%x.%x (cs=x%x, ds=x%x).\n",
2876 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
2877 cstat,dstat);
2878 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_ERR);
2879 }
2880
2881 if (!(dstat & DEV_STAT_DEV_END)) {
2882 QDIO_DBF_TEXT2(1,setup,"eq:no de");
2883 QDIO_DBF_HEX2(0,setup,&dstat, sizeof(dstat));
2884 QDIO_DBF_HEX2(0,setup,&cstat, sizeof(cstat));
2885 QDIO_PRINT_ERR("establish queues on irq 0.%x.%04x: didn't get "
2886 "device end: dstat=%02x, cstat=%02x\n",
2887 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
2888 dstat, cstat);
2889 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2890 return 1;
2891 }
2892
2893 if (dstat & ~(DEV_STAT_CHN_END|DEV_STAT_DEV_END)) {
2894 QDIO_DBF_TEXT2(1,setup,"eq:badio");
2895 QDIO_DBF_HEX2(0,setup,&dstat, sizeof(dstat));
2896 QDIO_DBF_HEX2(0,setup,&cstat, sizeof(cstat));
2897 QDIO_PRINT_ERR("establish queues on irq 0.%x.%04x: got "
2898 "the following devstat: dstat=%02x, "
2899 "cstat=%02x\n", irq_ptr->schid.ssid,
2900 irq_ptr->schid.sch_no, dstat, cstat);
2901 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2902 return 1;
2903 }
2904 return 0;
2905 }
2906
2907 static void
2908 qdio_establish_handle_irq(struct ccw_device *cdev, int cstat, int dstat)
2909 {
2910 struct qdio_irq *irq_ptr;
2911 char dbf_text[15];
2912
2913 irq_ptr = cdev->private->qdio_data;
2914
2915 sprintf(dbf_text,"qehi%4x",cdev->private->schid.sch_no);
2916 QDIO_DBF_TEXT0(0,setup,dbf_text);
2917 QDIO_DBF_TEXT0(0,trace,dbf_text);
2918
2919 if (qdio_establish_irq_check_for_errors(cdev, cstat, dstat)) {
2920 ccw_device_set_timeout(cdev, 0);
2921 return;
2922 }
2923
2924 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_ESTABLISHED);
2925 ccw_device_set_timeout(cdev, 0);
2926 }
2927
2928 int
2929 qdio_initialize(struct qdio_initialize *init_data)
2930 {
2931 int rc;
2932 char dbf_text[15];
2933
2934 sprintf(dbf_text,"qini%4x",init_data->cdev->private->schid.sch_no);
2935 QDIO_DBF_TEXT0(0,setup,dbf_text);
2936 QDIO_DBF_TEXT0(0,trace,dbf_text);
2937
2938 rc = qdio_allocate(init_data);
2939 if (rc == 0) {
2940 rc = qdio_establish(init_data);
2941 if (rc != 0)
2942 qdio_free(init_data->cdev);
2943 }
2944
2945 return rc;
2946 }
2947
2948
2949 int
2950 qdio_allocate(struct qdio_initialize *init_data)
2951 {
2952 struct qdio_irq *irq_ptr;
2953 char dbf_text[15];
2954
2955 sprintf(dbf_text,"qalc%4x",init_data->cdev->private->schid.sch_no);
2956 QDIO_DBF_TEXT0(0,setup,dbf_text);
2957 QDIO_DBF_TEXT0(0,trace,dbf_text);
2958 if ( (init_data->no_input_qs>QDIO_MAX_QUEUES_PER_IRQ) ||
2959 (init_data->no_output_qs>QDIO_MAX_QUEUES_PER_IRQ) ||
2960 ((init_data->no_input_qs) && (!init_data->input_handler)) ||
2961 ((init_data->no_output_qs) && (!init_data->output_handler)) )
2962 return -EINVAL;
2963
2964 if (!init_data->input_sbal_addr_array)
2965 return -EINVAL;
2966
2967 if (!init_data->output_sbal_addr_array)
2968 return -EINVAL;
2969
2970 qdio_allocate_do_dbf(init_data);
2971
2972 /* create irq */
2973 irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
2974
2975 QDIO_DBF_TEXT0(0,setup,"irq_ptr:");
2976 QDIO_DBF_HEX0(0,setup,&irq_ptr,sizeof(void*));
2977
2978 if (!irq_ptr) {
2979 QDIO_PRINT_ERR("allocation of irq_ptr failed!\n");
2980 return -ENOMEM;
2981 }
2982
2983 init_MUTEX(&irq_ptr->setting_up_sema);
2984
2985 /* QDR must be in DMA area since CCW data address is only 32 bit */
2986 irq_ptr->qdr = (struct qdr *) __get_free_page(GFP_KERNEL | GFP_DMA);
2987 if (!(irq_ptr->qdr)) {
2988 free_page((unsigned long) irq_ptr);
2989 QDIO_PRINT_ERR("allocation of irq_ptr->qdr failed!\n");
2990 return -ENOMEM;
2991 }
2992 QDIO_DBF_TEXT0(0,setup,"qdr:");
2993 QDIO_DBF_HEX0(0,setup,&irq_ptr->qdr,sizeof(void*));
2994
2995 if (qdio_alloc_qs(irq_ptr,
2996 init_data->no_input_qs,
2997 init_data->no_output_qs)) {
2998 QDIO_PRINT_ERR("queue allocation failed!\n");
2999 qdio_release_irq_memory(irq_ptr);
3000 return -ENOMEM;
3001 }
3002
3003 init_data->cdev->private->qdio_data = irq_ptr;
3004
3005 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_INACTIVE);
3006
3007 return 0;
3008 }
3009
3010 static int qdio_fill_irq(struct qdio_initialize *init_data)
3011 {
3012 int i;
3013 char dbf_text[15];
3014 struct ciw *ciw;
3015 int is_iqdio;
3016 struct qdio_irq *irq_ptr;
3017
3018 irq_ptr = init_data->cdev->private->qdio_data;
3019
3020 memset(irq_ptr,0,((char*)&irq_ptr->qdr)-((char*)irq_ptr));
3021
3022 /* wipes qib.ac, required by ar7063 */
3023 memset(irq_ptr->qdr,0,sizeof(struct qdr));
3024
3025 irq_ptr->int_parm=init_data->int_parm;
3026
3027 irq_ptr->schid = ccw_device_get_subchannel_id(init_data->cdev);
3028 irq_ptr->no_input_qs=init_data->no_input_qs;
3029 irq_ptr->no_output_qs=init_data->no_output_qs;
3030
3031 if (init_data->q_format==QDIO_IQDIO_QFMT) {
3032 irq_ptr->is_iqdio_irq=1;
3033 irq_ptr->is_thinint_irq=1;
3034 } else {
3035 irq_ptr->is_iqdio_irq=0;
3036 irq_ptr->is_thinint_irq=hydra_thinints;
3037 }
3038 sprintf(dbf_text,"is_i_t%1x%1x",
3039 irq_ptr->is_iqdio_irq,irq_ptr->is_thinint_irq);
3040 QDIO_DBF_TEXT2(0,setup,dbf_text);
3041
3042 if (irq_ptr->is_thinint_irq) {
3043 irq_ptr->dev_st_chg_ind = qdio_get_indicator();
3044 QDIO_DBF_HEX1(0,setup,&irq_ptr->dev_st_chg_ind,sizeof(void*));
3045 if (!irq_ptr->dev_st_chg_ind) {
3046 QDIO_PRINT_WARN("no indicator location available " \
3047 "for irq 0.%x.%x\n",
3048 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
3049 qdio_release_irq_memory(irq_ptr);
3050 return -ENOBUFS;
3051 }
3052 }
3053
3054 /* defaults */
3055 irq_ptr->equeue.cmd=DEFAULT_ESTABLISH_QS_CMD;
3056 irq_ptr->equeue.count=DEFAULT_ESTABLISH_QS_COUNT;
3057 irq_ptr->aqueue.cmd=DEFAULT_ACTIVATE_QS_CMD;
3058 irq_ptr->aqueue.count=DEFAULT_ACTIVATE_QS_COUNT;
3059
3060 qdio_fill_qs(irq_ptr, init_data->cdev,
3061 init_data->no_input_qs,
3062 init_data->no_output_qs,
3063 init_data->input_handler,
3064 init_data->output_handler,init_data->int_parm,
3065 init_data->q_format,init_data->flags,
3066 init_data->input_sbal_addr_array,
3067 init_data->output_sbal_addr_array);
3068
3069 if (!try_module_get(THIS_MODULE)) {
3070 QDIO_PRINT_CRIT("try_module_get() failed!\n");
3071 qdio_release_irq_memory(irq_ptr);
3072 return -EINVAL;
3073 }
3074
3075 qdio_fill_thresholds(irq_ptr,init_data->no_input_qs,
3076 init_data->no_output_qs,
3077 init_data->min_input_threshold,
3078 init_data->max_input_threshold,
3079 init_data->min_output_threshold,
3080 init_data->max_output_threshold);
3081
3082 /* fill in qdr */
3083 irq_ptr->qdr->qfmt=init_data->q_format;
3084 irq_ptr->qdr->iqdcnt=init_data->no_input_qs;
3085 irq_ptr->qdr->oqdcnt=init_data->no_output_qs;
3086 irq_ptr->qdr->iqdsz=sizeof(struct qdesfmt0)/4; /* size in words */
3087 irq_ptr->qdr->oqdsz=sizeof(struct qdesfmt0)/4;
3088
3089 irq_ptr->qdr->qiba=(unsigned long)&irq_ptr->qib;
3090 irq_ptr->qdr->qkey=QDIO_STORAGE_KEY;
3091
3092 /* fill in qib */
3093 irq_ptr->is_qebsm = is_passthrough;
3094 if (irq_ptr->is_qebsm)
3095 irq_ptr->qib.rflags |= QIB_RFLAGS_ENABLE_QEBSM;
3096
3097 irq_ptr->qib.qfmt=init_data->q_format;
3098 if (init_data->no_input_qs)
3099 irq_ptr->qib.isliba=(unsigned long)(irq_ptr->input_qs[0]->slib);
3100 if (init_data->no_output_qs)
3101 irq_ptr->qib.osliba=(unsigned long)(irq_ptr->output_qs[0]->slib);
3102 memcpy(irq_ptr->qib.ebcnam,init_data->adapter_name,8);
3103
3104 qdio_set_impl_params(irq_ptr,init_data->qib_param_field_format,
3105 init_data->qib_param_field,
3106 init_data->no_input_qs,
3107 init_data->no_output_qs,
3108 init_data->input_slib_elements,
3109 init_data->output_slib_elements);
3110
3111 /* first input descriptors, then output descriptors */
3112 is_iqdio = (init_data->q_format == QDIO_IQDIO_QFMT) ? 1 : 0;
3113 for (i=0;i<init_data->no_input_qs;i++)
3114 qdio_allocate_fill_input_desc(irq_ptr, i, is_iqdio);
3115
3116 for (i=0;i<init_data->no_output_qs;i++)
3117 qdio_allocate_fill_output_desc(irq_ptr, i,
3118 init_data->no_input_qs,
3119 is_iqdio);
3120
3121 /* qdr, qib, sls, slsbs, slibs, sbales filled. */
3122
3123 /* get qdio commands */
3124 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_EQUEUE);
3125 if (!ciw) {
3126 QDIO_DBF_TEXT2(1,setup,"no eq");
3127 QDIO_PRINT_INFO("No equeue CIW found for QDIO commands. "
3128 "Trying to use default.\n");
3129 } else
3130 irq_ptr->equeue = *ciw;
3131 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_AQUEUE);
3132 if (!ciw) {
3133 QDIO_DBF_TEXT2(1,setup,"no aq");
3134 QDIO_PRINT_INFO("No aqueue CIW found for QDIO commands. "
3135 "Trying to use default.\n");
3136 } else
3137 irq_ptr->aqueue = *ciw;
3138
3139 /* Set new interrupt handler. */
3140 irq_ptr->original_int_handler = init_data->cdev->handler;
3141 init_data->cdev->handler = qdio_handler;
3142
3143 return 0;
3144 }
3145
3146 int
3147 qdio_establish(struct qdio_initialize *init_data)
3148 {
3149 struct qdio_irq *irq_ptr;
3150 unsigned long saveflags;
3151 int result, result2;
3152 struct ccw_device *cdev;
3153 char dbf_text[20];
3154
3155 cdev=init_data->cdev;
3156 irq_ptr = cdev->private->qdio_data;
3157 if (!irq_ptr)
3158 return -EINVAL;
3159
3160 if (cdev->private->state != DEV_STATE_ONLINE)
3161 return -EINVAL;
3162
3163 down(&irq_ptr->setting_up_sema);
3164
3165 qdio_fill_irq(init_data);
3166
3167 /* the thinint CHSC stuff */
3168 if (irq_ptr->is_thinint_irq) {
3169
3170 result = tiqdio_set_subchannel_ind(irq_ptr,0);
3171 if (result) {
3172 up(&irq_ptr->setting_up_sema);
3173 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
3174 return result;
3175 }
3176 tiqdio_set_delay_target(irq_ptr,TIQDIO_DELAY_TARGET);
3177 }
3178
3179 sprintf(dbf_text,"qest%4x",cdev->private->schid.sch_no);
3180 QDIO_DBF_TEXT0(0,setup,dbf_text);
3181 QDIO_DBF_TEXT0(0,trace,dbf_text);
3182
3183 /* establish q */
3184 irq_ptr->ccw.cmd_code=irq_ptr->equeue.cmd;
3185 irq_ptr->ccw.flags=CCW_FLAG_SLI;
3186 irq_ptr->ccw.count=irq_ptr->equeue.count;
3187 irq_ptr->ccw.cda=QDIO_GET_ADDR(irq_ptr->qdr);
3188
3189 spin_lock_irqsave(get_ccwdev_lock(cdev),saveflags);
3190
3191 ccw_device_set_options_mask(cdev, 0);
3192 result = ccw_device_start(cdev, &irq_ptr->ccw,
3193 QDIO_DOING_ESTABLISH, 0, 0);
3194 if (result) {
3195 result2 = ccw_device_start(cdev, &irq_ptr->ccw,
3196 QDIO_DOING_ESTABLISH, 0, 0);
3197 sprintf(dbf_text,"eq:io%4x",result);
3198 QDIO_DBF_TEXT2(1,setup,dbf_text);
3199 if (result2) {
3200 sprintf(dbf_text,"eq:io%4x",result);
3201 QDIO_DBF_TEXT2(1,setup,dbf_text);
3202 }
3203 QDIO_PRINT_WARN("establish queues on irq 0.%x.%04x: do_IO " \
3204 "returned %i, next try returned %i\n",
3205 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
3206 result, result2);
3207 result=result2;
3208 if (result)
3209 ccw_device_set_timeout(cdev, 0);
3210 }
3211
3212 spin_unlock_irqrestore(get_ccwdev_lock(cdev),saveflags);
3213
3214 if (result) {
3215 up(&irq_ptr->setting_up_sema);
3216 qdio_shutdown(cdev,QDIO_FLAG_CLEANUP_USING_CLEAR);
3217 return result;
3218 }
3219
3220 wait_event_interruptible_timeout(cdev->private->wait_q,
3221 irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
3222 irq_ptr->state == QDIO_IRQ_STATE_ERR,
3223 QDIO_ESTABLISH_TIMEOUT);
3224
3225 if (irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED)
3226 result = 0;
3227 else {
3228 up(&irq_ptr->setting_up_sema);
3229 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
3230 return -EIO;
3231 }
3232
3233 qdio_get_ssqd_information(irq_ptr);
3234 /* if this gets set once, we're running under VM and can omit SVSes */
3235 if (irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY)
3236 omit_svs=1;
3237
3238 sprintf(dbf_text,"qdioac%2x",irq_ptr->qdioac);
3239 QDIO_DBF_TEXT2(0,setup,dbf_text);
3240
3241 sprintf(dbf_text,"qib ac%2x",irq_ptr->qib.ac);
3242 QDIO_DBF_TEXT2(0,setup,dbf_text);
3243
3244 irq_ptr->hydra_gives_outbound_pcis=
3245 irq_ptr->qib.ac&QIB_AC_OUTBOUND_PCI_SUPPORTED;
3246 irq_ptr->sync_done_on_outb_pcis=
3247 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS;
3248
3249 qdio_initialize_set_siga_flags_input(irq_ptr);
3250 qdio_initialize_set_siga_flags_output(irq_ptr);
3251
3252 up(&irq_ptr->setting_up_sema);
3253
3254 return result;
3255
3256 }
3257
3258 int
3259 qdio_activate(struct ccw_device *cdev, int flags)
3260 {
3261 struct qdio_irq *irq_ptr;
3262 int i,result=0,result2;
3263 unsigned long saveflags;
3264 char dbf_text[20]; /* see qdio_initialize */
3265
3266 irq_ptr = cdev->private->qdio_data;
3267 if (!irq_ptr)
3268 return -ENODEV;
3269
3270 if (cdev->private->state != DEV_STATE_ONLINE)
3271 return -EINVAL;
3272
3273 down(&irq_ptr->setting_up_sema);
3274 if (irq_ptr->state==QDIO_IRQ_STATE_INACTIVE) {
3275 result=-EBUSY;
3276 goto out;
3277 }
3278
3279 sprintf(dbf_text,"qact%4x", irq_ptr->schid.sch_no);
3280 QDIO_DBF_TEXT2(0,setup,dbf_text);
3281 QDIO_DBF_TEXT2(0,trace,dbf_text);
3282
3283 /* activate q */
3284 irq_ptr->ccw.cmd_code=irq_ptr->aqueue.cmd;
3285 irq_ptr->ccw.flags=CCW_FLAG_SLI;
3286 irq_ptr->ccw.count=irq_ptr->aqueue.count;
3287 irq_ptr->ccw.cda=QDIO_GET_ADDR(0);
3288
3289 spin_lock_irqsave(get_ccwdev_lock(cdev),saveflags);
3290
3291 ccw_device_set_timeout(cdev, 0);
3292 ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
3293 result=ccw_device_start(cdev,&irq_ptr->ccw,QDIO_DOING_ACTIVATE,
3294 0, DOIO_DENY_PREFETCH);
3295 if (result) {
3296 result2=ccw_device_start(cdev,&irq_ptr->ccw,
3297 QDIO_DOING_ACTIVATE,0,0);
3298 sprintf(dbf_text,"aq:io%4x",result);
3299 QDIO_DBF_TEXT2(1,setup,dbf_text);
3300 if (result2) {
3301 sprintf(dbf_text,"aq:io%4x",result);
3302 QDIO_DBF_TEXT2(1,setup,dbf_text);
3303 }
3304 QDIO_PRINT_WARN("activate queues on irq 0.%x.%04x: do_IO " \
3305 "returned %i, next try returned %i\n",
3306 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
3307 result, result2);
3308 result=result2;
3309 }
3310
3311 spin_unlock_irqrestore(get_ccwdev_lock(cdev),saveflags);
3312 if (result)
3313 goto out;
3314
3315 for (i=0;i<irq_ptr->no_input_qs;i++) {
3316 if (irq_ptr->is_thinint_irq) {
3317 /*
3318 * that way we know, that, if we will get interrupted
3319 * by tiqdio_inbound_processing, qdio_unmark_q will
3320 * not be called
3321 */
3322 qdio_reserve_q(irq_ptr->input_qs[i]);
3323 qdio_mark_tiq(irq_ptr->input_qs[i]);
3324 qdio_release_q(irq_ptr->input_qs[i]);
3325 }
3326 }
3327
3328 if (flags&QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT) {
3329 for (i=0;i<irq_ptr->no_input_qs;i++) {
3330 irq_ptr->input_qs[i]->is_input_q|=
3331 QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT;
3332 }
3333 }
3334
3335 wait_event_interruptible_timeout(cdev->private->wait_q,
3336 ((irq_ptr->state ==
3337 QDIO_IRQ_STATE_STOPPED) ||
3338 (irq_ptr->state ==
3339 QDIO_IRQ_STATE_ERR)),
3340 QDIO_ACTIVATE_TIMEOUT);
3341
3342 switch (irq_ptr->state) {
3343 case QDIO_IRQ_STATE_STOPPED:
3344 case QDIO_IRQ_STATE_ERR:
3345 up(&irq_ptr->setting_up_sema);
3346 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
3347 down(&irq_ptr->setting_up_sema);
3348 result = -EIO;
3349 break;
3350 default:
3351 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
3352 result = 0;
3353 }
3354 out:
3355 up(&irq_ptr->setting_up_sema);
3356
3357 return result;
3358 }
3359
3360 /* buffers filled forwards again to make Rick happy */
3361 static void
3362 qdio_do_qdio_fill_input(struct qdio_q *q, unsigned int qidx,
3363 unsigned int count, struct qdio_buffer *buffers)
3364 {
3365 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
3366 int tmp = 0;
3367
3368 qidx &= (QDIO_MAX_BUFFERS_PER_Q - 1);
3369 if (irq->is_qebsm) {
3370 while (count) {
3371 tmp = set_slsb(q, &qidx, SLSB_CU_INPUT_EMPTY, &count);
3372 if (!tmp)
3373 return;
3374 }
3375 return;
3376 }
3377 for (;;) {
3378 set_slsb(q, &qidx, SLSB_CU_INPUT_EMPTY, &count);
3379 count--;
3380 if (!count) break;
3381 qidx = (qidx + 1) & (QDIO_MAX_BUFFERS_PER_Q - 1);
3382 }
3383 }
3384
3385 static void
3386 qdio_do_qdio_fill_output(struct qdio_q *q, unsigned int qidx,
3387 unsigned int count, struct qdio_buffer *buffers)
3388 {
3389 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
3390 int tmp = 0;
3391
3392 qidx &= (QDIO_MAX_BUFFERS_PER_Q - 1);
3393 if (irq->is_qebsm) {
3394 while (count) {
3395 tmp = set_slsb(q, &qidx, SLSB_CU_OUTPUT_PRIMED, &count);
3396 if (!tmp)
3397 return;
3398 }
3399 return;
3400 }
3401
3402 for (;;) {
3403 set_slsb(q, &qidx, SLSB_CU_OUTPUT_PRIMED, &count);
3404 count--;
3405 if (!count) break;
3406 qidx = (qidx + 1) & (QDIO_MAX_BUFFERS_PER_Q - 1);
3407 }
3408 }
3409
3410 static void
3411 do_qdio_handle_inbound(struct qdio_q *q, unsigned int callflags,
3412 unsigned int qidx, unsigned int count,
3413 struct qdio_buffer *buffers)
3414 {
3415 int used_elements;
3416
3417 /* This is the inbound handling of queues */
3418 used_elements=atomic_add_return(count, &q->number_of_buffers_used) - count;
3419
3420 qdio_do_qdio_fill_input(q,qidx,count,buffers);
3421
3422 if ((used_elements+count==QDIO_MAX_BUFFERS_PER_Q)&&
3423 (callflags&QDIO_FLAG_UNDER_INTERRUPT))
3424 atomic_xchg(&q->polling,0);
3425
3426 if (used_elements)
3427 return;
3428 if (callflags&QDIO_FLAG_DONT_SIGA)
3429 return;
3430 if (q->siga_in) {
3431 int result;
3432
3433 result=qdio_siga_input(q);
3434 if (result) {
3435 if (q->siga_error)
3436 q->error_status_flags|=
3437 QDIO_STATUS_MORE_THAN_ONE_SIGA_ERROR;
3438 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
3439 q->siga_error=result;
3440 }
3441 }
3442
3443 qdio_mark_q(q);
3444 }
3445
3446 static void
3447 do_qdio_handle_outbound(struct qdio_q *q, unsigned int callflags,
3448 unsigned int qidx, unsigned int count,
3449 struct qdio_buffer *buffers)
3450 {
3451 int used_elements;
3452 unsigned int cnt, start_buf;
3453 unsigned char state = 0;
3454 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
3455
3456 /* This is the outbound handling of queues */
3457 qdio_do_qdio_fill_output(q,qidx,count,buffers);
3458
3459 used_elements=atomic_add_return(count, &q->number_of_buffers_used) - count;
3460
3461 if (callflags&QDIO_FLAG_DONT_SIGA) {
3462 qdio_perf_stat_inc(&perf_stats.outbound_cnt);
3463 return;
3464 }
3465 if (callflags & QDIO_FLAG_PCI_OUT)
3466 q->is_pci_out = 1;
3467 else
3468 q->is_pci_out = 0;
3469 if (q->is_iqdio_q) {
3470 /* one siga for every sbal */
3471 while (count--)
3472 qdio_kick_outbound_q(q);
3473
3474 __qdio_outbound_processing(q);
3475 } else {
3476 /* under VM, we do a SIGA sync unconditionally */
3477 SYNC_MEMORY;
3478 else {
3479 /*
3480 * w/o shadow queues (else branch of
3481 * SYNC_MEMORY :-/ ), we try to
3482 * fast-requeue buffers
3483 */
3484 if (irq->is_qebsm) {
3485 cnt = 1;
3486 start_buf = ((qidx+QDIO_MAX_BUFFERS_PER_Q-1) &
3487 (QDIO_MAX_BUFFERS_PER_Q-1));
3488 qdio_do_eqbs(q, &state, &start_buf, &cnt);
3489 } else
3490 state = q->slsb.acc.val[(qidx+QDIO_MAX_BUFFERS_PER_Q-1)
3491 &(QDIO_MAX_BUFFERS_PER_Q-1) ];
3492 if (state != SLSB_CU_OUTPUT_PRIMED) {
3493 qdio_kick_outbound_q(q);
3494 } else {
3495 QDIO_DBF_TEXT3(0,trace, "fast-req");
3496 qdio_perf_stat_inc(&perf_stats.fast_reqs);
3497 }
3498 }
3499 /*
3500 * only marking the q could take too long,
3501 * the upper layer module could do a lot of
3502 * traffic in that time
3503 */
3504 __qdio_outbound_processing(q);
3505 }
3506
3507 qdio_perf_stat_inc(&perf_stats.outbound_cnt);
3508 }
3509
3510 /* count must be 1 in iqdio */
3511 int
3512 do_QDIO(struct ccw_device *cdev,unsigned int callflags,
3513 unsigned int queue_number, unsigned int qidx,
3514 unsigned int count,struct qdio_buffer *buffers)
3515 {
3516 struct qdio_irq *irq_ptr;
3517 #ifdef CONFIG_QDIO_DEBUG
3518 char dbf_text[20];
3519
3520 sprintf(dbf_text,"doQD%04x",cdev->private->schid.sch_no);
3521 QDIO_DBF_TEXT3(0,trace,dbf_text);
3522 #endif /* CONFIG_QDIO_DEBUG */
3523
3524 if ( (qidx>QDIO_MAX_BUFFERS_PER_Q) ||
3525 (count>QDIO_MAX_BUFFERS_PER_Q) ||
3526 (queue_number>QDIO_MAX_QUEUES_PER_IRQ) )
3527 return -EINVAL;
3528
3529 if (count==0)
3530 return 0;
3531
3532 irq_ptr = cdev->private->qdio_data;
3533 if (!irq_ptr)
3534 return -ENODEV;
3535
3536 #ifdef CONFIG_QDIO_DEBUG
3537 if (callflags&QDIO_FLAG_SYNC_INPUT)
3538 QDIO_DBF_HEX3(0,trace,&irq_ptr->input_qs[queue_number],
3539 sizeof(void*));
3540 else
3541 QDIO_DBF_HEX3(0,trace,&irq_ptr->output_qs[queue_number],
3542 sizeof(void*));
3543 sprintf(dbf_text,"flag%04x",callflags);
3544 QDIO_DBF_TEXT3(0,trace,dbf_text);
3545 sprintf(dbf_text,"qi%02xct%02x",qidx,count);
3546 QDIO_DBF_TEXT3(0,trace,dbf_text);
3547 #endif /* CONFIG_QDIO_DEBUG */
3548
3549 if (irq_ptr->state!=QDIO_IRQ_STATE_ACTIVE)
3550 return -EBUSY;
3551
3552 if (callflags&QDIO_FLAG_SYNC_INPUT)
3553 do_qdio_handle_inbound(irq_ptr->input_qs[queue_number],
3554 callflags, qidx, count, buffers);
3555 else if (callflags&QDIO_FLAG_SYNC_OUTPUT)
3556 do_qdio_handle_outbound(irq_ptr->output_qs[queue_number],
3557 callflags, qidx, count, buffers);
3558 else {
3559 QDIO_DBF_TEXT3(1,trace,"doQD:inv");
3560 return -EINVAL;
3561 }
3562 return 0;
3563 }
3564
3565 static int
3566 qdio_perf_procfile_read(char *buffer, char **buffer_location, off_t offset,
3567 int buffer_length, int *eof, void *data)
3568 {
3569 int c=0;
3570
3571 /* we are always called with buffer_length=4k, so we all
3572 deliver on the first read */
3573 if (offset>0)
3574 return 0;
3575
3576 #define _OUTP_IT(x...) c+=sprintf(buffer+c,x)
3577 #ifdef CONFIG_64BIT
3578 _OUTP_IT("Number of tasklet runs (total) : %li\n",
3579 (long)atomic64_read(&perf_stats.tl_runs));
3580 _OUTP_IT("Inbound tasklet runs tried/retried : %li/%li\n",
3581 (long)atomic64_read(&perf_stats.inbound_tl_runs),
3582 (long)atomic64_read(&perf_stats.inbound_tl_runs_resched));
3583 _OUTP_IT("Inbound-thin tasklet runs tried/retried : %li/%li\n",
3584 (long)atomic64_read(&perf_stats.inbound_thin_tl_runs),
3585 (long)atomic64_read(&perf_stats.inbound_thin_tl_runs_resched));
3586 _OUTP_IT("Outbound tasklet runs tried/retried : %li/%li\n",
3587 (long)atomic64_read(&perf_stats.outbound_tl_runs),
3588 (long)atomic64_read(&perf_stats.outbound_tl_runs_resched));
3589 _OUTP_IT("\n");
3590 _OUTP_IT("Number of SIGA sync's issued : %li\n",
3591 (long)atomic64_read(&perf_stats.siga_syncs));
3592 _OUTP_IT("Number of SIGA in's issued : %li\n",
3593 (long)atomic64_read(&perf_stats.siga_ins));
3594 _OUTP_IT("Number of SIGA out's issued : %li\n",
3595 (long)atomic64_read(&perf_stats.siga_outs));
3596 _OUTP_IT("Number of PCIs caught : %li\n",
3597 (long)atomic64_read(&perf_stats.pcis));
3598 _OUTP_IT("Number of adapter interrupts caught : %li\n",
3599 (long)atomic64_read(&perf_stats.thinints));
3600 _OUTP_IT("Number of fast requeues (outg. SBALs w/o SIGA) : %li\n",
3601 (long)atomic64_read(&perf_stats.fast_reqs));
3602 _OUTP_IT("\n");
3603 _OUTP_IT("Number of inbound transfers : %li\n",
3604 (long)atomic64_read(&perf_stats.inbound_cnt));
3605 _OUTP_IT("Number of do_QDIOs outbound : %li\n",
3606 (long)atomic64_read(&perf_stats.outbound_cnt));
3607 #else /* CONFIG_64BIT */
3608 _OUTP_IT("Number of tasklet runs (total) : %i\n",
3609 atomic_read(&perf_stats.tl_runs));
3610 _OUTP_IT("Inbound tasklet runs tried/retried : %i/%i\n",
3611 atomic_read(&perf_stats.inbound_tl_runs),
3612 atomic_read(&perf_stats.inbound_tl_runs_resched));
3613 _OUTP_IT("Inbound-thin tasklet runs tried/retried : %i/%i\n",
3614 atomic_read(&perf_stats.inbound_thin_tl_runs),
3615 atomic_read(&perf_stats.inbound_thin_tl_runs_resched));
3616 _OUTP_IT("Outbound tasklet runs tried/retried : %i/%i\n",
3617 atomic_read(&perf_stats.outbound_tl_runs),
3618 atomic_read(&perf_stats.outbound_tl_runs_resched));
3619 _OUTP_IT("\n");
3620 _OUTP_IT("Number of SIGA sync's issued : %i\n",
3621 atomic_read(&perf_stats.siga_syncs));
3622 _OUTP_IT("Number of SIGA in's issued : %i\n",
3623 atomic_read(&perf_stats.siga_ins));
3624 _OUTP_IT("Number of SIGA out's issued : %i\n",
3625 atomic_read(&perf_stats.siga_outs));
3626 _OUTP_IT("Number of PCIs caught : %i\n",
3627 atomic_read(&perf_stats.pcis));
3628 _OUTP_IT("Number of adapter interrupts caught : %i\n",
3629 atomic_read(&perf_stats.thinints));
3630 _OUTP_IT("Number of fast requeues (outg. SBALs w/o SIGA) : %i\n",
3631 atomic_read(&perf_stats.fast_reqs));
3632 _OUTP_IT("\n");
3633 _OUTP_IT("Number of inbound transfers : %i\n",
3634 atomic_read(&perf_stats.inbound_cnt));
3635 _OUTP_IT("Number of do_QDIOs outbound : %i\n",
3636 atomic_read(&perf_stats.outbound_cnt));
3637 #endif /* CONFIG_64BIT */
3638 _OUTP_IT("\n");
3639
3640 return c;
3641 }
3642
3643 static struct proc_dir_entry *qdio_perf_proc_file;
3644
3645 static void
3646 qdio_add_procfs_entry(void)
3647 {
3648 proc_perf_file_registration=0;
3649 qdio_perf_proc_file=create_proc_entry(QDIO_PERF,
3650 S_IFREG|0444,&proc_root);
3651 if (qdio_perf_proc_file) {
3652 qdio_perf_proc_file->read_proc=&qdio_perf_procfile_read;
3653 } else proc_perf_file_registration=-1;
3654
3655 if (proc_perf_file_registration)
3656 QDIO_PRINT_WARN("was not able to register perf. " \
3657 "proc-file (%i).\n",
3658 proc_perf_file_registration);
3659 }
3660
3661 static void
3662 qdio_remove_procfs_entry(void)
3663 {
3664 if (!proc_perf_file_registration) /* means if it went ok earlier */
3665 remove_proc_entry(QDIO_PERF,&proc_root);
3666 }
3667
3668 /**
3669 * attributes in sysfs
3670 *****************************************************************************/
3671
3672 static ssize_t
3673 qdio_performance_stats_show(struct bus_type *bus, char *buf)
3674 {
3675 return sprintf(buf, "%i\n", qdio_performance_stats ? 1 : 0);
3676 }
3677
3678 static ssize_t
3679 qdio_performance_stats_store(struct bus_type *bus, const char *buf, size_t count)
3680 {
3681 char *tmp;
3682 int i;
3683
3684 i = simple_strtoul(buf, &tmp, 16);
3685 if ((i == 0) || (i == 1)) {
3686 if (i == qdio_performance_stats)
3687 return count;
3688 qdio_performance_stats = i;
3689 if (i==0) {
3690 /* reset perf. stat. info */
3691 #ifdef CONFIG_64BIT
3692 atomic64_set(&perf_stats.tl_runs, 0);
3693 atomic64_set(&perf_stats.outbound_tl_runs, 0);
3694 atomic64_set(&perf_stats.inbound_tl_runs, 0);
3695 atomic64_set(&perf_stats.inbound_tl_runs_resched, 0);
3696 atomic64_set(&perf_stats.inbound_thin_tl_runs, 0);
3697 atomic64_set(&perf_stats.inbound_thin_tl_runs_resched,
3698 0);
3699 atomic64_set(&perf_stats.siga_outs, 0);
3700 atomic64_set(&perf_stats.siga_ins, 0);
3701 atomic64_set(&perf_stats.siga_syncs, 0);
3702 atomic64_set(&perf_stats.pcis, 0);
3703 atomic64_set(&perf_stats.thinints, 0);
3704 atomic64_set(&perf_stats.fast_reqs, 0);
3705 atomic64_set(&perf_stats.outbound_cnt, 0);
3706 atomic64_set(&perf_stats.inbound_cnt, 0);
3707 #else /* CONFIG_64BIT */
3708 atomic_set(&perf_stats.tl_runs, 0);
3709 atomic_set(&perf_stats.outbound_tl_runs, 0);
3710 atomic_set(&perf_stats.inbound_tl_runs, 0);
3711 atomic_set(&perf_stats.inbound_tl_runs_resched, 0);
3712 atomic_set(&perf_stats.inbound_thin_tl_runs, 0);
3713 atomic_set(&perf_stats.inbound_thin_tl_runs_resched, 0);
3714 atomic_set(&perf_stats.siga_outs, 0);
3715 atomic_set(&perf_stats.siga_ins, 0);
3716 atomic_set(&perf_stats.siga_syncs, 0);
3717 atomic_set(&perf_stats.pcis, 0);
3718 atomic_set(&perf_stats.thinints, 0);
3719 atomic_set(&perf_stats.fast_reqs, 0);
3720 atomic_set(&perf_stats.outbound_cnt, 0);
3721 atomic_set(&perf_stats.inbound_cnt, 0);
3722 #endif /* CONFIG_64BIT */
3723 }
3724 } else {
3725 QDIO_PRINT_ERR("QDIO performance_stats: write 0 or 1 to this file!\n");
3726 return -EINVAL;
3727 }
3728 return count;
3729 }
3730
3731 static BUS_ATTR(qdio_performance_stats, 0644, qdio_performance_stats_show,
3732 qdio_performance_stats_store);
3733
3734 static void
3735 tiqdio_register_thinints(void)
3736 {
3737 char dbf_text[20];
3738
3739 tiqdio_ind =
3740 s390_register_adapter_interrupt(&tiqdio_thinint_handler, NULL);
3741 if (IS_ERR(tiqdio_ind)) {
3742 sprintf(dbf_text, "regthn%lx", PTR_ERR(tiqdio_ind));
3743 QDIO_DBF_TEXT0(0,setup,dbf_text);
3744 QDIO_PRINT_ERR("failed to register adapter handler " \
3745 "(rc=%li).\nAdapter interrupts might " \
3746 "not work. Continuing.\n",
3747 PTR_ERR(tiqdio_ind));
3748 tiqdio_ind = NULL;
3749 }
3750 }
3751
3752 static void
3753 tiqdio_unregister_thinints(void)
3754 {
3755 if (tiqdio_ind)
3756 s390_unregister_adapter_interrupt(tiqdio_ind);
3757 }
3758
3759 static int
3760 qdio_get_qdio_memory(void)
3761 {
3762 int i;
3763 indicator_used[0]=1;
3764
3765 for (i=1;i<INDICATORS_PER_CACHELINE;i++)
3766 indicator_used[i]=0;
3767 indicators = kzalloc(sizeof(__u32)*(INDICATORS_PER_CACHELINE),
3768 GFP_KERNEL);
3769 if (!indicators)
3770 return -ENOMEM;
3771 return 0;
3772 }
3773
3774 static void
3775 qdio_release_qdio_memory(void)
3776 {
3777 kfree(indicators);
3778 }
3779
3780 static void
3781 qdio_unregister_dbf_views(void)
3782 {
3783 if (qdio_dbf_setup)
3784 debug_unregister(qdio_dbf_setup);
3785 if (qdio_dbf_sbal)
3786 debug_unregister(qdio_dbf_sbal);
3787 if (qdio_dbf_sense)
3788 debug_unregister(qdio_dbf_sense);
3789 if (qdio_dbf_trace)
3790 debug_unregister(qdio_dbf_trace);
3791 #ifdef CONFIG_QDIO_DEBUG
3792 if (qdio_dbf_slsb_out)
3793 debug_unregister(qdio_dbf_slsb_out);
3794 if (qdio_dbf_slsb_in)
3795 debug_unregister(qdio_dbf_slsb_in);
3796 #endif /* CONFIG_QDIO_DEBUG */
3797 }
3798
3799 static int
3800 qdio_register_dbf_views(void)
3801 {
3802 qdio_dbf_setup=debug_register(QDIO_DBF_SETUP_NAME,
3803 QDIO_DBF_SETUP_PAGES,
3804 QDIO_DBF_SETUP_NR_AREAS,
3805 QDIO_DBF_SETUP_LEN);
3806 if (!qdio_dbf_setup)
3807 goto oom;
3808 debug_register_view(qdio_dbf_setup,&debug_hex_ascii_view);
3809 debug_set_level(qdio_dbf_setup,QDIO_DBF_SETUP_LEVEL);
3810
3811 qdio_dbf_sbal=debug_register(QDIO_DBF_SBAL_NAME,
3812 QDIO_DBF_SBAL_PAGES,
3813 QDIO_DBF_SBAL_NR_AREAS,
3814 QDIO_DBF_SBAL_LEN);
3815 if (!qdio_dbf_sbal)
3816 goto oom;
3817
3818 debug_register_view(qdio_dbf_sbal,&debug_hex_ascii_view);
3819 debug_set_level(qdio_dbf_sbal,QDIO_DBF_SBAL_LEVEL);
3820
3821 qdio_dbf_sense=debug_register(QDIO_DBF_SENSE_NAME,
3822 QDIO_DBF_SENSE_PAGES,
3823 QDIO_DBF_SENSE_NR_AREAS,
3824 QDIO_DBF_SENSE_LEN);
3825 if (!qdio_dbf_sense)
3826 goto oom;
3827
3828 debug_register_view(qdio_dbf_sense,&debug_hex_ascii_view);
3829 debug_set_level(qdio_dbf_sense,QDIO_DBF_SENSE_LEVEL);
3830
3831 qdio_dbf_trace=debug_register(QDIO_DBF_TRACE_NAME,
3832 QDIO_DBF_TRACE_PAGES,
3833 QDIO_DBF_TRACE_NR_AREAS,
3834 QDIO_DBF_TRACE_LEN);
3835 if (!qdio_dbf_trace)
3836 goto oom;
3837
3838 debug_register_view(qdio_dbf_trace,&debug_hex_ascii_view);
3839 debug_set_level(qdio_dbf_trace,QDIO_DBF_TRACE_LEVEL);
3840
3841 #ifdef CONFIG_QDIO_DEBUG
3842 qdio_dbf_slsb_out=debug_register(QDIO_DBF_SLSB_OUT_NAME,
3843 QDIO_DBF_SLSB_OUT_PAGES,
3844 QDIO_DBF_SLSB_OUT_NR_AREAS,
3845 QDIO_DBF_SLSB_OUT_LEN);
3846 if (!qdio_dbf_slsb_out)
3847 goto oom;
3848 debug_register_view(qdio_dbf_slsb_out,&debug_hex_ascii_view);
3849 debug_set_level(qdio_dbf_slsb_out,QDIO_DBF_SLSB_OUT_LEVEL);
3850
3851 qdio_dbf_slsb_in=debug_register(QDIO_DBF_SLSB_IN_NAME,
3852 QDIO_DBF_SLSB_IN_PAGES,
3853 QDIO_DBF_SLSB_IN_NR_AREAS,
3854 QDIO_DBF_SLSB_IN_LEN);
3855 if (!qdio_dbf_slsb_in)
3856 goto oom;
3857 debug_register_view(qdio_dbf_slsb_in,&debug_hex_ascii_view);
3858 debug_set_level(qdio_dbf_slsb_in,QDIO_DBF_SLSB_IN_LEVEL);
3859 #endif /* CONFIG_QDIO_DEBUG */
3860 return 0;
3861 oom:
3862 QDIO_PRINT_ERR("not enough memory for dbf.\n");
3863 qdio_unregister_dbf_views();
3864 return -ENOMEM;
3865 }
3866
3867 static void *qdio_mempool_alloc(gfp_t gfp_mask, void *size)
3868 {
3869 return (void *) get_zeroed_page(gfp_mask|GFP_DMA);
3870 }
3871
3872 static void qdio_mempool_free(void *element, void *size)
3873 {
3874 free_page((unsigned long) element);
3875 }
3876
3877 static int __init
3878 init_QDIO(void)
3879 {
3880 int res;
3881 void *ptr;
3882
3883 printk("qdio: loading %s\n",version);
3884
3885 res=qdio_get_qdio_memory();
3886 if (res)
3887 return res;
3888
3889 qdio_q_cache = kmem_cache_create("qdio_q", sizeof(struct qdio_q),
3890 256, 0, NULL);
3891 if (!qdio_q_cache) {
3892 qdio_release_qdio_memory();
3893 return -ENOMEM;
3894 }
3895
3896 res = qdio_register_dbf_views();
3897 if (res) {
3898 kmem_cache_destroy(qdio_q_cache);
3899 qdio_release_qdio_memory();
3900 return res;
3901 }
3902
3903 QDIO_DBF_TEXT0(0,setup,"initQDIO");
3904 res = bus_create_file(&ccw_bus_type, &bus_attr_qdio_performance_stats);
3905
3906 memset((void*)&perf_stats,0,sizeof(perf_stats));
3907 QDIO_DBF_TEXT0(0,setup,"perfstat");
3908 ptr=&perf_stats;
3909 QDIO_DBF_HEX0(0,setup,&ptr,sizeof(void*));
3910
3911 qdio_add_procfs_entry();
3912
3913 qdio_mempool_scssc = mempool_create(QDIO_MEMPOOL_SCSSC_ELEMENTS,
3914 qdio_mempool_alloc,
3915 qdio_mempool_free, NULL);
3916
3917 if (tiqdio_check_chsc_availability())
3918 QDIO_PRINT_ERR("Not all CHSCs supported. Continuing.\n");
3919
3920 tiqdio_register_thinints();
3921
3922 return 0;
3923 }
3924
3925 static void __exit
3926 cleanup_QDIO(void)
3927 {
3928 tiqdio_unregister_thinints();
3929 qdio_remove_procfs_entry();
3930 qdio_release_qdio_memory();
3931 qdio_unregister_dbf_views();
3932 mempool_destroy(qdio_mempool_scssc);
3933 kmem_cache_destroy(qdio_q_cache);
3934 bus_remove_file(&ccw_bus_type, &bus_attr_qdio_performance_stats);
3935 printk("qdio: %s: module removed\n",version);
3936 }
3937
3938 module_init(init_QDIO);
3939 module_exit(cleanup_QDIO);
3940
3941 EXPORT_SYMBOL(qdio_allocate);
3942 EXPORT_SYMBOL(qdio_establish);
3943 EXPORT_SYMBOL(qdio_initialize);
3944 EXPORT_SYMBOL(qdio_activate);
3945 EXPORT_SYMBOL(do_QDIO);
3946 EXPORT_SYMBOL(qdio_shutdown);
3947 EXPORT_SYMBOL(qdio_free);
3948 EXPORT_SYMBOL(qdio_cleanup);
3949 EXPORT_SYMBOL(qdio_synchronize);
WRT350N Kernel Patches