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x86: coding style fixes in arch/x86/lib/io_64.c
[wrt350n-kernel.git] / drivers / serial / mpc52xx_uart.c
bloba638f23c6c6110189e25284f148c1e9671ec8535
1 /*
2 * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
3 *
4 * FIXME According to the usermanual the status bits in the status register
5 * are only updated when the peripherals access the FIFO and not when the
6 * CPU access them. So since we use this bits to know when we stop writing
7 * and reading, they may not be updated in-time and a race condition may
8 * exists. But I haven't be able to prove this and I don't care. But if
9 * any problem arises, it might worth checking. The TX/RX FIFO Stats
10 * registers should be used in addition.
11 * Update: Actually, they seem updated ... At least the bits we use.
12 *
13 *
14 * Maintainer : Sylvain Munaut <tnt@246tNt.com>
15 *
16 * Some of the code has been inspired/copied from the 2.4 code written
17 * by Dale Farnsworth <dfarnsworth@mvista.com>.
18 *
19 * Copyright (C) 2008 Freescale Semiconductor Inc.
20 * John Rigby <jrigby@gmail.com>
21 * Added support for MPC5121
22 * Copyright (C) 2006 Secret Lab Technologies Ltd.
23 * Grant Likely <grant.likely@secretlab.ca>
24 * Copyright (C) 2004-2006 Sylvain Munaut <tnt@246tNt.com>
25 * Copyright (C) 2003 MontaVista, Software, Inc.
26 *
27 * This file is licensed under the terms of the GNU General Public License
28 * version 2. This program is licensed "as is" without any warranty of any
29 * kind, whether express or implied.
30 */
31
32 /* Platform device Usage :
33 *
34 * Since PSCs can have multiple function, the correct driver for each one
35 * is selected by calling mpc52xx_match_psc_function(...). The function
36 * handled by this driver is "uart".
37 *
38 * The driver init all necessary registers to place the PSC in uart mode without
39 * DCD. However, the pin multiplexing aren't changed and should be set either
40 * by the bootloader or in the platform init code.
41 *
42 * The idx field must be equal to the PSC index (e.g. 0 for PSC1, 1 for PSC2,
43 * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
44 * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
45 * fpr the console code : without this 1:1 mapping, at early boot time, when we
46 * are parsing the kernel args console=ttyPSC?, we wouldn't know which PSC it
47 * will be mapped to.
48 */
49
50 /* OF Platform device Usage :
51 *
52 * This driver is only used for PSCs configured in uart mode. The device
53 * tree will have a node for each PSC in uart mode w/ device_type = "serial"
54 * and "mpc52xx-psc-uart" in the compatible string
55 *
56 * By default, PSC devices are enumerated in the order they are found. However
57 * a particular PSC number can be forces by adding 'device_no = <port#>'
58 * to the device node.
59 *
60 * The driver init all necessary registers to place the PSC in uart mode without
61 * DCD. However, the pin multiplexing aren't changed and should be set either
62 * by the bootloader or in the platform init code.
63 */
64
65 #undef DEBUG
66
67 #include <linux/device.h>
68 #include <linux/module.h>
69 #include <linux/tty.h>
70 #include <linux/serial.h>
71 #include <linux/sysrq.h>
72 #include <linux/console.h>
73 #include <linux/delay.h>
74 #include <linux/io.h>
75
76 #if defined(CONFIG_PPC_MERGE)
77 #include <linux/of.h>
78 #include <linux/of_platform.h>
79 #else
80 #include <linux/platform_device.h>
81 #endif
82
83 #include <asm/mpc52xx.h>
84 #include <asm/mpc512x.h>
85 #include <asm/mpc52xx_psc.h>
86
87 #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
88 #define SUPPORT_SYSRQ
89 #endif
90
91 #include <linux/serial_core.h>
92
93
94 /* We've been assigned a range on the "Low-density serial ports" major */
95 #define SERIAL_PSC_MAJOR 204
96 #define SERIAL_PSC_MINOR 148
97
98
99 #define ISR_PASS_LIMIT 256 /* Max number of iteration in the interrupt */
100
101
102 static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM];
103 /* Rem: - We use the read_status_mask as a shadow of
104 * psc->mpc52xx_psc_imr
105 * - It's important that is array is all zero on start as we
106 * use it to know if it's initialized or not ! If it's not sure
107 * it's cleared, then a memset(...,0,...) should be added to
108 * the console_init
109 */
110 #if defined(CONFIG_PPC_MERGE)
111 /* lookup table for matching device nodes to index numbers */
112 static struct device_node *mpc52xx_uart_nodes[MPC52xx_PSC_MAXNUM];
113
114 static void mpc52xx_uart_of_enumerate(void);
115 #endif
116
117
118 #define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
119
120
121 /* Forward declaration of the interruption handling routine */
122 static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id);
123
124
125 /* Simple macro to test if a port is console or not. This one is taken
126 * for serial_core.c and maybe should be moved to serial_core.h ? */
127 #ifdef CONFIG_SERIAL_CORE_CONSOLE
128 #define uart_console(port) \
129 ((port)->cons && (port)->cons->index == (port)->line)
130 #else
131 #define uart_console(port) (0)
132 #endif
133
134 /* ======================================================================== */
135 /* PSC fifo operations for isolating differences between 52xx and 512x */
136 /* ======================================================================== */
137
138 struct psc_ops {
139 void (*fifo_init)(struct uart_port *port);
140 int (*raw_rx_rdy)(struct uart_port *port);
141 int (*raw_tx_rdy)(struct uart_port *port);
142 int (*rx_rdy)(struct uart_port *port);
143 int (*tx_rdy)(struct uart_port *port);
144 int (*tx_empty)(struct uart_port *port);
145 void (*stop_rx)(struct uart_port *port);
146 void (*start_tx)(struct uart_port *port);
147 void (*stop_tx)(struct uart_port *port);
148 void (*rx_clr_irq)(struct uart_port *port);
149 void (*tx_clr_irq)(struct uart_port *port);
150 void (*write_char)(struct uart_port *port, unsigned char c);
151 unsigned char (*read_char)(struct uart_port *port);
152 void (*cw_disable_ints)(struct uart_port *port);
153 void (*cw_restore_ints)(struct uart_port *port);
154 unsigned long (*getuartclk)(void *p);
155 };
156
157 #ifdef CONFIG_PPC_MPC52xx
158 #define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
159 static void mpc52xx_psc_fifo_init(struct uart_port *port)
160 {
161 struct mpc52xx_psc __iomem *psc = PSC(port);
162 struct mpc52xx_psc_fifo __iomem *fifo = FIFO_52xx(port);
163
164 /* /32 prescaler */
165 out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00);
166
167 out_8(&fifo->rfcntl, 0x00);
168 out_be16(&fifo->rfalarm, 0x1ff);
169 out_8(&fifo->tfcntl, 0x07);
170 out_be16(&fifo->tfalarm, 0x80);
171
172 port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
173 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
174 }
175
176 static int mpc52xx_psc_raw_rx_rdy(struct uart_port *port)
177 {
178 return in_be16(&PSC(port)->mpc52xx_psc_status)
179 & MPC52xx_PSC_SR_RXRDY;
180 }
181
182 static int mpc52xx_psc_raw_tx_rdy(struct uart_port *port)
183 {
184 return in_be16(&PSC(port)->mpc52xx_psc_status)
185 & MPC52xx_PSC_SR_TXRDY;
186 }
187
188
189 static int mpc52xx_psc_rx_rdy(struct uart_port *port)
190 {
191 return in_be16(&PSC(port)->mpc52xx_psc_isr)
192 & port->read_status_mask
193 & MPC52xx_PSC_IMR_RXRDY;
194 }
195
196 static int mpc52xx_psc_tx_rdy(struct uart_port *port)
197 {
198 return in_be16(&PSC(port)->mpc52xx_psc_isr)
199 & port->read_status_mask
200 & MPC52xx_PSC_IMR_TXRDY;
201 }
202
203 static int mpc52xx_psc_tx_empty(struct uart_port *port)
204 {
205 return in_be16(&PSC(port)->mpc52xx_psc_status)
206 & MPC52xx_PSC_SR_TXEMP;
207 }
208
209 static void mpc52xx_psc_start_tx(struct uart_port *port)
210 {
211 port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
212 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
213 }
214
215 static void mpc52xx_psc_stop_tx(struct uart_port *port)
216 {
217 port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
218 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
219 }
220
221 static void mpc52xx_psc_stop_rx(struct uart_port *port)
222 {
223 port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
224 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
225 }
226
227 static void mpc52xx_psc_rx_clr_irq(struct uart_port *port)
228 {
229 }
230
231 static void mpc52xx_psc_tx_clr_irq(struct uart_port *port)
232 {
233 }
234
235 static void mpc52xx_psc_write_char(struct uart_port *port, unsigned char c)
236 {
237 out_8(&PSC(port)->mpc52xx_psc_buffer_8, c);
238 }
239
240 static unsigned char mpc52xx_psc_read_char(struct uart_port *port)
241 {
242 return in_8(&PSC(port)->mpc52xx_psc_buffer_8);
243 }
244
245 static void mpc52xx_psc_cw_disable_ints(struct uart_port *port)
246 {
247 out_be16(&PSC(port)->mpc52xx_psc_imr, 0);
248 }
249
250 static void mpc52xx_psc_cw_restore_ints(struct uart_port *port)
251 {
252 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
253 }
254
255 /* Search for bus-frequency property in this node or a parent */
256 static unsigned long mpc52xx_getuartclk(void *p)
257 {
258 #if defined(CONFIG_PPC_MERGE)
259 /*
260 * 5200 UARTs have a / 32 prescaler
261 * but the generic serial code assumes 16
262 * so return ipb freq / 2
263 */
264 return mpc52xx_find_ipb_freq(p) / 2;
265 #else
266 pr_debug("unexpected call to mpc52xx_getuartclk with arch/ppc\n");
267 return NULL;
268 #endif
269 }
270
271 static struct psc_ops mpc52xx_psc_ops = {
272 .fifo_init = mpc52xx_psc_fifo_init,
273 .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy,
274 .raw_tx_rdy = mpc52xx_psc_raw_tx_rdy,
275 .rx_rdy = mpc52xx_psc_rx_rdy,
276 .tx_rdy = mpc52xx_psc_tx_rdy,
277 .tx_empty = mpc52xx_psc_tx_empty,
278 .stop_rx = mpc52xx_psc_stop_rx,
279 .start_tx = mpc52xx_psc_start_tx,
280 .stop_tx = mpc52xx_psc_stop_tx,
281 .rx_clr_irq = mpc52xx_psc_rx_clr_irq,
282 .tx_clr_irq = mpc52xx_psc_tx_clr_irq,
283 .write_char = mpc52xx_psc_write_char,
284 .read_char = mpc52xx_psc_read_char,
285 .cw_disable_ints = mpc52xx_psc_cw_disable_ints,
286 .cw_restore_ints = mpc52xx_psc_cw_restore_ints,
287 .getuartclk = mpc52xx_getuartclk,
288 };
289
290 #endif /* CONFIG_MPC52xx */
291
292 #ifdef CONFIG_PPC_MPC512x
293 #define FIFO_512x(port) ((struct mpc512x_psc_fifo __iomem *)(PSC(port)+1))
294 static void mpc512x_psc_fifo_init(struct uart_port *port)
295 {
296 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE);
297 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
298 out_be32(&FIFO_512x(port)->txalarm, 1);
299 out_be32(&FIFO_512x(port)->tximr, 0);
300
301 out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_RESET_SLICE);
302 out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
303 out_be32(&FIFO_512x(port)->rxalarm, 1);
304 out_be32(&FIFO_512x(port)->rximr, 0);
305
306 out_be32(&FIFO_512x(port)->tximr, MPC512x_PSC_FIFO_ALARM);
307 out_be32(&FIFO_512x(port)->rximr, MPC512x_PSC_FIFO_ALARM);
308 }
309
310 static int mpc512x_psc_raw_rx_rdy(struct uart_port *port)
311 {
312 return !(in_be32(&FIFO_512x(port)->rxsr) & MPC512x_PSC_FIFO_EMPTY);
313 }
314
315 static int mpc512x_psc_raw_tx_rdy(struct uart_port *port)
316 {
317 return !(in_be32(&FIFO_512x(port)->txsr) & MPC512x_PSC_FIFO_FULL);
318 }
319
320 static int mpc512x_psc_rx_rdy(struct uart_port *port)
321 {
322 return in_be32(&FIFO_512x(port)->rxsr)
323 & in_be32(&FIFO_512x(port)->rximr)
324 & MPC512x_PSC_FIFO_ALARM;
325 }
326
327 static int mpc512x_psc_tx_rdy(struct uart_port *port)
328 {
329 return in_be32(&FIFO_512x(port)->txsr)
330 & in_be32(&FIFO_512x(port)->tximr)
331 & MPC512x_PSC_FIFO_ALARM;
332 }
333
334 static int mpc512x_psc_tx_empty(struct uart_port *port)
335 {
336 return in_be32(&FIFO_512x(port)->txsr)
337 & MPC512x_PSC_FIFO_EMPTY;
338 }
339
340 static void mpc512x_psc_stop_rx(struct uart_port *port)
341 {
342 unsigned long rx_fifo_imr;
343
344 rx_fifo_imr = in_be32(&FIFO_512x(port)->rximr);
345 rx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
346 out_be32(&FIFO_512x(port)->rximr, rx_fifo_imr);
347 }
348
349 static void mpc512x_psc_start_tx(struct uart_port *port)
350 {
351 unsigned long tx_fifo_imr;
352
353 tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
354 tx_fifo_imr |= MPC512x_PSC_FIFO_ALARM;
355 out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
356 }
357
358 static void mpc512x_psc_stop_tx(struct uart_port *port)
359 {
360 unsigned long tx_fifo_imr;
361
362 tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
363 tx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
364 out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
365 }
366
367 static void mpc512x_psc_rx_clr_irq(struct uart_port *port)
368 {
369 out_be32(&FIFO_512x(port)->rxisr, in_be32(&FIFO_512x(port)->rxisr));
370 }
371
372 static void mpc512x_psc_tx_clr_irq(struct uart_port *port)
373 {
374 out_be32(&FIFO_512x(port)->txisr, in_be32(&FIFO_512x(port)->txisr));
375 }
376
377 static void mpc512x_psc_write_char(struct uart_port *port, unsigned char c)
378 {
379 out_8(&FIFO_512x(port)->txdata_8, c);
380 }
381
382 static unsigned char mpc512x_psc_read_char(struct uart_port *port)
383 {
384 return in_8(&FIFO_512x(port)->rxdata_8);
385 }
386
387 static void mpc512x_psc_cw_disable_ints(struct uart_port *port)
388 {
389 port->read_status_mask =
390 in_be32(&FIFO_512x(port)->tximr) << 16 |
391 in_be32(&FIFO_512x(port)->rximr);
392 out_be32(&FIFO_512x(port)->tximr, 0);
393 out_be32(&FIFO_512x(port)->rximr, 0);
394 }
395
396 static void mpc512x_psc_cw_restore_ints(struct uart_port *port)
397 {
398 out_be32(&FIFO_512x(port)->tximr,
399 (port->read_status_mask >> 16) & 0x7f);
400 out_be32(&FIFO_512x(port)->rximr, port->read_status_mask & 0x7f);
401 }
402
403 static unsigned long mpc512x_getuartclk(void *p)
404 {
405 return mpc512x_find_ips_freq(p);
406 }
407
408 static struct psc_ops mpc512x_psc_ops = {
409 .fifo_init = mpc512x_psc_fifo_init,
410 .raw_rx_rdy = mpc512x_psc_raw_rx_rdy,
411 .raw_tx_rdy = mpc512x_psc_raw_tx_rdy,
412 .rx_rdy = mpc512x_psc_rx_rdy,
413 .tx_rdy = mpc512x_psc_tx_rdy,
414 .tx_empty = mpc512x_psc_tx_empty,
415 .stop_rx = mpc512x_psc_stop_rx,
416 .start_tx = mpc512x_psc_start_tx,
417 .stop_tx = mpc512x_psc_stop_tx,
418 .rx_clr_irq = mpc512x_psc_rx_clr_irq,
419 .tx_clr_irq = mpc512x_psc_tx_clr_irq,
420 .write_char = mpc512x_psc_write_char,
421 .read_char = mpc512x_psc_read_char,
422 .cw_disable_ints = mpc512x_psc_cw_disable_ints,
423 .cw_restore_ints = mpc512x_psc_cw_restore_ints,
424 .getuartclk = mpc512x_getuartclk,
425 };
426 #endif
427
428 static struct psc_ops *psc_ops;
429
430 /* ======================================================================== */
431 /* UART operations */
432 /* ======================================================================== */
433
434 static unsigned int
435 mpc52xx_uart_tx_empty(struct uart_port *port)
436 {
437 return psc_ops->tx_empty(port) ? TIOCSER_TEMT : 0;
438 }
439
440 static void
441 mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
442 {
443 /* Not implemented */
444 }
445
446 static unsigned int
447 mpc52xx_uart_get_mctrl(struct uart_port *port)
448 {
449 /* Not implemented */
450 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
451 }
452
453 static void
454 mpc52xx_uart_stop_tx(struct uart_port *port)
455 {
456 /* port->lock taken by caller */
457 psc_ops->stop_tx(port);
458 }
459
460 static void
461 mpc52xx_uart_start_tx(struct uart_port *port)
462 {
463 /* port->lock taken by caller */
464 psc_ops->start_tx(port);
465 }
466
467 static void
468 mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
469 {
470 unsigned long flags;
471 spin_lock_irqsave(&port->lock, flags);
472
473 port->x_char = ch;
474 if (ch) {
475 /* Make sure tx interrupts are on */
476 /* Truly necessary ??? They should be anyway */
477 psc_ops->start_tx(port);
478 }
479
480 spin_unlock_irqrestore(&port->lock, flags);
481 }
482
483 static void
484 mpc52xx_uart_stop_rx(struct uart_port *port)
485 {
486 /* port->lock taken by caller */
487 psc_ops->stop_rx(port);
488 }
489
490 static void
491 mpc52xx_uart_enable_ms(struct uart_port *port)
492 {
493 /* Not implemented */
494 }
495
496 static void
497 mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
498 {
499 unsigned long flags;
500 spin_lock_irqsave(&port->lock, flags);
501
502 if (ctl == -1)
503 out_8(&PSC(port)->command, MPC52xx_PSC_START_BRK);
504 else
505 out_8(&PSC(port)->command, MPC52xx_PSC_STOP_BRK);
506
507 spin_unlock_irqrestore(&port->lock, flags);
508 }
509
510 static int
511 mpc52xx_uart_startup(struct uart_port *port)
512 {
513 struct mpc52xx_psc __iomem *psc = PSC(port);
514 int ret;
515
516 /* Request IRQ */
517 ret = request_irq(port->irq, mpc52xx_uart_int,
518 IRQF_DISABLED | IRQF_SAMPLE_RANDOM | IRQF_SHARED,
519 "mpc52xx_psc_uart", port);
520 if (ret)
521 return ret;
522
523 /* Reset/activate the port, clear and enable interrupts */
524 out_8(&psc->command, MPC52xx_PSC_RST_RX);
525 out_8(&psc->command, MPC52xx_PSC_RST_TX);
526
527 out_be32(&psc->sicr, 0); /* UART mode DCD ignored */
528
529 psc_ops->fifo_init(port);
530
531 out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
532 out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
533
534 return 0;
535 }
536
537 static void
538 mpc52xx_uart_shutdown(struct uart_port *port)
539 {
540 struct mpc52xx_psc __iomem *psc = PSC(port);
541
542 /* Shut down the port. Leave TX active if on a console port */
543 out_8(&psc->command, MPC52xx_PSC_RST_RX);
544 if (!uart_console(port))
545 out_8(&psc->command, MPC52xx_PSC_RST_TX);
546
547 port->read_status_mask = 0;
548 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
549
550 /* Release interrupt */
551 free_irq(port->irq, port);
552 }
553
554 static void
555 mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
556 struct ktermios *old)
557 {
558 struct mpc52xx_psc __iomem *psc = PSC(port);
559 unsigned long flags;
560 unsigned char mr1, mr2;
561 unsigned short ctr;
562 unsigned int j, baud, quot;
563
564 /* Prepare what we're gonna write */
565 mr1 = 0;
566
567 switch (new->c_cflag & CSIZE) {
568 case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS;
569 break;
570 case CS6: mr1 |= MPC52xx_PSC_MODE_6_BITS;
571 break;
572 case CS7: mr1 |= MPC52xx_PSC_MODE_7_BITS;
573 break;
574 case CS8:
575 default: mr1 |= MPC52xx_PSC_MODE_8_BITS;
576 }
577
578 if (new->c_cflag & PARENB) {
579 mr1 |= (new->c_cflag & PARODD) ?
580 MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN;
581 } else
582 mr1 |= MPC52xx_PSC_MODE_PARNONE;
583
584
585 mr2 = 0;
586
587 if (new->c_cflag & CSTOPB)
588 mr2 |= MPC52xx_PSC_MODE_TWO_STOP;
589 else
590 mr2 |= ((new->c_cflag & CSIZE) == CS5) ?
591 MPC52xx_PSC_MODE_ONE_STOP_5_BITS :
592 MPC52xx_PSC_MODE_ONE_STOP;
593
594
595 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
596 quot = uart_get_divisor(port, baud);
597 ctr = quot & 0xffff;
598
599 /* Get the lock */
600 spin_lock_irqsave(&port->lock, flags);
601
602 /* Update the per-port timeout */
603 uart_update_timeout(port, new->c_cflag, baud);
604
605 /* Do our best to flush TX & RX, so we don't loose anything */
606 /* But we don't wait indefinitly ! */
607 j = 5000000; /* Maximum wait */
608 /* FIXME Can't receive chars since set_termios might be called at early
609 * boot for the console, all stuff is not yet ready to receive at that
610 * time and that just makes the kernel oops */
611 /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
612 while (!mpc52xx_uart_tx_empty(port) && --j)
613 udelay(1);
614
615 if (!j)
616 printk(KERN_ERR "mpc52xx_uart.c: "
617 "Unable to flush RX & TX fifos in-time in set_termios."
618 "Some chars may have been lost.\n");
619
620 /* Reset the TX & RX */
621 out_8(&psc->command, MPC52xx_PSC_RST_RX);
622 out_8(&psc->command, MPC52xx_PSC_RST_TX);
623
624 /* Send new mode settings */
625 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
626 out_8(&psc->mode, mr1);
627 out_8(&psc->mode, mr2);
628 out_8(&psc->ctur, ctr >> 8);
629 out_8(&psc->ctlr, ctr & 0xff);
630
631 /* Reenable TX & RX */
632 out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
633 out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
634
635 /* We're all set, release the lock */
636 spin_unlock_irqrestore(&port->lock, flags);
637 }
638
639 static const char *
640 mpc52xx_uart_type(struct uart_port *port)
641 {
642 return port->type == PORT_MPC52xx ? "MPC52xx PSC" : NULL;
643 }
644
645 static void
646 mpc52xx_uart_release_port(struct uart_port *port)
647 {
648 /* remapped by us ? */
649 if (port->flags & UPF_IOREMAP) {
650 iounmap(port->membase);
651 port->membase = NULL;
652 }
653
654 release_mem_region(port->mapbase, sizeof(struct mpc52xx_psc));
655 }
656
657 static int
658 mpc52xx_uart_request_port(struct uart_port *port)
659 {
660 int err;
661
662 if (port->flags & UPF_IOREMAP) /* Need to remap ? */
663 port->membase = ioremap(port->mapbase,
664 sizeof(struct mpc52xx_psc));
665
666 if (!port->membase)
667 return -EINVAL;
668
669 err = request_mem_region(port->mapbase, sizeof(struct mpc52xx_psc),
670 "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY;
671
672 if (err && (port->flags & UPF_IOREMAP)) {
673 iounmap(port->membase);
674 port->membase = NULL;
675 }
676
677 return err;
678 }
679
680 static void
681 mpc52xx_uart_config_port(struct uart_port *port, int flags)
682 {
683 if ((flags & UART_CONFIG_TYPE)
684 && (mpc52xx_uart_request_port(port) == 0))
685 port->type = PORT_MPC52xx;
686 }
687
688 static int
689 mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
690 {
691 if (ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx)
692 return -EINVAL;
693
694 if ((ser->irq != port->irq) ||
695 (ser->io_type != SERIAL_IO_MEM) ||
696 (ser->baud_base != port->uartclk) ||
697 (ser->iomem_base != (void *)port->mapbase) ||
698 (ser->hub6 != 0))
699 return -EINVAL;
700
701 return 0;
702 }
703
704
705 static struct uart_ops mpc52xx_uart_ops = {
706 .tx_empty = mpc52xx_uart_tx_empty,
707 .set_mctrl = mpc52xx_uart_set_mctrl,
708 .get_mctrl = mpc52xx_uart_get_mctrl,
709 .stop_tx = mpc52xx_uart_stop_tx,
710 .start_tx = mpc52xx_uart_start_tx,
711 .send_xchar = mpc52xx_uart_send_xchar,
712 .stop_rx = mpc52xx_uart_stop_rx,
713 .enable_ms = mpc52xx_uart_enable_ms,
714 .break_ctl = mpc52xx_uart_break_ctl,
715 .startup = mpc52xx_uart_startup,
716 .shutdown = mpc52xx_uart_shutdown,
717 .set_termios = mpc52xx_uart_set_termios,
718 /* .pm = mpc52xx_uart_pm, Not supported yet */
719 /* .set_wake = mpc52xx_uart_set_wake, Not supported yet */
720 .type = mpc52xx_uart_type,
721 .release_port = mpc52xx_uart_release_port,
722 .request_port = mpc52xx_uart_request_port,
723 .config_port = mpc52xx_uart_config_port,
724 .verify_port = mpc52xx_uart_verify_port
725 };
726
727
728 /* ======================================================================== */
729 /* Interrupt handling */
730 /* ======================================================================== */
731
732 static inline int
733 mpc52xx_uart_int_rx_chars(struct uart_port *port)
734 {
735 struct tty_struct *tty = port->info->tty;
736 unsigned char ch, flag;
737 unsigned short status;
738
739 /* While we can read, do so ! */
740 while (psc_ops->raw_rx_rdy(port)) {
741 /* Get the char */
742 ch = psc_ops->read_char(port);
743
744 /* Handle sysreq char */
745 #ifdef SUPPORT_SYSRQ
746 if (uart_handle_sysrq_char(port, ch)) {
747 port->sysrq = 0;
748 continue;
749 }
750 #endif
751
752 /* Store it */
753
754 flag = TTY_NORMAL;
755 port->icount.rx++;
756
757 status = in_be16(&PSC(port)->mpc52xx_psc_status);
758
759 if (status & (MPC52xx_PSC_SR_PE |
760 MPC52xx_PSC_SR_FE |
761 MPC52xx_PSC_SR_RB)) {
762
763 if (status & MPC52xx_PSC_SR_RB) {
764 flag = TTY_BREAK;
765 uart_handle_break(port);
766 } else if (status & MPC52xx_PSC_SR_PE)
767 flag = TTY_PARITY;
768 else if (status & MPC52xx_PSC_SR_FE)
769 flag = TTY_FRAME;
770
771 /* Clear error condition */
772 out_8(&PSC(port)->command, MPC52xx_PSC_RST_ERR_STAT);
773
774 }
775 tty_insert_flip_char(tty, ch, flag);
776 if (status & MPC52xx_PSC_SR_OE) {
777 /*
778 * Overrun is special, since it's
779 * reported immediately, and doesn't
780 * affect the current character
781 */
782 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
783 }
784 }
785
786 tty_flip_buffer_push(tty);
787
788 return psc_ops->raw_rx_rdy(port);
789 }
790
791 static inline int
792 mpc52xx_uart_int_tx_chars(struct uart_port *port)
793 {
794 struct circ_buf *xmit = &port->info->xmit;
795
796 /* Process out of band chars */
797 if (port->x_char) {
798 psc_ops->write_char(port, port->x_char);
799 port->icount.tx++;
800 port->x_char = 0;
801 return 1;
802 }
803
804 /* Nothing to do ? */
805 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
806 mpc52xx_uart_stop_tx(port);
807 return 0;
808 }
809
810 /* Send chars */
811 while (psc_ops->raw_tx_rdy(port)) {
812 psc_ops->write_char(port, xmit->buf[xmit->tail]);
813 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
814 port->icount.tx++;
815 if (uart_circ_empty(xmit))
816 break;
817 }
818
819 /* Wake up */
820 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
821 uart_write_wakeup(port);
822
823 /* Maybe we're done after all */
824 if (uart_circ_empty(xmit)) {
825 mpc52xx_uart_stop_tx(port);
826 return 0;
827 }
828
829 return 1;
830 }
831
832 static irqreturn_t
833 mpc52xx_uart_int(int irq, void *dev_id)
834 {
835 struct uart_port *port = dev_id;
836 unsigned long pass = ISR_PASS_LIMIT;
837 unsigned int keepgoing;
838
839 spin_lock(&port->lock);
840
841 /* While we have stuff to do, we continue */
842 do {
843 /* If we don't find anything to do, we stop */
844 keepgoing = 0;
845
846 psc_ops->rx_clr_irq(port);
847 if (psc_ops->rx_rdy(port))
848 keepgoing |= mpc52xx_uart_int_rx_chars(port);
849
850 psc_ops->tx_clr_irq(port);
851 if (psc_ops->tx_rdy(port))
852 keepgoing |= mpc52xx_uart_int_tx_chars(port);
853
854 /* Limit number of iteration */
855 if (!(--pass))
856 keepgoing = 0;
857
858 } while (keepgoing);
859
860 spin_unlock(&port->lock);
861
862 return IRQ_HANDLED;
863 }
864
865
866 /* ======================================================================== */
867 /* Console ( if applicable ) */
868 /* ======================================================================== */
869
870 #ifdef CONFIG_SERIAL_MPC52xx_CONSOLE
871
872 static void __init
873 mpc52xx_console_get_options(struct uart_port *port,
874 int *baud, int *parity, int *bits, int *flow)
875 {
876 struct mpc52xx_psc __iomem *psc = PSC(port);
877 unsigned char mr1;
878
879 pr_debug("mpc52xx_console_get_options(port=%p)\n", port);
880
881 /* Read the mode registers */
882 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
883 mr1 = in_8(&psc->mode);
884
885 /* CT{U,L}R are write-only ! */
886 *baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
887 #if !defined(CONFIG_PPC_MERGE)
888 if (__res.bi_baudrate)
889 *baud = __res.bi_baudrate;
890 #endif
891
892 /* Parse them */
893 switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
894 case MPC52xx_PSC_MODE_5_BITS:
895 *bits = 5;
896 break;
897 case MPC52xx_PSC_MODE_6_BITS:
898 *bits = 6;
899 break;
900 case MPC52xx_PSC_MODE_7_BITS:
901 *bits = 7;
902 break;
903 case MPC52xx_PSC_MODE_8_BITS:
904 default:
905 *bits = 8;
906 }
907
908 if (mr1 & MPC52xx_PSC_MODE_PARNONE)
909 *parity = 'n';
910 else
911 *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e';
912 }
913
914 static void
915 mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
916 {
917 struct uart_port *port = &mpc52xx_uart_ports[co->index];
918 unsigned int i, j;
919
920 /* Disable interrupts */
921 psc_ops->cw_disable_ints(port);
922
923 /* Wait the TX buffer to be empty */
924 j = 5000000; /* Maximum wait */
925 while (!mpc52xx_uart_tx_empty(port) && --j)
926 udelay(1);
927
928 /* Write all the chars */
929 for (i = 0; i < count; i++, s++) {
930 /* Line return handling */
931 if (*s == '\n')
932 psc_ops->write_char(port, '\r');
933
934 /* Send the char */
935 psc_ops->write_char(port, *s);
936
937 /* Wait the TX buffer to be empty */
938 j = 20000; /* Maximum wait */
939 while (!mpc52xx_uart_tx_empty(port) && --j)
940 udelay(1);
941 }
942
943 /* Restore interrupt state */
944 psc_ops->cw_restore_ints(port);
945 }
946
947 #if !defined(CONFIG_PPC_MERGE)
948 static int __init
949 mpc52xx_console_setup(struct console *co, char *options)
950 {
951 struct uart_port *port = &mpc52xx_uart_ports[co->index];
952
953 int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
954 int bits = 8;
955 int parity = 'n';
956 int flow = 'n';
957
958 if (co->index < 0 || co->index >= MPC52xx_PSC_MAXNUM)
959 return -EINVAL;
960
961 /* Basic port init. Needed since we use some uart_??? func before
962 * real init for early access */
963 spin_lock_init(&port->lock);
964 port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
965 port->ops = &mpc52xx_uart_ops;
966 port->mapbase = MPC52xx_PA(MPC52xx_PSCx_OFFSET(co->index+1));
967
968 /* We ioremap ourself */
969 port->membase = ioremap(port->mapbase, MPC52xx_PSC_SIZE);
970 if (port->membase == NULL)
971 return -EINVAL;
972
973 /* Setup the port parameters accoding to options */
974 if (options)
975 uart_parse_options(options, &baud, &parity, &bits, &flow);
976 else
977 mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
978
979 return uart_set_options(port, co, baud, parity, bits, flow);
980 }
981
982 #else
983
984 static int __init
985 mpc52xx_console_setup(struct console *co, char *options)
986 {
987 struct uart_port *port = &mpc52xx_uart_ports[co->index];
988 struct device_node *np = mpc52xx_uart_nodes[co->index];
989 unsigned int uartclk;
990 struct resource res;
991 int ret;
992
993 int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
994 int bits = 8;
995 int parity = 'n';
996 int flow = 'n';
997
998 pr_debug("mpc52xx_console_setup co=%p, co->index=%i, options=%s\n",
999 co, co->index, options);
1000
1001 if ((co->index < 0) || (co->index > MPC52xx_PSC_MAXNUM)) {
1002 pr_debug("PSC%x out of range\n", co->index);
1003 return -EINVAL;
1004 }
1005
1006 if (!np) {
1007 pr_debug("PSC%x not found in device tree\n", co->index);
1008 return -EINVAL;
1009 }
1010
1011 pr_debug("Console on ttyPSC%x is %s\n",
1012 co->index, mpc52xx_uart_nodes[co->index]->full_name);
1013
1014 /* Fetch register locations */
1015 ret = of_address_to_resource(np, 0, &res);
1016 if (ret) {
1017 pr_debug("Could not get resources for PSC%x\n", co->index);
1018 return ret;
1019 }
1020
1021 uartclk = psc_ops->getuartclk(np);
1022 if (uartclk == 0) {
1023 pr_debug("Could not find uart clock frequency!\n");
1024 return -EINVAL;
1025 }
1026
1027 /* Basic port init. Needed since we use some uart_??? func before
1028 * real init for early access */
1029 spin_lock_init(&port->lock);
1030 port->uartclk = uartclk;
1031 port->ops = &mpc52xx_uart_ops;
1032 port->mapbase = res.start;
1033 port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc));
1034 port->irq = irq_of_parse_and_map(np, 0);
1035
1036 if (port->membase == NULL)
1037 return -EINVAL;
1038
1039 pr_debug("mpc52xx-psc uart at %p, mapped to %p, irq=%x, freq=%i\n",
1040 (void *)port->mapbase, port->membase,
1041 port->irq, port->uartclk);
1042
1043 /* Setup the port parameters accoding to options */
1044 if (options)
1045 uart_parse_options(options, &baud, &parity, &bits, &flow);
1046 else
1047 mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
1048
1049 pr_debug("Setting console parameters: %i %i%c1 flow=%c\n",
1050 baud, bits, parity, flow);
1051
1052 return uart_set_options(port, co, baud, parity, bits, flow);
1053 }
1054 #endif /* defined(CONFIG_PPC_MERGE) */
1055
1056
1057 static struct uart_driver mpc52xx_uart_driver;
1058
1059 static struct console mpc52xx_console = {
1060 .name = "ttyPSC",
1061 .write = mpc52xx_console_write,
1062 .device = uart_console_device,
1063 .setup = mpc52xx_console_setup,
1064 .flags = CON_PRINTBUFFER,
1065 .index = -1, /* Specified on the cmdline (e.g. console=ttyPSC0) */
1066 .data = &mpc52xx_uart_driver,
1067 };
1068
1069
1070 static int __init
1071 mpc52xx_console_init(void)
1072 {
1073 #if defined(CONFIG_PPC_MERGE)
1074 mpc52xx_uart_of_enumerate();
1075 #endif
1076 register_console(&mpc52xx_console);
1077 return 0;
1078 }
1079
1080 console_initcall(mpc52xx_console_init);
1081
1082 #define MPC52xx_PSC_CONSOLE &mpc52xx_console
1083 #else
1084 #define MPC52xx_PSC_CONSOLE NULL
1085 #endif
1086
1087
1088 /* ======================================================================== */
1089 /* UART Driver */
1090 /* ======================================================================== */
1091
1092 static struct uart_driver mpc52xx_uart_driver = {
1093 .driver_name = "mpc52xx_psc_uart",
1094 .dev_name = "ttyPSC",
1095 .major = SERIAL_PSC_MAJOR,
1096 .minor = SERIAL_PSC_MINOR,
1097 .nr = MPC52xx_PSC_MAXNUM,
1098 .cons = MPC52xx_PSC_CONSOLE,
1099 };
1100
1101
1102 #if !defined(CONFIG_PPC_MERGE)
1103 /* ======================================================================== */
1104 /* Platform Driver */
1105 /* ======================================================================== */
1106
1107 static int __devinit
1108 mpc52xx_uart_probe(struct platform_device *dev)
1109 {
1110 struct resource *res = dev->resource;
1111
1112 struct uart_port *port = NULL;
1113 int i, idx, ret;
1114
1115 /* Check validity & presence */
1116 idx = dev->id;
1117 if (idx < 0 || idx >= MPC52xx_PSC_MAXNUM)
1118 return -EINVAL;
1119
1120 if (!mpc52xx_match_psc_function(idx, "uart"))
1121 return -ENODEV;
1122
1123 /* Init the port structure */
1124 port = &mpc52xx_uart_ports[idx];
1125
1126 spin_lock_init(&port->lock);
1127 port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
1128 port->fifosize = 512;
1129 port->iotype = UPIO_MEM;
1130 port->flags = UPF_BOOT_AUTOCONF |
1131 (uart_console(port) ? 0 : UPF_IOREMAP);
1132 port->line = idx;
1133 port->ops = &mpc52xx_uart_ops;
1134 port->dev = &dev->dev;
1135
1136 /* Search for IRQ and mapbase */
1137 for (i = 0 ; i < dev->num_resources ; i++, res++) {
1138 if (res->flags & IORESOURCE_MEM)
1139 port->mapbase = res->start;
1140 else if (res->flags & IORESOURCE_IRQ)
1141 port->irq = res->start;
1142 }
1143 if (!port->irq || !port->mapbase)
1144 return -EINVAL;
1145
1146 /* Add the port to the uart sub-system */
1147 ret = uart_add_one_port(&mpc52xx_uart_driver, port);
1148 if (!ret)
1149 platform_set_drvdata(dev, (void *)port);
1150
1151 return ret;
1152 }
1153
1154 static int
1155 mpc52xx_uart_remove(struct platform_device *dev)
1156 {
1157 struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
1158
1159 platform_set_drvdata(dev, NULL);
1160
1161 if (port)
1162 uart_remove_one_port(&mpc52xx_uart_driver, port);
1163
1164 return 0;
1165 }
1166
1167 #ifdef CONFIG_PM
1168 static int
1169 mpc52xx_uart_suspend(struct platform_device *dev, pm_message_t state)
1170 {
1171 struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
1172
1173 if (port)
1174 uart_suspend_port(&mpc52xx_uart_driver, port);
1175
1176 return 0;
1177 }
1178
1179 static int
1180 mpc52xx_uart_resume(struct platform_device *dev)
1181 {
1182 struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
1183
1184 if (port)
1185 uart_resume_port(&mpc52xx_uart_driver, port);
1186
1187 return 0;
1188 }
1189 #endif
1190
1191
1192 static struct platform_driver mpc52xx_uart_platform_driver = {
1193 .probe = mpc52xx_uart_probe,
1194 .remove = mpc52xx_uart_remove,
1195 #ifdef CONFIG_PM
1196 .suspend = mpc52xx_uart_suspend,
1197 .resume = mpc52xx_uart_resume,
1198 #endif
1199 .driver = {
1200 .owner = THIS_MODULE,
1201 .name = "mpc52xx-psc",
1202 },
1203 };
1204 #endif /* !defined(CONFIG_PPC_MERGE) */
1205
1206
1207 #if defined(CONFIG_PPC_MERGE)
1208 /* ======================================================================== */
1209 /* OF Platform Driver */
1210 /* ======================================================================== */
1211
1212 static struct of_device_id mpc52xx_uart_of_match[] = {
1213 #ifdef CONFIG_PPC_MPC52xx
1214 { .compatible = "fsl,mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
1215 /* binding used by old lite5200 device trees: */
1216 { .compatible = "mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
1217 /* binding used by efika: */
1218 { .compatible = "mpc5200-serial", .data = &mpc52xx_psc_ops, },
1219 #endif
1220 #ifdef CONFIG_PPC_MPC512x
1221 { .compatible = "fsl,mpc5121-psc-uart", .data = &mpc512x_psc_ops, },
1222 {},
1223 #endif
1224 };
1225
1226 static int __devinit
1227 mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
1228 {
1229 int idx = -1;
1230 unsigned int uartclk;
1231 struct uart_port *port = NULL;
1232 struct resource res;
1233 int ret;
1234
1235 dev_dbg(&op->dev, "mpc52xx_uart_probe(op=%p, match=%p)\n", op, match);
1236
1237 /* Check validity & presence */
1238 for (idx = 0; idx < MPC52xx_PSC_MAXNUM; idx++)
1239 if (mpc52xx_uart_nodes[idx] == op->node)
1240 break;
1241 if (idx >= MPC52xx_PSC_MAXNUM)
1242 return -EINVAL;
1243 pr_debug("Found %s assigned to ttyPSC%x\n",
1244 mpc52xx_uart_nodes[idx]->full_name, idx);
1245
1246 uartclk = psc_ops->getuartclk(op->node);
1247 if (uartclk == 0) {
1248 dev_dbg(&op->dev, "Could not find uart clock frequency!\n");
1249 return -EINVAL;
1250 }
1251
1252 /* Init the port structure */
1253 port = &mpc52xx_uart_ports[idx];
1254
1255 spin_lock_init(&port->lock);
1256 port->uartclk = uartclk;
1257 port->fifosize = 512;
1258 port->iotype = UPIO_MEM;
1259 port->flags = UPF_BOOT_AUTOCONF |
1260 (uart_console(port) ? 0 : UPF_IOREMAP);
1261 port->line = idx;
1262 port->ops = &mpc52xx_uart_ops;
1263 port->dev = &op->dev;
1264
1265 /* Search for IRQ and mapbase */
1266 ret = of_address_to_resource(op->node, 0, &res);
1267 if (ret)
1268 return ret;
1269
1270 port->mapbase = res.start;
1271 port->irq = irq_of_parse_and_map(op->node, 0);
1272
1273 dev_dbg(&op->dev, "mpc52xx-psc uart at %p, irq=%x, freq=%i\n",
1274 (void *)port->mapbase, port->irq, port->uartclk);
1275
1276 if ((port->irq == NO_IRQ) || !port->mapbase) {
1277 printk(KERN_ERR "Could not allocate resources for PSC\n");
1278 return -EINVAL;
1279 }
1280
1281 /* Add the port to the uart sub-system */
1282 ret = uart_add_one_port(&mpc52xx_uart_driver, port);
1283 if (!ret)
1284 dev_set_drvdata(&op->dev, (void *)port);
1285
1286 return ret;
1287 }
1288
1289 static int
1290 mpc52xx_uart_of_remove(struct of_device *op)
1291 {
1292 struct uart_port *port = dev_get_drvdata(&op->dev);
1293 dev_set_drvdata(&op->dev, NULL);
1294
1295 if (port) {
1296 uart_remove_one_port(&mpc52xx_uart_driver, port);
1297 irq_dispose_mapping(port->irq);
1298 }
1299
1300 return 0;
1301 }
1302
1303 #ifdef CONFIG_PM
1304 static int
1305 mpc52xx_uart_of_suspend(struct of_device *op, pm_message_t state)
1306 {
1307 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1308
1309 if (port)
1310 uart_suspend_port(&mpc52xx_uart_driver, port);
1311
1312 return 0;
1313 }
1314
1315 static int
1316 mpc52xx_uart_of_resume(struct of_device *op)
1317 {
1318 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1319
1320 if (port)
1321 uart_resume_port(&mpc52xx_uart_driver, port);
1322
1323 return 0;
1324 }
1325 #endif
1326
1327 static void
1328 mpc52xx_uart_of_assign(struct device_node *np, int idx)
1329 {
1330 int free_idx = -1;
1331 int i;
1332
1333 /* Find the first free node */
1334 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1335 if (mpc52xx_uart_nodes[i] == NULL) {
1336 free_idx = i;
1337 break;
1338 }
1339 }
1340
1341 if ((idx < 0) || (idx >= MPC52xx_PSC_MAXNUM))
1342 idx = free_idx;
1343
1344 if (idx < 0)
1345 return; /* No free slot; abort */
1346
1347 of_node_get(np);
1348 /* If the slot is already occupied, then swap slots */
1349 if (mpc52xx_uart_nodes[idx] && (free_idx != -1))
1350 mpc52xx_uart_nodes[free_idx] = mpc52xx_uart_nodes[idx];
1351 mpc52xx_uart_nodes[idx] = np;
1352 }
1353
1354 static void
1355 mpc52xx_uart_of_enumerate(void)
1356 {
1357 static int enum_done;
1358 struct device_node *np;
1359 const unsigned int *devno;
1360 const struct of_device_id *match;
1361 int i;
1362
1363 if (enum_done)
1364 return;
1365
1366 for_each_node_by_type(np, "serial") {
1367 match = of_match_node(mpc52xx_uart_of_match, np);
1368 if (!match)
1369 continue;
1370
1371 psc_ops = match->data;
1372
1373 /* Is a particular device number requested? */
1374 devno = of_get_property(np, "port-number", NULL);
1375 mpc52xx_uart_of_assign(np, devno ? *devno : -1);
1376 }
1377
1378 enum_done = 1;
1379
1380 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1381 if (mpc52xx_uart_nodes[i])
1382 pr_debug("%s assigned to ttyPSC%x\n",
1383 mpc52xx_uart_nodes[i]->full_name, i);
1384 }
1385 }
1386
1387 MODULE_DEVICE_TABLE(of, mpc52xx_uart_of_match);
1388
1389 static struct of_platform_driver mpc52xx_uart_of_driver = {
1390 .match_table = mpc52xx_uart_of_match,
1391 .probe = mpc52xx_uart_of_probe,
1392 .remove = mpc52xx_uart_of_remove,
1393 #ifdef CONFIG_PM
1394 .suspend = mpc52xx_uart_of_suspend,
1395 .resume = mpc52xx_uart_of_resume,
1396 #endif
1397 .driver = {
1398 .name = "mpc52xx-psc-uart",
1399 },
1400 };
1401 #endif /* defined(CONFIG_PPC_MERGE) */
1402
1403
1404 /* ======================================================================== */
1405 /* Module */
1406 /* ======================================================================== */
1407
1408 static int __init
1409 mpc52xx_uart_init(void)
1410 {
1411 int ret;
1412
1413 printk(KERN_INFO "Serial: MPC52xx PSC UART driver\n");
1414
1415 ret = uart_register_driver(&mpc52xx_uart_driver);
1416 if (ret) {
1417 printk(KERN_ERR "%s: uart_register_driver failed (%i)\n",
1418 __FILE__, ret);
1419 return ret;
1420 }
1421
1422 #if defined(CONFIG_PPC_MERGE)
1423 mpc52xx_uart_of_enumerate();
1424
1425 ret = of_register_platform_driver(&mpc52xx_uart_of_driver);
1426 if (ret) {
1427 printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n",
1428 __FILE__, ret);
1429 uart_unregister_driver(&mpc52xx_uart_driver);
1430 return ret;
1431 }
1432 #else
1433 psc_ops = &mpc52xx_psc_ops;
1434 ret = platform_driver_register(&mpc52xx_uart_platform_driver);
1435 if (ret) {
1436 printk(KERN_ERR "%s: platform_driver_register failed (%i)\n",
1437 __FILE__, ret);
1438 uart_unregister_driver(&mpc52xx_uart_driver);
1439 return ret;
1440 }
1441 #endif
1442
1443 return 0;
1444 }
1445
1446 static void __exit
1447 mpc52xx_uart_exit(void)
1448 {
1449 #if defined(CONFIG_PPC_MERGE)
1450 of_unregister_platform_driver(&mpc52xx_uart_of_driver);
1451 #else
1452 platform_driver_unregister(&mpc52xx_uart_platform_driver);
1453 #endif
1454 uart_unregister_driver(&mpc52xx_uart_driver);
1455 }
1456
1457
1458 module_init(mpc52xx_uart_init);
1459 module_exit(mpc52xx_uart_exit);
1460
1461 MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
1462 MODULE_DESCRIPTION("Freescale MPC52xx PSC UART");
1463 MODULE_LICENSE("GPL");
WRT350N Kernel Patches