[XFS] Remove xfs_physmem
[wrt350n-kernel.git] / include / asm-mips / tx4927 / toshiba_rbtx4927.h
bloba60649569c2c1cfe9ddc4eee98d2f9d15f678578
1 /*
2 * Author: MontaVista Software, Inc.
3 * source@mvista.com
5 * Copyright 2001-2002 MontaVista Software Inc.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
15 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
17 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
18 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
19 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
20 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
21 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 * You should have received a copy of the GNU General Public License along
24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 #ifndef __ASM_TX4927_TOSHIBA_RBTX4927_H
28 #define __ASM_TX4927_TOSHIBA_RBTX4927_H
30 #include <asm/tx4927/tx4927.h>
31 #include <asm/tx4927/tx4927_mips.h>
32 #ifdef CONFIG_PCI
33 #include <asm/tx4927/tx4927_pci.h>
34 #endif
36 #define TOSHIBA_RBTX4927_WR08(a,b) do { TX4927_WR08(a,b); wbflush(); } while ( 0 )
39 #ifdef CONFIG_PCI
40 #define TBTX4927_ISA_IO_OFFSET TX4927_PCIIO
41 #else
42 #define TBTX4927_ISA_IO_OFFSET 0
43 #endif
45 #define RBTX4927_SW_RESET_DO 0xbc00f000
46 #define RBTX4927_SW_RESET_DO_SET 0x01
48 #define RBTX4927_SW_RESET_ENABLE 0xbc00f002
49 #define RBTX4927_SW_RESET_ENABLE_SET 0x01
52 #define RBTX4927_RTL_8019_BASE (0x1c020280-TBTX4927_ISA_IO_OFFSET)
53 #define RBTX4927_RTL_8019_IRQ (TX4927_IRQ_PIC_BEG + 5)
55 int toshiba_rbtx4927_irq_nested(int sw_irq);
57 #endif /* __ASM_TX4927_TOSHIBA_RBTX4927_H */