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V4L/DVB (6006): tuner: move last_div to tuner-simple private data
[wrt350n-kernel.git] / drivers / media / video / cx88 / cx88-dvb.c
blob1773b40467dc176b808cbc15e8cbc18c803f46a6
1 /*
2 *
3 * device driver for Conexant 2388x based TV cards
4 * MPEG Transport Stream (DVB) routines
5 *
6 * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
27 #include <linux/fs.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
31
32 #include "cx88.h"
33 #include "dvb-pll.h"
34 #include <media/v4l2-common.h>
35
36 #include "mt352.h"
37 #include "mt352_priv.h"
38 #include "cx88-vp3054-i2c.h"
39 #include "zl10353.h"
40 #include "cx22702.h"
41 #include "or51132.h"
42 #include "lgdt330x.h"
43 #include "nxt200x.h"
44 #include "cx24123.h"
45 #include "isl6421.h"
46
47 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
48 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
49 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
50 MODULE_LICENSE("GPL");
51
52 static unsigned int debug = 0;
53 module_param(debug, int, 0644);
54 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
55
56 #define dprintk(level,fmt, arg...) if (debug >= level) \
57 printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
58
59 /* ------------------------------------------------------------------ */
60
61 static int dvb_buf_setup(struct videobuf_queue *q,
62 unsigned int *count, unsigned int *size)
63 {
64 struct cx8802_dev *dev = q->priv_data;
65
66 dev->ts_packet_size = 188 * 4;
67 dev->ts_packet_count = 32;
68
69 *size = dev->ts_packet_size * dev->ts_packet_count;
70 *count = 32;
71 return 0;
72 }
73
74 static int dvb_buf_prepare(struct videobuf_queue *q,
75 struct videobuf_buffer *vb, enum v4l2_field field)
76 {
77 struct cx8802_dev *dev = q->priv_data;
78 return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
79 }
80
81 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
82 {
83 struct cx8802_dev *dev = q->priv_data;
84 cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
85 }
86
87 static void dvb_buf_release(struct videobuf_queue *q,
88 struct videobuf_buffer *vb)
89 {
90 cx88_free_buffer(q, (struct cx88_buffer*)vb);
91 }
92
93 static struct videobuf_queue_ops dvb_qops = {
94 .buf_setup = dvb_buf_setup,
95 .buf_prepare = dvb_buf_prepare,
96 .buf_queue = dvb_buf_queue,
97 .buf_release = dvb_buf_release,
98 };
99
100 /* ------------------------------------------------------------------ */
101
102 static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
103 {
104 struct cx8802_dev *dev= fe->dvb->priv;
105 struct cx8802_driver *drv = NULL;
106 int ret = 0;
107
108 drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
109 if (drv) {
110 if (acquire)
111 ret = drv->request_acquire(drv);
112 else
113 ret = drv->request_release(drv);
114 }
115
116 return ret;
117 }
118
119 /* ------------------------------------------------------------------ */
120
121 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
122 {
123 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
124 static u8 reset [] = { RESET, 0x80 };
125 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
126 static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
127 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
128 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
129
130 mt352_write(fe, clock_config, sizeof(clock_config));
131 udelay(200);
132 mt352_write(fe, reset, sizeof(reset));
133 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
134
135 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
136 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
137 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
138 return 0;
139 }
140
141 static int dvico_dual_demod_init(struct dvb_frontend *fe)
142 {
143 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
144 static u8 reset [] = { RESET, 0x80 };
145 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
146 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
147 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
148 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
149
150 mt352_write(fe, clock_config, sizeof(clock_config));
151 udelay(200);
152 mt352_write(fe, reset, sizeof(reset));
153 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
154
155 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
156 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
157 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
158
159 return 0;
160 }
161
162 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
163 {
164 static u8 clock_config [] = { 0x89, 0x38, 0x39 };
165 static u8 reset [] = { 0x50, 0x80 };
166 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
167 static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
168 0x00, 0xFF, 0x00, 0x40, 0x40 };
169 static u8 dntv_extra[] = { 0xB5, 0x7A };
170 static u8 capt_range_cfg[] = { 0x75, 0x32 };
171
172 mt352_write(fe, clock_config, sizeof(clock_config));
173 udelay(2000);
174 mt352_write(fe, reset, sizeof(reset));
175 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
176
177 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
178 udelay(2000);
179 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
180 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
181
182 return 0;
183 }
184
185 static struct mt352_config dvico_fusionhdtv = {
186 .demod_address = 0x0f,
187 .demod_init = dvico_fusionhdtv_demod_init,
188 };
189
190 static struct mt352_config dntv_live_dvbt_config = {
191 .demod_address = 0x0f,
192 .demod_init = dntv_live_dvbt_demod_init,
193 };
194
195 static struct mt352_config dvico_fusionhdtv_dual = {
196 .demod_address = 0x0f,
197 .demod_init = dvico_dual_demod_init,
198 };
199
200 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
201 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
202 {
203 static u8 clock_config [] = { 0x89, 0x38, 0x38 };
204 static u8 reset [] = { 0x50, 0x80 };
205 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
206 static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
207 0x00, 0xFF, 0x00, 0x40, 0x40 };
208 static u8 dntv_extra[] = { 0xB5, 0x7A };
209 static u8 capt_range_cfg[] = { 0x75, 0x32 };
210
211 mt352_write(fe, clock_config, sizeof(clock_config));
212 udelay(2000);
213 mt352_write(fe, reset, sizeof(reset));
214 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
215
216 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
217 udelay(2000);
218 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
219 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
220
221 return 0;
222 }
223
224 static struct mt352_config dntv_live_dvbt_pro_config = {
225 .demod_address = 0x0f,
226 .no_tuner = 1,
227 .demod_init = dntv_live_dvbt_pro_demod_init,
228 };
229 #endif
230
231 static struct zl10353_config dvico_fusionhdtv_hybrid = {
232 .demod_address = 0x0f,
233 .no_tuner = 1,
234 };
235
236 static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
237 .demod_address = 0x0f,
238 };
239
240 static struct cx22702_config connexant_refboard_config = {
241 .demod_address = 0x43,
242 .output_mode = CX22702_SERIAL_OUTPUT,
243 };
244
245 static struct cx22702_config hauppauge_hvr_config = {
246 .demod_address = 0x63,
247 .output_mode = CX22702_SERIAL_OUTPUT,
248 };
249
250 static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
251 {
252 struct cx8802_dev *dev= fe->dvb->priv;
253 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
254 return 0;
255 }
256
257 static struct or51132_config pchdtv_hd3000 = {
258 .demod_address = 0x15,
259 .set_ts_params = or51132_set_ts_param,
260 };
261
262 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
263 {
264 struct cx8802_dev *dev= fe->dvb->priv;
265 struct cx88_core *core = dev->core;
266
267 dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
268 if (index == 0)
269 cx_clear(MO_GP0_IO, 8);
270 else
271 cx_set(MO_GP0_IO, 8);
272 return 0;
273 }
274
275 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
276 {
277 struct cx8802_dev *dev= fe->dvb->priv;
278 if (is_punctured)
279 dev->ts_gen_cntrl |= 0x04;
280 else
281 dev->ts_gen_cntrl &= ~0x04;
282 return 0;
283 }
284
285 static struct lgdt330x_config fusionhdtv_3_gold = {
286 .demod_address = 0x0e,
287 .demod_chip = LGDT3302,
288 .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
289 .set_ts_params = lgdt330x_set_ts_param,
290 };
291
292 static struct lgdt330x_config fusionhdtv_5_gold = {
293 .demod_address = 0x0e,
294 .demod_chip = LGDT3303,
295 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
296 .set_ts_params = lgdt330x_set_ts_param,
297 };
298
299 static struct lgdt330x_config pchdtv_hd5500 = {
300 .demod_address = 0x59,
301 .demod_chip = LGDT3303,
302 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
303 .set_ts_params = lgdt330x_set_ts_param,
304 };
305
306 static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
307 {
308 struct cx8802_dev *dev= fe->dvb->priv;
309 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
310 return 0;
311 }
312
313 static struct nxt200x_config ati_hdtvwonder = {
314 .demod_address = 0x0a,
315 .set_ts_params = nxt200x_set_ts_param,
316 };
317
318 static int cx24123_set_ts_param(struct dvb_frontend* fe,
319 int is_punctured)
320 {
321 struct cx8802_dev *dev= fe->dvb->priv;
322 dev->ts_gen_cntrl = 0x02;
323 return 0;
324 }
325
326 static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
327 fe_sec_voltage_t voltage)
328 {
329 struct cx8802_dev *dev= fe->dvb->priv;
330 struct cx88_core *core = dev->core;
331
332 if (voltage == SEC_VOLTAGE_OFF)
333 cx_write(MO_GP0_IO, 0x000006fb);
334 else
335 cx_write(MO_GP0_IO, 0x000006f9);
336
337 if (core->prev_set_voltage)
338 return core->prev_set_voltage(fe, voltage);
339 return 0;
340 }
341
342 static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
343 fe_sec_voltage_t voltage)
344 {
345 struct cx8802_dev *dev= fe->dvb->priv;
346 struct cx88_core *core = dev->core;
347
348 if (voltage == SEC_VOLTAGE_OFF) {
349 dprintk(1,"LNB Voltage OFF\n");
350 cx_write(MO_GP0_IO, 0x0000efff);
351 }
352
353 if (core->prev_set_voltage)
354 return core->prev_set_voltage(fe, voltage);
355 return 0;
356 }
357
358 static struct cx24123_config geniatech_dvbs_config = {
359 .demod_address = 0x55,
360 .set_ts_params = cx24123_set_ts_param,
361 };
362
363 static struct cx24123_config hauppauge_novas_config = {
364 .demod_address = 0x55,
365 .set_ts_params = cx24123_set_ts_param,
366 };
367
368 static struct cx24123_config kworld_dvbs_100_config = {
369 .demod_address = 0x15,
370 .set_ts_params = cx24123_set_ts_param,
371 .lnb_polarity = 1,
372 };
373
374 static int dvb_register(struct cx8802_dev *dev)
375 {
376 /* init struct videobuf_dvb */
377 dev->dvb.name = dev->core->name;
378 dev->ts_gen_cntrl = 0x0c;
379
380 /* init frontend */
381 switch (dev->core->board) {
382 case CX88_BOARD_HAUPPAUGE_DVB_T1:
383 dev->dvb.frontend = dvb_attach(cx22702_attach,
384 &connexant_refboard_config,
385 &dev->core->i2c_adap);
386 if (dev->dvb.frontend != NULL) {
387 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
388 &dev->core->i2c_adap,
389 DVB_PLL_THOMSON_DTT759X);
390 }
391 break;
392 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
393 case CX88_BOARD_CONEXANT_DVB_T1:
394 case CX88_BOARD_KWORLD_DVB_T_CX22702:
395 case CX88_BOARD_WINFAST_DTV1000:
396 dev->dvb.frontend = dvb_attach(cx22702_attach,
397 &connexant_refboard_config,
398 &dev->core->i2c_adap);
399 if (dev->dvb.frontend != NULL) {
400 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
401 &dev->core->i2c_adap,
402 DVB_PLL_THOMSON_DTT7579);
403 }
404 break;
405 case CX88_BOARD_WINFAST_DTV2000H:
406 case CX88_BOARD_HAUPPAUGE_HVR1100:
407 case CX88_BOARD_HAUPPAUGE_HVR1100LP:
408 case CX88_BOARD_HAUPPAUGE_HVR1300:
409 case CX88_BOARD_HAUPPAUGE_HVR3000:
410 dev->dvb.frontend = dvb_attach(cx22702_attach,
411 &hauppauge_hvr_config,
412 &dev->core->i2c_adap);
413 if (dev->dvb.frontend != NULL) {
414 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
415 &dev->core->i2c_adap, DVB_PLL_FMD1216ME);
416 }
417 break;
418 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
419 dev->dvb.frontend = dvb_attach(mt352_attach,
420 &dvico_fusionhdtv,
421 &dev->core->i2c_adap);
422 if (dev->dvb.frontend != NULL) {
423 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
424 NULL, DVB_PLL_THOMSON_DTT7579);
425 break;
426 }
427 /* ZL10353 replaces MT352 on later cards */
428 dev->dvb.frontend = dvb_attach(zl10353_attach,
429 &dvico_fusionhdtv_plus_v1_1,
430 &dev->core->i2c_adap);
431 if (dev->dvb.frontend != NULL) {
432 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
433 NULL, DVB_PLL_THOMSON_DTT7579);
434 }
435 break;
436 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
437 /* The tin box says DEE1601, but it seems to be DTT7579
438 * compatible, with a slightly different MT352 AGC gain. */
439 dev->dvb.frontend = dvb_attach(mt352_attach,
440 &dvico_fusionhdtv_dual,
441 &dev->core->i2c_adap);
442 if (dev->dvb.frontend != NULL) {
443 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
444 NULL, DVB_PLL_THOMSON_DTT7579);
445 break;
446 }
447 /* ZL10353 replaces MT352 on later cards */
448 dev->dvb.frontend = dvb_attach(zl10353_attach,
449 &dvico_fusionhdtv_plus_v1_1,
450 &dev->core->i2c_adap);
451 if (dev->dvb.frontend != NULL) {
452 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
453 NULL, DVB_PLL_THOMSON_DTT7579);
454 }
455 break;
456 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
457 dev->dvb.frontend = dvb_attach(mt352_attach,
458 &dvico_fusionhdtv,
459 &dev->core->i2c_adap);
460 if (dev->dvb.frontend != NULL) {
461 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
462 NULL, DVB_PLL_LG_Z201);
463 }
464 break;
465 case CX88_BOARD_KWORLD_DVB_T:
466 case CX88_BOARD_DNTV_LIVE_DVB_T:
467 case CX88_BOARD_ADSTECH_DVB_T_PCI:
468 dev->dvb.frontend = dvb_attach(mt352_attach,
469 &dntv_live_dvbt_config,
470 &dev->core->i2c_adap);
471 if (dev->dvb.frontend != NULL) {
472 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
473 NULL, DVB_PLL_UNKNOWN_1);
474 }
475 break;
476 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
477 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
478 dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
479 &((struct vp3054_i2c_state *)dev->card_priv)->adap);
480 if (dev->dvb.frontend != NULL) {
481 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
482 &dev->core->i2c_adap, DVB_PLL_FMD1216ME);
483 }
484 #else
485 printk("%s: built without vp3054 support\n", dev->core->name);
486 #endif
487 break;
488 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
489 dev->dvb.frontend = dvb_attach(zl10353_attach,
490 &dvico_fusionhdtv_hybrid,
491 &dev->core->i2c_adap);
492 if (dev->dvb.frontend != NULL) {
493 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
494 &dev->core->i2c_adap,
495 DVB_PLL_THOMSON_FE6600);
496 }
497 break;
498 case CX88_BOARD_PCHDTV_HD3000:
499 dev->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
500 &dev->core->i2c_adap);
501 if (dev->dvb.frontend != NULL) {
502 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
503 &dev->core->i2c_adap,
504 DVB_PLL_THOMSON_DTT761X);
505 }
506 break;
507 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
508 dev->ts_gen_cntrl = 0x08;
509 {
510 /* Do a hardware reset of chip before using it. */
511 struct cx88_core *core = dev->core;
512
513 cx_clear(MO_GP0_IO, 1);
514 mdelay(100);
515 cx_set(MO_GP0_IO, 1);
516 mdelay(200);
517
518 /* Select RF connector callback */
519 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
520 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
521 &fusionhdtv_3_gold,
522 &dev->core->i2c_adap);
523 if (dev->dvb.frontend != NULL) {
524 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
525 &dev->core->i2c_adap,
526 DVB_PLL_MICROTUNE_4042);
527 }
528 }
529 break;
530 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
531 dev->ts_gen_cntrl = 0x08;
532 {
533 /* Do a hardware reset of chip before using it. */
534 struct cx88_core *core = dev->core;
535
536 cx_clear(MO_GP0_IO, 1);
537 mdelay(100);
538 cx_set(MO_GP0_IO, 9);
539 mdelay(200);
540 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
541 &fusionhdtv_3_gold,
542 &dev->core->i2c_adap);
543 if (dev->dvb.frontend != NULL) {
544 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
545 &dev->core->i2c_adap,
546 DVB_PLL_THOMSON_DTT761X);
547 }
548 }
549 break;
550 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
551 dev->ts_gen_cntrl = 0x08;
552 {
553 /* Do a hardware reset of chip before using it. */
554 struct cx88_core *core = dev->core;
555
556 cx_clear(MO_GP0_IO, 1);
557 mdelay(100);
558 cx_set(MO_GP0_IO, 1);
559 mdelay(200);
560 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
561 &fusionhdtv_5_gold,
562 &dev->core->i2c_adap);
563 if (dev->dvb.frontend != NULL) {
564 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
565 &dev->core->i2c_adap,
566 DVB_PLL_LG_TDVS_H06XF);
567 }
568 }
569 break;
570 case CX88_BOARD_PCHDTV_HD5500:
571 dev->ts_gen_cntrl = 0x08;
572 {
573 /* Do a hardware reset of chip before using it. */
574 struct cx88_core *core = dev->core;
575
576 cx_clear(MO_GP0_IO, 1);
577 mdelay(100);
578 cx_set(MO_GP0_IO, 1);
579 mdelay(200);
580 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
581 &pchdtv_hd5500,
582 &dev->core->i2c_adap);
583 if (dev->dvb.frontend != NULL) {
584 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
585 &dev->core->i2c_adap,
586 DVB_PLL_LG_TDVS_H06XF);
587 }
588 }
589 break;
590 case CX88_BOARD_ATI_HDTVWONDER:
591 dev->dvb.frontend = dvb_attach(nxt200x_attach,
592 &ati_hdtvwonder,
593 &dev->core->i2c_adap);
594 if (dev->dvb.frontend != NULL) {
595 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
596 NULL, DVB_PLL_TUV1236D);
597 }
598 break;
599 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
600 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
601 dev->dvb.frontend = dvb_attach(cx24123_attach,
602 &hauppauge_novas_config,
603 &dev->core->i2c_adap);
604 if (dev->dvb.frontend) {
605 dvb_attach(isl6421_attach, dev->dvb.frontend,
606 &dev->core->i2c_adap, 0x08, 0x00, 0x00);
607 }
608 break;
609 case CX88_BOARD_KWORLD_DVBS_100:
610 dev->dvb.frontend = dvb_attach(cx24123_attach,
611 &kworld_dvbs_100_config,
612 &dev->core->i2c_adap);
613 if (dev->dvb.frontend) {
614 dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
615 dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
616 }
617 break;
618 case CX88_BOARD_GENIATECH_DVBS:
619 dev->dvb.frontend = dvb_attach(cx24123_attach,
620 &geniatech_dvbs_config,
621 &dev->core->i2c_adap);
622 if (dev->dvb.frontend) {
623 dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
624 dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
625 }
626 break;
627 default:
628 printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
629 dev->core->name);
630 break;
631 }
632 if (NULL == dev->dvb.frontend) {
633 printk("%s: frontend initialization failed\n",dev->core->name);
634 return -1;
635 }
636
637 /* Ensure all frontends negotiate bus access */
638 dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
639
640 /* Put the analog decoder in standby to keep it quiet */
641 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
642
643 /* register everything */
644 return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
645 }
646
647 /* ----------------------------------------------------------- */
648
649 /* CX8802 MPEG -> mini driver - We have been given the hardware */
650 static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
651 {
652 struct cx88_core *core = drv->core;
653 int err = 0;
654 dprintk( 1, "%s\n", __FUNCTION__);
655
656 switch (core->board) {
657 case CX88_BOARD_HAUPPAUGE_HVR1300:
658 /* We arrive here with either the cx23416 or the cx22702
659 * on the bus. Take the bus from the cx23416 and enable the
660 * cx22702 demod
661 */
662 cx_set(MO_GP0_IO, 0x00000080); /* cx22702 out of reset and enable */
663 cx_clear(MO_GP0_IO, 0x00000004);
664 udelay(1000);
665 break;
666 default:
667 err = -ENODEV;
668 }
669 return err;
670 }
671
672 /* CX8802 MPEG -> mini driver - We no longer have the hardware */
673 static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
674 {
675 struct cx88_core *core = drv->core;
676 int err = 0;
677 dprintk( 1, "%s\n", __FUNCTION__);
678
679 switch (core->board) {
680 case CX88_BOARD_HAUPPAUGE_HVR1300:
681 /* Do Nothing, leave the cx22702 on the bus. */
682 break;
683 default:
684 err = -ENODEV;
685 }
686 return err;
687 }
688
689 static int cx8802_dvb_probe(struct cx8802_driver *drv)
690 {
691 struct cx88_core *core = drv->core;
692 struct cx8802_dev *dev = drv->core->dvbdev;
693 int err;
694
695 dprintk( 1, "%s\n", __FUNCTION__);
696 dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
697 core->board,
698 core->name,
699 core->pci_bus,
700 core->pci_slot);
701
702 err = -ENODEV;
703 if (!(cx88_boards[core->board].mpeg & CX88_MPEG_DVB))
704 goto fail_core;
705
706 /* If vp3054 isn't enabled, a stub will just return 0 */
707 err = vp3054_i2c_probe(dev);
708 if (0 != err)
709 goto fail_core;
710
711 /* dvb stuff */
712 printk("%s/2: cx2388x based dvb card\n", core->name);
713 videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
714 dev->pci, &dev->slock,
715 V4L2_BUF_TYPE_VIDEO_CAPTURE,
716 V4L2_FIELD_TOP,
717 sizeof(struct cx88_buffer),
718 dev);
719 err = dvb_register(dev);
720 if (err != 0)
721 printk("%s dvb_register failed err = %d\n", __FUNCTION__, err);
722
723 fail_core:
724 return err;
725 }
726
727 static int cx8802_dvb_remove(struct cx8802_driver *drv)
728 {
729 struct cx8802_dev *dev = drv->core->dvbdev;
730
731 /* dvb */
732 videobuf_dvb_unregister(&dev->dvb);
733
734 vp3054_i2c_remove(dev);
735
736 return 0;
737 }
738
739 static struct cx8802_driver cx8802_dvb_driver = {
740 .type_id = CX88_MPEG_DVB,
741 .hw_access = CX8802_DRVCTL_SHARED,
742 .probe = cx8802_dvb_probe,
743 .remove = cx8802_dvb_remove,
744 .advise_acquire = cx8802_dvb_advise_acquire,
745 .advise_release = cx8802_dvb_advise_release,
746 };
747
748 static int dvb_init(void)
749 {
750 printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
751 (CX88_VERSION_CODE >> 16) & 0xff,
752 (CX88_VERSION_CODE >> 8) & 0xff,
753 CX88_VERSION_CODE & 0xff);
754 #ifdef SNAPSHOT
755 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
756 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
757 #endif
758 return cx8802_register_driver(&cx8802_dvb_driver);
759 }
760
761 static void dvb_fini(void)
762 {
763 cx8802_unregister_driver(&cx8802_dvb_driver);
764 }
765
766 module_init(dvb_init);
767 module_exit(dvb_fini);
768
769 /*
770 * Local variables:
771 * c-basic-offset: 8
772 * compile-command: "make DVB=1"
773 * End:
774 */
WRT350N Kernel Patches