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V4L/DVB (6006): tuner: move last_div to tuner-simple private data
[wrt350n-kernel.git] / drivers / media / video / ov7670.c
blobc4c5bd67f795a12a66ef1f69cf72d869ee87f8d5
1 /*
2 * A V4L2 driver for OmniVision OV7670 cameras.
3 *
4 * Copyright 2006 One Laptop Per Child Association, Inc. Written
5 * by Jonathan Corbet with substantial inspiration from Mark
6 * McClelland's ovcamchip code.
7 *
8 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
9 *
10 * This file may be distributed under the terms of the GNU General
11 * Public License, version 2.
12 */
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/slab.h>
17 #include <linux/delay.h>
18 #include <linux/videodev.h>
19 #include <media/v4l2-common.h>
20 #include <media/v4l2-chip-ident.h>
21 #include <linux/i2c.h>
22
23
24 MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>");
25 MODULE_DESCRIPTION("A low-level driver for OmniVision ov7670 sensors");
26 MODULE_LICENSE("GPL");
27
28 /*
29 * Basic window sizes. These probably belong somewhere more globally
30 * useful.
31 */
32 #define VGA_WIDTH 640
33 #define VGA_HEIGHT 480
34 #define QVGA_WIDTH 320
35 #define QVGA_HEIGHT 240
36 #define CIF_WIDTH 352
37 #define CIF_HEIGHT 288
38 #define QCIF_WIDTH 176
39 #define QCIF_HEIGHT 144
40
41 /*
42 * Our nominal (default) frame rate.
43 */
44 #define OV7670_FRAME_RATE 30
45
46 /*
47 * The 7670 sits on i2c with ID 0x42
48 */
49 #define OV7670_I2C_ADDR 0x42
50
51 /* Registers */
52 #define REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
53 #define REG_BLUE 0x01 /* blue gain */
54 #define REG_RED 0x02 /* red gain */
55 #define REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
56 #define REG_COM1 0x04 /* Control 1 */
57 #define COM1_CCIR656 0x40 /* CCIR656 enable */
58 #define REG_BAVE 0x05 /* U/B Average level */
59 #define REG_GbAVE 0x06 /* Y/Gb Average level */
60 #define REG_AECHH 0x07 /* AEC MS 5 bits */
61 #define REG_RAVE 0x08 /* V/R Average level */
62 #define REG_COM2 0x09 /* Control 2 */
63 #define COM2_SSLEEP 0x10 /* Soft sleep mode */
64 #define REG_PID 0x0a /* Product ID MSB */
65 #define REG_VER 0x0b /* Product ID LSB */
66 #define REG_COM3 0x0c /* Control 3 */
67 #define COM3_SWAP 0x40 /* Byte swap */
68 #define COM3_SCALEEN 0x08 /* Enable scaling */
69 #define COM3_DCWEN 0x04 /* Enable downsamp/crop/window */
70 #define REG_COM4 0x0d /* Control 4 */
71 #define REG_COM5 0x0e /* All "reserved" */
72 #define REG_COM6 0x0f /* Control 6 */
73 #define REG_AECH 0x10 /* More bits of AEC value */
74 #define REG_CLKRC 0x11 /* Clocl control */
75 #define CLK_EXT 0x40 /* Use external clock directly */
76 #define CLK_SCALE 0x3f /* Mask for internal clock scale */
77 #define REG_COM7 0x12 /* Control 7 */
78 #define COM7_RESET 0x80 /* Register reset */
79 #define COM7_FMT_MASK 0x38
80 #define COM7_FMT_VGA 0x00
81 #define COM7_FMT_CIF 0x20 /* CIF format */
82 #define COM7_FMT_QVGA 0x10 /* QVGA format */
83 #define COM7_FMT_QCIF 0x08 /* QCIF format */
84 #define COM7_RGB 0x04 /* bits 0 and 2 - RGB format */
85 #define COM7_YUV 0x00 /* YUV */
86 #define COM7_BAYER 0x01 /* Bayer format */
87 #define COM7_PBAYER 0x05 /* "Processed bayer" */
88 #define REG_COM8 0x13 /* Control 8 */
89 #define COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
90 #define COM8_AECSTEP 0x40 /* Unlimited AEC step size */
91 #define COM8_BFILT 0x20 /* Band filter enable */
92 #define COM8_AGC 0x04 /* Auto gain enable */
93 #define COM8_AWB 0x02 /* White balance enable */
94 #define COM8_AEC 0x01 /* Auto exposure enable */
95 #define REG_COM9 0x14 /* Control 9 - gain ceiling */
96 #define REG_COM10 0x15 /* Control 10 */
97 #define COM10_HSYNC 0x40 /* HSYNC instead of HREF */
98 #define COM10_PCLK_HB 0x20 /* Suppress PCLK on horiz blank */
99 #define COM10_HREF_REV 0x08 /* Reverse HREF */
100 #define COM10_VS_LEAD 0x04 /* VSYNC on clock leading edge */
101 #define COM10_VS_NEG 0x02 /* VSYNC negative */
102 #define COM10_HS_NEG 0x01 /* HSYNC negative */
103 #define REG_HSTART 0x17 /* Horiz start high bits */
104 #define REG_HSTOP 0x18 /* Horiz stop high bits */
105 #define REG_VSTART 0x19 /* Vert start high bits */
106 #define REG_VSTOP 0x1a /* Vert stop high bits */
107 #define REG_PSHFT 0x1b /* Pixel delay after HREF */
108 #define REG_MIDH 0x1c /* Manuf. ID high */
109 #define REG_MIDL 0x1d /* Manuf. ID low */
110 #define REG_MVFP 0x1e /* Mirror / vflip */
111 #define MVFP_MIRROR 0x20 /* Mirror image */
112 #define MVFP_FLIP 0x10 /* Vertical flip */
113
114 #define REG_AEW 0x24 /* AGC upper limit */
115 #define REG_AEB 0x25 /* AGC lower limit */
116 #define REG_VPT 0x26 /* AGC/AEC fast mode op region */
117 #define REG_HSYST 0x30 /* HSYNC rising edge delay */
118 #define REG_HSYEN 0x31 /* HSYNC falling edge delay */
119 #define REG_HREF 0x32 /* HREF pieces */
120 #define REG_TSLB 0x3a /* lots of stuff */
121 #define TSLB_YLAST 0x04 /* UYVY or VYUY - see com13 */
122 #define REG_COM11 0x3b /* Control 11 */
123 #define COM11_NIGHT 0x80 /* NIght mode enable */
124 #define COM11_NMFR 0x60 /* Two bit NM frame rate */
125 #define COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
126 #define COM11_50HZ 0x08 /* Manual 50Hz select */
127 #define COM11_EXP 0x02
128 #define REG_COM12 0x3c /* Control 12 */
129 #define COM12_HREF 0x80 /* HREF always */
130 #define REG_COM13 0x3d /* Control 13 */
131 #define COM13_GAMMA 0x80 /* Gamma enable */
132 #define COM13_UVSAT 0x40 /* UV saturation auto adjustment */
133 #define COM13_UVSWAP 0x01 /* V before U - w/TSLB */
134 #define REG_COM14 0x3e /* Control 14 */
135 #define COM14_DCWEN 0x10 /* DCW/PCLK-scale enable */
136 #define REG_EDGE 0x3f /* Edge enhancement factor */
137 #define REG_COM15 0x40 /* Control 15 */
138 #define COM15_R10F0 0x00 /* Data range 10 to F0 */
139 #define COM15_R01FE 0x80 /* 01 to FE */
140 #define COM15_R00FF 0xc0 /* 00 to FF */
141 #define COM15_RGB565 0x10 /* RGB565 output */
142 #define COM15_RGB555 0x30 /* RGB555 output */
143 #define REG_COM16 0x41 /* Control 16 */
144 #define COM16_AWBGAIN 0x08 /* AWB gain enable */
145 #define REG_COM17 0x42 /* Control 17 */
146 #define COM17_AECWIN 0xc0 /* AEC window - must match COM4 */
147 #define COM17_CBAR 0x08 /* DSP Color bar */
148
149 /*
150 * This matrix defines how the colors are generated, must be
151 * tweaked to adjust hue and saturation.
152 *
153 * Order: v-red, v-green, v-blue, u-red, u-green, u-blue
154 *
155 * They are nine-bit signed quantities, with the sign bit
156 * stored in 0x58. Sign for v-red is bit 0, and up from there.
157 */
158 #define REG_CMATRIX_BASE 0x4f
159 #define CMATRIX_LEN 6
160 #define REG_CMATRIX_SIGN 0x58
161
162
163 #define REG_BRIGHT 0x55 /* Brightness */
164 #define REG_CONTRAS 0x56 /* Contrast control */
165
166 #define REG_GFIX 0x69 /* Fix gain control */
167
168 #define REG_REG76 0x76 /* OV's name */
169 #define R76_BLKPCOR 0x80 /* Black pixel correction enable */
170 #define R76_WHTPCOR 0x40 /* White pixel correction enable */
171
172 #define REG_RGB444 0x8c /* RGB 444 control */
173 #define R444_ENABLE 0x02 /* Turn on RGB444, overrides 5x5 */
174 #define R444_RGBX 0x01 /* Empty nibble at end */
175
176 #define REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
177 #define REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
178
179 #define REG_BD50MAX 0xa5 /* 50hz banding step limit */
180 #define REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
181 #define REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
182 #define REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
183 #define REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
184 #define REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
185 #define REG_BD60MAX 0xab /* 60hz banding step limit */
186
187
188 /*
189 * Information we maintain about a known sensor.
190 */
191 struct ov7670_format_struct; /* coming later */
192 struct ov7670_info {
193 struct ov7670_format_struct *fmt; /* Current format */
194 unsigned char sat; /* Saturation value */
195 int hue; /* Hue value */
196 };
197
198
199
200
201 /*
202 * The default register settings, as obtained from OmniVision. There
203 * is really no making sense of most of these - lots of "reserved" values
204 * and such.
205 *
206 * These settings give VGA YUYV.
207 */
208
209 struct regval_list {
210 unsigned char reg_num;
211 unsigned char value;
212 };
213
214 static struct regval_list ov7670_default_regs[] = {
215 { REG_COM7, COM7_RESET },
216 /*
217 * Clock scale: 3 = 15fps
218 * 2 = 20fps
219 * 1 = 30fps
220 */
221 { REG_CLKRC, 0x1 }, /* OV: clock scale (30 fps) */
222 { REG_TSLB, 0x04 }, /* OV */
223 { REG_COM7, 0 }, /* VGA */
224 /*
225 * Set the hardware window. These values from OV don't entirely
226 * make sense - hstop is less than hstart. But they work...
227 */
228 { REG_HSTART, 0x13 }, { REG_HSTOP, 0x01 },
229 { REG_HREF, 0xb6 }, { REG_VSTART, 0x02 },
230 { REG_VSTOP, 0x7a }, { REG_VREF, 0x0a },
231
232 { REG_COM3, 0 }, { REG_COM14, 0 },
233 /* Mystery scaling numbers */
234 { 0x70, 0x3a }, { 0x71, 0x35 },
235 { 0x72, 0x11 }, { 0x73, 0xf0 },
236 { 0xa2, 0x02 }, { REG_COM10, 0x0 },
237
238 /* Gamma curve values */
239 { 0x7a, 0x20 }, { 0x7b, 0x10 },
240 { 0x7c, 0x1e }, { 0x7d, 0x35 },
241 { 0x7e, 0x5a }, { 0x7f, 0x69 },
242 { 0x80, 0x76 }, { 0x81, 0x80 },
243 { 0x82, 0x88 }, { 0x83, 0x8f },
244 { 0x84, 0x96 }, { 0x85, 0xa3 },
245 { 0x86, 0xaf }, { 0x87, 0xc4 },
246 { 0x88, 0xd7 }, { 0x89, 0xe8 },
247
248 /* AGC and AEC parameters. Note we start by disabling those features,
249 then turn them only after tweaking the values. */
250 { REG_COM8, COM8_FASTAEC | COM8_AECSTEP | COM8_BFILT },
251 { REG_GAIN, 0 }, { REG_AECH, 0 },
252 { REG_COM4, 0x40 }, /* magic reserved bit */
253 { REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
254 { REG_BD50MAX, 0x05 }, { REG_BD60MAX, 0x07 },
255 { REG_AEW, 0x95 }, { REG_AEB, 0x33 },
256 { REG_VPT, 0xe3 }, { REG_HAECC1, 0x78 },
257 { REG_HAECC2, 0x68 }, { 0xa1, 0x03 }, /* magic */
258 { REG_HAECC3, 0xd8 }, { REG_HAECC4, 0xd8 },
259 { REG_HAECC5, 0xf0 }, { REG_HAECC6, 0x90 },
260 { REG_HAECC7, 0x94 },
261 { REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC },
262
263 /* Almost all of these are magic "reserved" values. */
264 { REG_COM5, 0x61 }, { REG_COM6, 0x4b },
265 { 0x16, 0x02 }, { REG_MVFP, 0x07 },
266 { 0x21, 0x02 }, { 0x22, 0x91 },
267 { 0x29, 0x07 }, { 0x33, 0x0b },
268 { 0x35, 0x0b }, { 0x37, 0x1d },
269 { 0x38, 0x71 }, { 0x39, 0x2a },
270 { REG_COM12, 0x78 }, { 0x4d, 0x40 },
271 { 0x4e, 0x20 }, { REG_GFIX, 0 },
272 { 0x6b, 0x4a }, { 0x74, 0x10 },
273 { 0x8d, 0x4f }, { 0x8e, 0 },
274 { 0x8f, 0 }, { 0x90, 0 },
275 { 0x91, 0 }, { 0x96, 0 },
276 { 0x9a, 0 }, { 0xb0, 0x84 },
277 { 0xb1, 0x0c }, { 0xb2, 0x0e },
278 { 0xb3, 0x82 }, { 0xb8, 0x0a },
279
280 /* More reserved magic, some of which tweaks white balance */
281 { 0x43, 0x0a }, { 0x44, 0xf0 },
282 { 0x45, 0x34 }, { 0x46, 0x58 },
283 { 0x47, 0x28 }, { 0x48, 0x3a },
284 { 0x59, 0x88 }, { 0x5a, 0x88 },
285 { 0x5b, 0x44 }, { 0x5c, 0x67 },
286 { 0x5d, 0x49 }, { 0x5e, 0x0e },
287 { 0x6c, 0x0a }, { 0x6d, 0x55 },
288 { 0x6e, 0x11 }, { 0x6f, 0x9f }, /* "9e for advance AWB" */
289 { 0x6a, 0x40 }, { REG_BLUE, 0x40 },
290 { REG_RED, 0x60 },
291 { REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC|COM8_AWB },
292
293 /* Matrix coefficients */
294 { 0x4f, 0x80 }, { 0x50, 0x80 },
295 { 0x51, 0 }, { 0x52, 0x22 },
296 { 0x53, 0x5e }, { 0x54, 0x80 },
297 { 0x58, 0x9e },
298
299 { REG_COM16, COM16_AWBGAIN }, { REG_EDGE, 0 },
300 { 0x75, 0x05 }, { 0x76, 0xe1 },
301 { 0x4c, 0 }, { 0x77, 0x01 },
302 { REG_COM13, 0xc3 }, { 0x4b, 0x09 },
303 { 0xc9, 0x60 }, { REG_COM16, 0x38 },
304 { 0x56, 0x40 },
305
306 { 0x34, 0x11 }, { REG_COM11, COM11_EXP|COM11_HZAUTO },
307 { 0xa4, 0x88 }, { 0x96, 0 },
308 { 0x97, 0x30 }, { 0x98, 0x20 },
309 { 0x99, 0x30 }, { 0x9a, 0x84 },
310 { 0x9b, 0x29 }, { 0x9c, 0x03 },
311 { 0x9d, 0x4c }, { 0x9e, 0x3f },
312 { 0x78, 0x04 },
313
314 /* Extra-weird stuff. Some sort of multiplexor register */
315 { 0x79, 0x01 }, { 0xc8, 0xf0 },
316 { 0x79, 0x0f }, { 0xc8, 0x00 },
317 { 0x79, 0x10 }, { 0xc8, 0x7e },
318 { 0x79, 0x0a }, { 0xc8, 0x80 },
319 { 0x79, 0x0b }, { 0xc8, 0x01 },
320 { 0x79, 0x0c }, { 0xc8, 0x0f },
321 { 0x79, 0x0d }, { 0xc8, 0x20 },
322 { 0x79, 0x09 }, { 0xc8, 0x80 },
323 { 0x79, 0x02 }, { 0xc8, 0xc0 },
324 { 0x79, 0x03 }, { 0xc8, 0x40 },
325 { 0x79, 0x05 }, { 0xc8, 0x30 },
326 { 0x79, 0x26 },
327
328 { 0xff, 0xff }, /* END MARKER */
329 };
330
331
332 /*
333 * Here we'll try to encapsulate the changes for just the output
334 * video format.
335 *
336 * RGB656 and YUV422 come from OV; RGB444 is homebrewed.
337 *
338 * IMPORTANT RULE: the first entry must be for COM7, see ov7670_s_fmt for why.
339 */
340
341
342 static struct regval_list ov7670_fmt_yuv422[] = {
343 { REG_COM7, 0x0 }, /* Selects YUV mode */
344 { REG_RGB444, 0 }, /* No RGB444 please */
345 { REG_COM1, 0 },
346 { REG_COM15, COM15_R00FF },
347 { REG_COM9, 0x18 }, /* 4x gain ceiling; 0x8 is reserved bit */
348 { 0x4f, 0x80 }, /* "matrix coefficient 1" */
349 { 0x50, 0x80 }, /* "matrix coefficient 2" */
350 { 0x51, 0 }, /* vb */
351 { 0x52, 0x22 }, /* "matrix coefficient 4" */
352 { 0x53, 0x5e }, /* "matrix coefficient 5" */
353 { 0x54, 0x80 }, /* "matrix coefficient 6" */
354 { REG_COM13, COM13_GAMMA|COM13_UVSAT },
355 { 0xff, 0xff },
356 };
357
358 static struct regval_list ov7670_fmt_rgb565[] = {
359 { REG_COM7, COM7_RGB }, /* Selects RGB mode */
360 { REG_RGB444, 0 }, /* No RGB444 please */
361 { REG_COM1, 0x0 },
362 { REG_COM15, COM15_RGB565 },
363 { REG_COM9, 0x38 }, /* 16x gain ceiling; 0x8 is reserved bit */
364 { 0x4f, 0xb3 }, /* "matrix coefficient 1" */
365 { 0x50, 0xb3 }, /* "matrix coefficient 2" */
366 { 0x51, 0 }, /* vb */
367 { 0x52, 0x3d }, /* "matrix coefficient 4" */
368 { 0x53, 0xa7 }, /* "matrix coefficient 5" */
369 { 0x54, 0xe4 }, /* "matrix coefficient 6" */
370 { REG_COM13, COM13_GAMMA|COM13_UVSAT },
371 { 0xff, 0xff },
372 };
373
374 static struct regval_list ov7670_fmt_rgb444[] = {
375 { REG_COM7, COM7_RGB }, /* Selects RGB mode */
376 { REG_RGB444, R444_ENABLE }, /* Enable xxxxrrrr ggggbbbb */
377 { REG_COM1, 0x40 }, /* Magic reserved bit */
378 { REG_COM15, COM15_R01FE|COM15_RGB565 }, /* Data range needed? */
379 { REG_COM9, 0x38 }, /* 16x gain ceiling; 0x8 is reserved bit */
380 { 0x4f, 0xb3 }, /* "matrix coefficient 1" */
381 { 0x50, 0xb3 }, /* "matrix coefficient 2" */
382 { 0x51, 0 }, /* vb */
383 { 0x52, 0x3d }, /* "matrix coefficient 4" */
384 { 0x53, 0xa7 }, /* "matrix coefficient 5" */
385 { 0x54, 0xe4 }, /* "matrix coefficient 6" */
386 { REG_COM13, COM13_GAMMA|COM13_UVSAT|0x2 }, /* Magic rsvd bit */
387 { 0xff, 0xff },
388 };
389
390 static struct regval_list ov7670_fmt_raw[] = {
391 { REG_COM7, COM7_BAYER },
392 { REG_COM13, 0x08 }, /* No gamma, magic rsvd bit */
393 { REG_COM16, 0x3d }, /* Edge enhancement, denoise */
394 { REG_REG76, 0xe1 }, /* Pix correction, magic rsvd */
395 { 0xff, 0xff },
396 };
397
398
399
400 /*
401 * Low-level register I/O.
402 */
403
404 static int ov7670_read(struct i2c_client *c, unsigned char reg,
405 unsigned char *value)
406 {
407 int ret;
408
409 ret = i2c_smbus_read_byte_data(c, reg);
410 if (ret >= 0)
411 *value = (unsigned char) ret;
412 return ret;
413 }
414
415
416 static int ov7670_write(struct i2c_client *c, unsigned char reg,
417 unsigned char value)
418 {
419 int ret = i2c_smbus_write_byte_data(c, reg, value);
420 if (reg == REG_COM7 && (value & COM7_RESET))
421 msleep(2); /* Wait for reset to run */
422 return ret;
423 }
424
425
426 /*
427 * Write a list of register settings; ff/ff stops the process.
428 */
429 static int ov7670_write_array(struct i2c_client *c, struct regval_list *vals)
430 {
431 while (vals->reg_num != 0xff || vals->value != 0xff) {
432 int ret = ov7670_write(c, vals->reg_num, vals->value);
433 if (ret < 0)
434 return ret;
435 vals++;
436 }
437 return 0;
438 }
439
440
441 /*
442 * Stuff that knows about the sensor.
443 */
444 static void ov7670_reset(struct i2c_client *client)
445 {
446 ov7670_write(client, REG_COM7, COM7_RESET);
447 msleep(1);
448 }
449
450
451 static int ov7670_init(struct i2c_client *client)
452 {
453 return ov7670_write_array(client, ov7670_default_regs);
454 }
455
456
457
458 static int ov7670_detect(struct i2c_client *client)
459 {
460 unsigned char v;
461 int ret;
462
463 ret = ov7670_init(client);
464 if (ret < 0)
465 return ret;
466 ret = ov7670_read(client, REG_MIDH, &v);
467 if (ret < 0)
468 return ret;
469 if (v != 0x7f) /* OV manuf. id. */
470 return -ENODEV;
471 ret = ov7670_read(client, REG_MIDL, &v);
472 if (ret < 0)
473 return ret;
474 if (v != 0xa2)
475 return -ENODEV;
476 /*
477 * OK, we know we have an OmniVision chip...but which one?
478 */
479 ret = ov7670_read(client, REG_PID, &v);
480 if (ret < 0)
481 return ret;
482 if (v != 0x76) /* PID + VER = 0x76 / 0x73 */
483 return -ENODEV;
484 ret = ov7670_read(client, REG_VER, &v);
485 if (ret < 0)
486 return ret;
487 if (v != 0x73) /* PID + VER = 0x76 / 0x73 */
488 return -ENODEV;
489 return 0;
490 }
491
492
493 /*
494 * Store information about the video data format. The color matrix
495 * is deeply tied into the format, so keep the relevant values here.
496 * The magic matrix nubmers come from OmniVision.
497 */
498 static struct ov7670_format_struct {
499 __u8 *desc;
500 __u32 pixelformat;
501 struct regval_list *regs;
502 int cmatrix[CMATRIX_LEN];
503 int bpp; /* Bytes per pixel */
504 } ov7670_formats[] = {
505 {
506 .desc = "YUYV 4:2:2",
507 .pixelformat = V4L2_PIX_FMT_YUYV,
508 .regs = ov7670_fmt_yuv422,
509 .cmatrix = { 128, -128, 0, -34, -94, 128 },
510 .bpp = 2,
511 },
512 {
513 .desc = "RGB 444",
514 .pixelformat = V4L2_PIX_FMT_RGB444,
515 .regs = ov7670_fmt_rgb444,
516 .cmatrix = { 179, -179, 0, -61, -176, 228 },
517 .bpp = 2,
518 },
519 {
520 .desc = "RGB 565",
521 .pixelformat = V4L2_PIX_FMT_RGB565,
522 .regs = ov7670_fmt_rgb565,
523 .cmatrix = { 179, -179, 0, -61, -176, 228 },
524 .bpp = 2,
525 },
526 {
527 .desc = "Raw RGB Bayer",
528 .pixelformat = V4L2_PIX_FMT_SBGGR8,
529 .regs = ov7670_fmt_raw,
530 .cmatrix = { 0, 0, 0, 0, 0, 0 },
531 .bpp = 1
532 },
533 };
534 #define N_OV7670_FMTS ARRAY_SIZE(ov7670_formats)
535
536
537 /*
538 * Then there is the issue of window sizes. Try to capture the info here.
539 */
540
541 /*
542 * QCIF mode is done (by OV) in a very strange way - it actually looks like
543 * VGA with weird scaling options - they do *not* use the canned QCIF mode
544 * which is allegedly provided by the sensor. So here's the weird register
545 * settings.
546 */
547 static struct regval_list ov7670_qcif_regs[] = {
548 { REG_COM3, COM3_SCALEEN|COM3_DCWEN },
549 { REG_COM3, COM3_DCWEN },
550 { REG_COM14, COM14_DCWEN | 0x01},
551 { 0x73, 0xf1 },
552 { 0xa2, 0x52 },
553 { 0x7b, 0x1c },
554 { 0x7c, 0x28 },
555 { 0x7d, 0x3c },
556 { 0x7f, 0x69 },
557 { REG_COM9, 0x38 },
558 { 0xa1, 0x0b },
559 { 0x74, 0x19 },
560 { 0x9a, 0x80 },
561 { 0x43, 0x14 },
562 { REG_COM13, 0xc0 },
563 { 0xff, 0xff },
564 };
565
566 static struct ov7670_win_size {
567 int width;
568 int height;
569 unsigned char com7_bit;
570 int hstart; /* Start/stop values for the camera. Note */
571 int hstop; /* that they do not always make complete */
572 int vstart; /* sense to humans, but evidently the sensor */
573 int vstop; /* will do the right thing... */
574 struct regval_list *regs; /* Regs to tweak */
575 /* h/vref stuff */
576 } ov7670_win_sizes[] = {
577 /* VGA */
578 {
579 .width = VGA_WIDTH,
580 .height = VGA_HEIGHT,
581 .com7_bit = COM7_FMT_VGA,
582 .hstart = 158, /* These values from */
583 .hstop = 14, /* Omnivision */
584 .vstart = 10,
585 .vstop = 490,
586 .regs = NULL,
587 },
588 /* CIF */
589 {
590 .width = CIF_WIDTH,
591 .height = CIF_HEIGHT,
592 .com7_bit = COM7_FMT_CIF,
593 .hstart = 170, /* Empirically determined */
594 .hstop = 90,
595 .vstart = 14,
596 .vstop = 494,
597 .regs = NULL,
598 },
599 /* QVGA */
600 {
601 .width = QVGA_WIDTH,
602 .height = QVGA_HEIGHT,
603 .com7_bit = COM7_FMT_QVGA,
604 .hstart = 164, /* Empirically determined */
605 .hstop = 20,
606 .vstart = 14,
607 .vstop = 494,
608 .regs = NULL,
609 },
610 /* QCIF */
611 {
612 .width = QCIF_WIDTH,
613 .height = QCIF_HEIGHT,
614 .com7_bit = COM7_FMT_VGA, /* see comment above */
615 .hstart = 456, /* Empirically determined */
616 .hstop = 24,
617 .vstart = 14,
618 .vstop = 494,
619 .regs = ov7670_qcif_regs,
620 },
621 };
622
623 #define N_WIN_SIZES (ARRAY_SIZE(ov7670_win_sizes))
624
625
626 /*
627 * Store a set of start/stop values into the camera.
628 */
629 static int ov7670_set_hw(struct i2c_client *client, int hstart, int hstop,
630 int vstart, int vstop)
631 {
632 int ret;
633 unsigned char v;
634 /*
635 * Horizontal: 11 bits, top 8 live in hstart and hstop. Bottom 3 of
636 * hstart are in href[2:0], bottom 3 of hstop in href[5:3]. There is
637 * a mystery "edge offset" value in the top two bits of href.
638 */
639 ret = ov7670_write(client, REG_HSTART, (hstart >> 3) & 0xff);
640 ret += ov7670_write(client, REG_HSTOP, (hstop >> 3) & 0xff);
641 ret += ov7670_read(client, REG_HREF, &v);
642 v = (v & 0xc0) | ((hstop & 0x7) << 3) | (hstart & 0x7);
643 msleep(10);
644 ret += ov7670_write(client, REG_HREF, v);
645 /*
646 * Vertical: similar arrangement, but only 10 bits.
647 */
648 ret += ov7670_write(client, REG_VSTART, (vstart >> 2) & 0xff);
649 ret += ov7670_write(client, REG_VSTOP, (vstop >> 2) & 0xff);
650 ret += ov7670_read(client, REG_VREF, &v);
651 v = (v & 0xf0) | ((vstop & 0x3) << 2) | (vstart & 0x3);
652 msleep(10);
653 ret += ov7670_write(client, REG_VREF, v);
654 return ret;
655 }
656
657
658 static int ov7670_enum_fmt(struct i2c_client *c, struct v4l2_fmtdesc *fmt)
659 {
660 struct ov7670_format_struct *ofmt;
661
662 if (fmt->index >= N_OV7670_FMTS)
663 return -EINVAL;
664
665 ofmt = ov7670_formats + fmt->index;
666 fmt->flags = 0;
667 strcpy(fmt->description, ofmt->desc);
668 fmt->pixelformat = ofmt->pixelformat;
669 return 0;
670 }
671
672
673 static int ov7670_try_fmt(struct i2c_client *c, struct v4l2_format *fmt,
674 struct ov7670_format_struct **ret_fmt,
675 struct ov7670_win_size **ret_wsize)
676 {
677 int index;
678 struct ov7670_win_size *wsize;
679 struct v4l2_pix_format *pix = &fmt->fmt.pix;
680
681 for (index = 0; index < N_OV7670_FMTS; index++)
682 if (ov7670_formats[index].pixelformat == pix->pixelformat)
683 break;
684 if (index >= N_OV7670_FMTS)
685 return -EINVAL;
686 if (ret_fmt != NULL)
687 *ret_fmt = ov7670_formats + index;
688 /*
689 * Fields: the OV devices claim to be progressive.
690 */
691 if (pix->field == V4L2_FIELD_ANY)
692 pix->field = V4L2_FIELD_NONE;
693 else if (pix->field != V4L2_FIELD_NONE)
694 return -EINVAL;
695 /*
696 * Round requested image size down to the nearest
697 * we support, but not below the smallest.
698 */
699 for (wsize = ov7670_win_sizes; wsize < ov7670_win_sizes + N_WIN_SIZES;
700 wsize++)
701 if (pix->width >= wsize->width && pix->height >= wsize->height)
702 break;
703 if (wsize >= ov7670_win_sizes + N_WIN_SIZES)
704 wsize--; /* Take the smallest one */
705 if (ret_wsize != NULL)
706 *ret_wsize = wsize;
707 /*
708 * Note the size we'll actually handle.
709 */
710 pix->width = wsize->width;
711 pix->height = wsize->height;
712 pix->bytesperline = pix->width*ov7670_formats[index].bpp;
713 pix->sizeimage = pix->height*pix->bytesperline;
714 return 0;
715 }
716
717 /*
718 * Set a format.
719 */
720 static int ov7670_s_fmt(struct i2c_client *c, struct v4l2_format *fmt)
721 {
722 int ret;
723 struct ov7670_format_struct *ovfmt;
724 struct ov7670_win_size *wsize;
725 struct ov7670_info *info = i2c_get_clientdata(c);
726 unsigned char com7, clkrc;
727
728 ret = ov7670_try_fmt(c, fmt, &ovfmt, &wsize);
729 if (ret)
730 return ret;
731 /*
732 * HACK: if we're running rgb565 we need to grab then rewrite
733 * CLKRC. If we're *not*, however, then rewriting clkrc hoses
734 * the colors.
735 */
736 if (fmt->fmt.pix.pixelformat == V4L2_PIX_FMT_RGB565) {
737 ret = ov7670_read(c, REG_CLKRC, &clkrc);
738 if (ret)
739 return ret;
740 }
741 /*
742 * COM7 is a pain in the ass, it doesn't like to be read then
743 * quickly written afterward. But we have everything we need
744 * to set it absolutely here, as long as the format-specific
745 * register sets list it first.
746 */
747 com7 = ovfmt->regs[0].value;
748 com7 |= wsize->com7_bit;
749 ov7670_write(c, REG_COM7, com7);
750 /*
751 * Now write the rest of the array. Also store start/stops
752 */
753 ov7670_write_array(c, ovfmt->regs + 1);
754 ov7670_set_hw(c, wsize->hstart, wsize->hstop, wsize->vstart,
755 wsize->vstop);
756 ret = 0;
757 if (wsize->regs)
758 ret = ov7670_write_array(c, wsize->regs);
759 info->fmt = ovfmt;
760
761 if (fmt->fmt.pix.pixelformat == V4L2_PIX_FMT_RGB565 && ret == 0)
762 ret = ov7670_write(c, REG_CLKRC, clkrc);
763 return ret;
764 }
765
766 /*
767 * Implement G/S_PARM. There is a "high quality" mode we could try
768 * to do someday; for now, we just do the frame rate tweak.
769 */
770 static int ov7670_g_parm(struct i2c_client *c, struct v4l2_streamparm *parms)
771 {
772 struct v4l2_captureparm *cp = &parms->parm.capture;
773 unsigned char clkrc;
774 int ret;
775
776 if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
777 return -EINVAL;
778 ret = ov7670_read(c, REG_CLKRC, &clkrc);
779 if (ret < 0)
780 return ret;
781 memset(cp, 0, sizeof(struct v4l2_captureparm));
782 cp->capability = V4L2_CAP_TIMEPERFRAME;
783 cp->timeperframe.numerator = 1;
784 cp->timeperframe.denominator = OV7670_FRAME_RATE;
785 if ((clkrc & CLK_EXT) == 0 && (clkrc & CLK_SCALE) > 1)
786 cp->timeperframe.denominator /= (clkrc & CLK_SCALE);
787 return 0;
788 }
789
790 static int ov7670_s_parm(struct i2c_client *c, struct v4l2_streamparm *parms)
791 {
792 struct v4l2_captureparm *cp = &parms->parm.capture;
793 struct v4l2_fract *tpf = &cp->timeperframe;
794 unsigned char clkrc;
795 int ret, div;
796
797 if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
798 return -EINVAL;
799 if (cp->extendedmode != 0)
800 return -EINVAL;
801 /*
802 * CLKRC has a reserved bit, so let's preserve it.
803 */
804 ret = ov7670_read(c, REG_CLKRC, &clkrc);
805 if (ret < 0)
806 return ret;
807 if (tpf->numerator == 0 || tpf->denominator == 0)
808 div = 1; /* Reset to full rate */
809 else
810 div = (tpf->numerator*OV7670_FRAME_RATE)/tpf->denominator;
811 if (div == 0)
812 div = 1;
813 else if (div > CLK_SCALE)
814 div = CLK_SCALE;
815 clkrc = (clkrc & 0x80) | div;
816 tpf->numerator = 1;
817 tpf->denominator = OV7670_FRAME_RATE/div;
818 return ov7670_write(c, REG_CLKRC, clkrc);
819 }
820
821
822
823 /*
824 * Code for dealing with controls.
825 */
826
827
828
829
830
831 static int ov7670_store_cmatrix(struct i2c_client *client,
832 int matrix[CMATRIX_LEN])
833 {
834 int i, ret;
835 unsigned char signbits;
836
837 /*
838 * Weird crap seems to exist in the upper part of
839 * the sign bits register, so let's preserve it.
840 */
841 ret = ov7670_read(client, REG_CMATRIX_SIGN, &signbits);
842 signbits &= 0xc0;
843
844 for (i = 0; i < CMATRIX_LEN; i++) {
845 unsigned char raw;
846
847 if (matrix[i] < 0) {
848 signbits |= (1 << i);
849 if (matrix[i] < -255)
850 raw = 0xff;
851 else
852 raw = (-1 * matrix[i]) & 0xff;
853 }
854 else {
855 if (matrix[i] > 255)
856 raw = 0xff;
857 else
858 raw = matrix[i] & 0xff;
859 }
860 ret += ov7670_write(client, REG_CMATRIX_BASE + i, raw);
861 }
862 ret += ov7670_write(client, REG_CMATRIX_SIGN, signbits);
863 return ret;
864 }
865
866
867 /*
868 * Hue also requires messing with the color matrix. It also requires
869 * trig functions, which tend not to be well supported in the kernel.
870 * So here is a simple table of sine values, 0-90 degrees, in steps
871 * of five degrees. Values are multiplied by 1000.
872 *
873 * The following naive approximate trig functions require an argument
874 * carefully limited to -180 <= theta <= 180.
875 */
876 #define SIN_STEP 5
877 static const int ov7670_sin_table[] = {
878 0, 87, 173, 258, 342, 422,
879 499, 573, 642, 707, 766, 819,
880 866, 906, 939, 965, 984, 996,
881 1000
882 };
883
884 static int ov7670_sine(int theta)
885 {
886 int chs = 1;
887 int sine;
888
889 if (theta < 0) {
890 theta = -theta;
891 chs = -1;
892 }
893 if (theta <= 90)
894 sine = ov7670_sin_table[theta/SIN_STEP];
895 else {
896 theta -= 90;
897 sine = 1000 - ov7670_sin_table[theta/SIN_STEP];
898 }
899 return sine*chs;
900 }
901
902 static int ov7670_cosine(int theta)
903 {
904 theta = 90 - theta;
905 if (theta > 180)
906 theta -= 360;
907 else if (theta < -180)
908 theta += 360;
909 return ov7670_sine(theta);
910 }
911
912
913
914
915 static void ov7670_calc_cmatrix(struct ov7670_info *info,
916 int matrix[CMATRIX_LEN])
917 {
918 int i;
919 /*
920 * Apply the current saturation setting first.
921 */
922 for (i = 0; i < CMATRIX_LEN; i++)
923 matrix[i] = (info->fmt->cmatrix[i]*info->sat) >> 7;
924 /*
925 * Then, if need be, rotate the hue value.
926 */
927 if (info->hue != 0) {
928 int sinth, costh, tmpmatrix[CMATRIX_LEN];
929
930 memcpy(tmpmatrix, matrix, CMATRIX_LEN*sizeof(int));
931 sinth = ov7670_sine(info->hue);
932 costh = ov7670_cosine(info->hue);
933
934 matrix[0] = (matrix[3]*sinth + matrix[0]*costh)/1000;
935 matrix[1] = (matrix[4]*sinth + matrix[1]*costh)/1000;
936 matrix[2] = (matrix[5]*sinth + matrix[2]*costh)/1000;
937 matrix[3] = (matrix[3]*costh - matrix[0]*sinth)/1000;
938 matrix[4] = (matrix[4]*costh - matrix[1]*sinth)/1000;
939 matrix[5] = (matrix[5]*costh - matrix[2]*sinth)/1000;
940 }
941 }
942
943
944
945 static int ov7670_t_sat(struct i2c_client *client, int value)
946 {
947 struct ov7670_info *info = i2c_get_clientdata(client);
948 int matrix[CMATRIX_LEN];
949 int ret;
950
951 info->sat = value;
952 ov7670_calc_cmatrix(info, matrix);
953 ret = ov7670_store_cmatrix(client, matrix);
954 return ret;
955 }
956
957 static int ov7670_q_sat(struct i2c_client *client, __s32 *value)
958 {
959 struct ov7670_info *info = i2c_get_clientdata(client);
960
961 *value = info->sat;
962 return 0;
963 }
964
965 static int ov7670_t_hue(struct i2c_client *client, int value)
966 {
967 struct ov7670_info *info = i2c_get_clientdata(client);
968 int matrix[CMATRIX_LEN];
969 int ret;
970
971 if (value < -180 || value > 180)
972 return -EINVAL;
973 info->hue = value;
974 ov7670_calc_cmatrix(info, matrix);
975 ret = ov7670_store_cmatrix(client, matrix);
976 return ret;
977 }
978
979
980 static int ov7670_q_hue(struct i2c_client *client, __s32 *value)
981 {
982 struct ov7670_info *info = i2c_get_clientdata(client);
983
984 *value = info->hue;
985 return 0;
986 }
987
988
989 /*
990 * Some weird registers seem to store values in a sign/magnitude format!
991 */
992 static unsigned char ov7670_sm_to_abs(unsigned char v)
993 {
994 if ((v & 0x80) == 0)
995 return v + 128;
996 else
997 return 128 - (v & 0x7f);
998 }
999
1000
1001 static unsigned char ov7670_abs_to_sm(unsigned char v)
1002 {
1003 if (v > 127)
1004 return v & 0x7f;
1005 else
1006 return (128 - v) | 0x80;
1007 }
1008
1009 static int ov7670_t_brightness(struct i2c_client *client, int value)
1010 {
1011 unsigned char com8, v;
1012 int ret;
1013
1014 ov7670_read(client, REG_COM8, &com8);
1015 com8 &= ~COM8_AEC;
1016 ov7670_write(client, REG_COM8, com8);
1017 v = ov7670_abs_to_sm(value);
1018 ret = ov7670_write(client, REG_BRIGHT, v);
1019 return ret;
1020 }
1021
1022 static int ov7670_q_brightness(struct i2c_client *client, __s32 *value)
1023 {
1024 unsigned char v;
1025 int ret = ov7670_read(client, REG_BRIGHT, &v);
1026
1027 *value = ov7670_sm_to_abs(v);
1028 return ret;
1029 }
1030
1031 static int ov7670_t_contrast(struct i2c_client *client, int value)
1032 {
1033 return ov7670_write(client, REG_CONTRAS, (unsigned char) value);
1034 }
1035
1036 static int ov7670_q_contrast(struct i2c_client *client, __s32 *value)
1037 {
1038 unsigned char v;
1039 int ret = ov7670_read(client, REG_CONTRAS, &v);
1040
1041 *value = v;
1042 return ret;
1043 }
1044
1045 static int ov7670_q_hflip(struct i2c_client *client, __s32 *value)
1046 {
1047 int ret;
1048 unsigned char v;
1049
1050 ret = ov7670_read(client, REG_MVFP, &v);
1051 *value = (v & MVFP_MIRROR) == MVFP_MIRROR;
1052 return ret;
1053 }
1054
1055
1056 static int ov7670_t_hflip(struct i2c_client *client, int value)
1057 {
1058 unsigned char v;
1059 int ret;
1060
1061 ret = ov7670_read(client, REG_MVFP, &v);
1062 if (value)
1063 v |= MVFP_MIRROR;
1064 else
1065 v &= ~MVFP_MIRROR;
1066 msleep(10); /* FIXME */
1067 ret += ov7670_write(client, REG_MVFP, v);
1068 return ret;
1069 }
1070
1071
1072
1073 static int ov7670_q_vflip(struct i2c_client *client, __s32 *value)
1074 {
1075 int ret;
1076 unsigned char v;
1077
1078 ret = ov7670_read(client, REG_MVFP, &v);
1079 *value = (v & MVFP_FLIP) == MVFP_FLIP;
1080 return ret;
1081 }
1082
1083
1084 static int ov7670_t_vflip(struct i2c_client *client, int value)
1085 {
1086 unsigned char v;
1087 int ret;
1088
1089 ret = ov7670_read(client, REG_MVFP, &v);
1090 if (value)
1091 v |= MVFP_FLIP;
1092 else
1093 v &= ~MVFP_FLIP;
1094 msleep(10); /* FIXME */
1095 ret += ov7670_write(client, REG_MVFP, v);
1096 return ret;
1097 }
1098
1099
1100 static struct ov7670_control {
1101 struct v4l2_queryctrl qc;
1102 int (*query)(struct i2c_client *c, __s32 *value);
1103 int (*tweak)(struct i2c_client *c, int value);
1104 } ov7670_controls[] =
1105 {
1106 {
1107 .qc = {
1108 .id = V4L2_CID_BRIGHTNESS,
1109 .type = V4L2_CTRL_TYPE_INTEGER,
1110 .name = "Brightness",
1111 .minimum = 0,
1112 .maximum = 255,
1113 .step = 1,
1114 .default_value = 0x80,
1115 .flags = V4L2_CTRL_FLAG_SLIDER
1116 },
1117 .tweak = ov7670_t_brightness,
1118 .query = ov7670_q_brightness,
1119 },
1120 {
1121 .qc = {
1122 .id = V4L2_CID_CONTRAST,
1123 .type = V4L2_CTRL_TYPE_INTEGER,
1124 .name = "Contrast",
1125 .minimum = 0,
1126 .maximum = 127,
1127 .step = 1,
1128 .default_value = 0x40, /* XXX ov7670 spec */
1129 .flags = V4L2_CTRL_FLAG_SLIDER
1130 },
1131 .tweak = ov7670_t_contrast,
1132 .query = ov7670_q_contrast,
1133 },
1134 {
1135 .qc = {
1136 .id = V4L2_CID_SATURATION,
1137 .type = V4L2_CTRL_TYPE_INTEGER,
1138 .name = "Saturation",
1139 .minimum = 0,
1140 .maximum = 256,
1141 .step = 1,
1142 .default_value = 0x80,
1143 .flags = V4L2_CTRL_FLAG_SLIDER
1144 },
1145 .tweak = ov7670_t_sat,
1146 .query = ov7670_q_sat,
1147 },
1148 {
1149 .qc = {
1150 .id = V4L2_CID_HUE,
1151 .type = V4L2_CTRL_TYPE_INTEGER,
1152 .name = "HUE",
1153 .minimum = -180,
1154 .maximum = 180,
1155 .step = 5,
1156 .default_value = 0,
1157 .flags = V4L2_CTRL_FLAG_SLIDER
1158 },
1159 .tweak = ov7670_t_hue,
1160 .query = ov7670_q_hue,
1161 },
1162 {
1163 .qc = {
1164 .id = V4L2_CID_VFLIP,
1165 .type = V4L2_CTRL_TYPE_BOOLEAN,
1166 .name = "Vertical flip",
1167 .minimum = 0,
1168 .maximum = 1,
1169 .step = 1,
1170 .default_value = 0,
1171 },
1172 .tweak = ov7670_t_vflip,
1173 .query = ov7670_q_vflip,
1174 },
1175 {
1176 .qc = {
1177 .id = V4L2_CID_HFLIP,
1178 .type = V4L2_CTRL_TYPE_BOOLEAN,
1179 .name = "Horizontal mirror",
1180 .minimum = 0,
1181 .maximum = 1,
1182 .step = 1,
1183 .default_value = 0,
1184 },
1185 .tweak = ov7670_t_hflip,
1186 .query = ov7670_q_hflip,
1187 },
1188 };
1189 #define N_CONTROLS (ARRAY_SIZE(ov7670_controls))
1190
1191 static struct ov7670_control *ov7670_find_control(__u32 id)
1192 {
1193 int i;
1194
1195 for (i = 0; i < N_CONTROLS; i++)
1196 if (ov7670_controls[i].qc.id == id)
1197 return ov7670_controls + i;
1198 return NULL;
1199 }
1200
1201
1202 static int ov7670_queryctrl(struct i2c_client *client,
1203 struct v4l2_queryctrl *qc)
1204 {
1205 struct ov7670_control *ctrl = ov7670_find_control(qc->id);
1206
1207 if (ctrl == NULL)
1208 return -EINVAL;
1209 *qc = ctrl->qc;
1210 return 0;
1211 }
1212
1213 static int ov7670_g_ctrl(struct i2c_client *client, struct v4l2_control *ctrl)
1214 {
1215 struct ov7670_control *octrl = ov7670_find_control(ctrl->id);
1216 int ret;
1217
1218 if (octrl == NULL)
1219 return -EINVAL;
1220 ret = octrl->query(client, &ctrl->value);
1221 if (ret >= 0)
1222 return 0;
1223 return ret;
1224 }
1225
1226 static int ov7670_s_ctrl(struct i2c_client *client, struct v4l2_control *ctrl)
1227 {
1228 struct ov7670_control *octrl = ov7670_find_control(ctrl->id);
1229 int ret;
1230
1231 if (octrl == NULL)
1232 return -EINVAL;
1233 ret = octrl->tweak(client, ctrl->value);
1234 if (ret >= 0)
1235 return 0;
1236 return ret;
1237 }
1238
1239
1240
1241
1242
1243
1244 /*
1245 * Basic i2c stuff.
1246 */
1247 static struct i2c_driver ov7670_driver;
1248
1249 static int ov7670_attach(struct i2c_adapter *adapter)
1250 {
1251 int ret;
1252 struct i2c_client *client;
1253 struct ov7670_info *info;
1254
1255 /*
1256 * For now: only deal with adapters we recognize.
1257 */
1258 if (adapter->id != I2C_HW_SMBUS_CAFE)
1259 return -ENODEV;
1260
1261 client = kzalloc(sizeof (struct i2c_client), GFP_KERNEL);
1262 if (! client)
1263 return -ENOMEM;
1264 client->adapter = adapter;
1265 client->addr = OV7670_I2C_ADDR;
1266 client->driver = &ov7670_driver,
1267 strcpy(client->name, "OV7670");
1268 /*
1269 * Set up our info structure.
1270 */
1271 info = kzalloc(sizeof (struct ov7670_info), GFP_KERNEL);
1272 if (! info) {
1273 ret = -ENOMEM;
1274 goto out_free;
1275 }
1276 info->fmt = &ov7670_formats[0];
1277 info->sat = 128; /* Review this */
1278 i2c_set_clientdata(client, info);
1279
1280 /*
1281 * Make sure it's an ov7670
1282 */
1283 ret = ov7670_detect(client);
1284 if (ret)
1285 goto out_free_info;
1286 ret = i2c_attach_client(client);
1287 if (ret)
1288 goto out_free_info;
1289 return 0;
1290
1291 out_free_info:
1292 kfree(info);
1293 out_free:
1294 kfree(client);
1295 return ret;
1296 }
1297
1298
1299 static int ov7670_detach(struct i2c_client *client)
1300 {
1301 i2c_detach_client(client);
1302 kfree(i2c_get_clientdata(client));
1303 kfree(client);
1304 return 0;
1305 }
1306
1307
1308 static int ov7670_command(struct i2c_client *client, unsigned int cmd,
1309 void *arg)
1310 {
1311 switch (cmd) {
1312 case VIDIOC_G_CHIP_IDENT:
1313 return v4l2_chip_ident_i2c_client(client, arg, V4L2_IDENT_OV7670, 0);
1314
1315 case VIDIOC_INT_RESET:
1316 ov7670_reset(client);
1317 return 0;
1318
1319 case VIDIOC_INT_INIT:
1320 return ov7670_init(client);
1321
1322 case VIDIOC_ENUM_FMT:
1323 return ov7670_enum_fmt(client, (struct v4l2_fmtdesc *) arg);
1324 case VIDIOC_TRY_FMT:
1325 return ov7670_try_fmt(client, (struct v4l2_format *) arg, NULL, NULL);
1326 case VIDIOC_S_FMT:
1327 return ov7670_s_fmt(client, (struct v4l2_format *) arg);
1328 case VIDIOC_QUERYCTRL:
1329 return ov7670_queryctrl(client, (struct v4l2_queryctrl *) arg);
1330 case VIDIOC_S_CTRL:
1331 return ov7670_s_ctrl(client, (struct v4l2_control *) arg);
1332 case VIDIOC_G_CTRL:
1333 return ov7670_g_ctrl(client, (struct v4l2_control *) arg);
1334 case VIDIOC_S_PARM:
1335 return ov7670_s_parm(client, (struct v4l2_streamparm *) arg);
1336 case VIDIOC_G_PARM:
1337 return ov7670_g_parm(client, (struct v4l2_streamparm *) arg);
1338 }
1339 return -EINVAL;
1340 }
1341
1342
1343
1344 static struct i2c_driver ov7670_driver = {
1345 .driver = {
1346 .name = "ov7670",
1347 },
1348 .id = I2C_DRIVERID_OV7670,
1349 .class = I2C_CLASS_CAM_DIGITAL,
1350 .attach_adapter = ov7670_attach,
1351 .detach_client = ov7670_detach,
1352 .command = ov7670_command,
1353 };
1354
1355
1356 /*
1357 * Module initialization
1358 */
1359 static int __init ov7670_mod_init(void)
1360 {
1361 printk(KERN_NOTICE "OmniVision ov7670 sensor driver, at your service\n");
1362 return i2c_add_driver(&ov7670_driver);
1363 }
1364
1365 static void __exit ov7670_mod_exit(void)
1366 {
1367 i2c_del_driver(&ov7670_driver);
1368 }
1369
1370 module_init(ov7670_mod_init);
1371 module_exit(ov7670_mod_exit);
WRT350N Kernel Patches