?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[wrt350n-kernel.git] / drivers / net / ixgbe / ixgbe_main.c
blob9d99cfce6ec6be1c8091a01b136a7e7378a81c2e
1 /*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2007 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/vmalloc.h>
34 #include <linux/string.h>
35 #include <linux/in.h>
36 #include <linux/ip.h>
37 #include <linux/tcp.h>
38 #include <linux/ipv6.h>
39 #include <net/checksum.h>
40 #include <net/ip6_checksum.h>
41 #include <linux/ethtool.h>
42 #include <linux/if_vlan.h>
43
44 #include "ixgbe.h"
45 #include "ixgbe_common.h"
46
47 char ixgbe_driver_name[] = "ixgbe";
48 static const char ixgbe_driver_string[] =
49 "Intel(R) 10 Gigabit PCI Express Network Driver";
50
51 #define DRV_VERSION "1.1.18"
52 const char ixgbe_driver_version[] = DRV_VERSION;
53 static const char ixgbe_copyright[] =
54 "Copyright (c) 1999-2007 Intel Corporation.";
55
56 static const struct ixgbe_info *ixgbe_info_tbl[] = {
57 [board_82598] = &ixgbe_82598_info,
58 };
59
60 /* ixgbe_pci_tbl - PCI Device ID Table
61 *
62 * Wildcard entries (PCI_ANY_ID) should come last
63 * Last entry must be all 0s
64 *
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
67 */
68 static struct pci_device_id ixgbe_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
70 board_82598 },
71 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
72 board_82598 },
73 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT_DUAL_PORT),
74 board_82598 },
75 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
76 board_82598 },
77
78 /* required last entry */
79 {0, }
80 };
81 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
82
83 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
84 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
85 MODULE_LICENSE("GPL");
86 MODULE_VERSION(DRV_VERSION);
87
88 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
89
90 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
91 {
92 u32 ctrl_ext;
93
94 /* Let firmware take over control of h/w */
95 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
96 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
97 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
98 }
99
100 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
101 {
102 u32 ctrl_ext;
103
104 /* Let firmware know the driver has taken over */
105 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
106 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
107 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
108 }
109
110 #ifdef DEBUG
111 /**
112 * ixgbe_get_hw_dev_name - return device name string
113 * used by hardware layer to print debugging information
114 **/
115 char *ixgbe_get_hw_dev_name(struct ixgbe_hw *hw)
116 {
117 struct ixgbe_adapter *adapter = hw->back;
118 struct net_device *netdev = adapter->netdev;
119 return netdev->name;
120 }
121 #endif
122
123 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
124 u8 msix_vector)
125 {
126 u32 ivar, index;
127
128 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
129 index = (int_alloc_entry >> 2) & 0x1F;
130 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR(index));
131 ivar &= ~(0xFF << (8 * (int_alloc_entry & 0x3)));
132 ivar |= (msix_vector << (8 * (int_alloc_entry & 0x3)));
133 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
134 }
135
136 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
137 struct ixgbe_tx_buffer
138 *tx_buffer_info)
139 {
140 if (tx_buffer_info->dma) {
141 pci_unmap_page(adapter->pdev,
142 tx_buffer_info->dma,
143 tx_buffer_info->length, PCI_DMA_TODEVICE);
144 tx_buffer_info->dma = 0;
145 }
146 if (tx_buffer_info->skb) {
147 dev_kfree_skb_any(tx_buffer_info->skb);
148 tx_buffer_info->skb = NULL;
149 }
150 /* tx_buffer_info must be completely set up in the transmit path */
151 }
152
153 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
154 struct ixgbe_ring *tx_ring,
155 unsigned int eop,
156 union ixgbe_adv_tx_desc *eop_desc)
157 {
158 /* Detect a transmit hang in hardware, this serializes the
159 * check with the clearing of time_stamp and movement of i */
160 adapter->detect_tx_hung = false;
161 if (tx_ring->tx_buffer_info[eop].dma &&
162 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
163 !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
164 /* detected Tx unit hang */
165 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
166 " TDH <%x>\n"
167 " TDT <%x>\n"
168 " next_to_use <%x>\n"
169 " next_to_clean <%x>\n"
170 "tx_buffer_info[next_to_clean]\n"
171 " time_stamp <%lx>\n"
172 " next_to_watch <%x>\n"
173 " jiffies <%lx>\n"
174 " next_to_watch.status <%x>\n",
175 readl(adapter->hw.hw_addr + tx_ring->head),
176 readl(adapter->hw.hw_addr + tx_ring->tail),
177 tx_ring->next_to_use,
178 tx_ring->next_to_clean,
179 tx_ring->tx_buffer_info[eop].time_stamp,
180 eop, jiffies, eop_desc->wb.status);
181 return true;
182 }
183
184 return false;
185 }
186
187 #define IXGBE_MAX_TXD_PWR 14
188 #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
189
190 /* Tx Descriptors needed, worst case */
191 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
192 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
193 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
194 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
195
196 /**
197 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
198 * @adapter: board private structure
199 **/
200 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
201 struct ixgbe_ring *tx_ring)
202 {
203 struct net_device *netdev = adapter->netdev;
204 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
205 struct ixgbe_tx_buffer *tx_buffer_info;
206 unsigned int i, eop;
207 bool cleaned = false;
208 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
209
210 i = tx_ring->next_to_clean;
211 eop = tx_ring->tx_buffer_info[i].next_to_watch;
212 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
213 while (eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) {
214 cleaned = false;
215 while (!cleaned) {
216 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
217 tx_buffer_info = &tx_ring->tx_buffer_info[i];
218 cleaned = (i == eop);
219
220 tx_ring->stats.bytes += tx_buffer_info->length;
221 if (cleaned) {
222 struct sk_buff *skb = tx_buffer_info->skb;
223 <<<<<<< HEAD:drivers/net/ixgbe/ixgbe_main.c
224 #ifdef NETIF_F_TSO
225 =======
226 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/net/ixgbe/ixgbe_main.c
227 unsigned int segs, bytecount;
228 segs = skb_shinfo(skb)->gso_segs ?: 1;
229 /* multiply data chunks by size of headers */
230 bytecount = ((segs - 1) * skb_headlen(skb)) +
231 skb->len;
232 total_tx_packets += segs;
233 total_tx_bytes += bytecount;
234 <<<<<<< HEAD:drivers/net/ixgbe/ixgbe_main.c
235 #else
236 total_tx_packets++;
237 total_tx_bytes += skb->len;
238 #endif
239 =======
240 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/net/ixgbe/ixgbe_main.c
241 }
242 ixgbe_unmap_and_free_tx_resource(adapter,
243 tx_buffer_info);
244 tx_desc->wb.status = 0;
245
246 i++;
247 if (i == tx_ring->count)
248 i = 0;
249 }
250
251 tx_ring->stats.packets++;
252
253 eop = tx_ring->tx_buffer_info[i].next_to_watch;
254 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
255
256 /* weight of a sort for tx, avoid endless transmit cleanup */
257 if (total_tx_packets >= tx_ring->work_limit)
258 break;
259 }
260
261 tx_ring->next_to_clean = i;
262
263 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
264 if (total_tx_packets && netif_carrier_ok(netdev) &&
265 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
266 /* Make sure that anybody stopping the queue after this
267 * sees the new next_to_clean.
268 */
269 smp_mb();
270 if (netif_queue_stopped(netdev) &&
271 !test_bit(__IXGBE_DOWN, &adapter->state)) {
272 netif_wake_queue(netdev);
273 adapter->restart_queue++;
274 }
275 }
276
277 if (adapter->detect_tx_hung)
278 if (ixgbe_check_tx_hang(adapter, tx_ring, eop, eop_desc))
279 netif_stop_queue(netdev);
280
281 if (total_tx_packets >= tx_ring->work_limit)
282 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->eims_value);
283
284 adapter->net_stats.tx_bytes += total_tx_bytes;
285 adapter->net_stats.tx_packets += total_tx_packets;
286 cleaned = total_tx_packets ? true : false;
287 return cleaned;
288 }
289
290 /**
291 * ixgbe_receive_skb - Send a completed packet up the stack
292 * @adapter: board private structure
293 * @skb: packet to send up
294 * @is_vlan: packet has a VLAN tag
295 * @tag: VLAN tag from descriptor
296 **/
297 static void ixgbe_receive_skb(struct ixgbe_adapter *adapter,
298 struct sk_buff *skb, bool is_vlan,
299 u16 tag)
300 {
301 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
302 if (adapter->vlgrp && is_vlan)
303 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
304 else
305 netif_receive_skb(skb);
306 } else {
307
308 if (adapter->vlgrp && is_vlan)
309 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
310 else
311 netif_rx(skb);
312 }
313 }
314
315 /**
316 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
317 * @adapter: address of board private structure
318 * @status_err: hardware indication of status of receive
319 * @skb: skb currently being received and modified
320 **/
321 static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
322 u32 status_err,
323 struct sk_buff *skb)
324 {
325 skb->ip_summed = CHECKSUM_NONE;
326
327 /* Ignore Checksum bit is set, or rx csum disabled */
328 if ((status_err & IXGBE_RXD_STAT_IXSM) ||
329 !(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
330 return;
331
332 /* if IP and error */
333 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
334 (status_err & IXGBE_RXDADV_ERR_IPE)) {
335 adapter->hw_csum_rx_error++;
336 return;
337 }
338
339 if (!(status_err & IXGBE_RXD_STAT_L4CS))
340 return;
341
342 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
343 adapter->hw_csum_rx_error++;
344 return;
345 }
346
347 /* It must be a TCP or UDP packet with a valid checksum */
348 skb->ip_summed = CHECKSUM_UNNECESSARY;
349 adapter->hw_csum_rx_good++;
350 }
351
352 /**
353 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
354 * @adapter: address of board private structure
355 **/
356 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
357 struct ixgbe_ring *rx_ring,
358 int cleaned_count)
359 {
360 struct net_device *netdev = adapter->netdev;
361 struct pci_dev *pdev = adapter->pdev;
362 union ixgbe_adv_rx_desc *rx_desc;
363 struct ixgbe_rx_buffer *rx_buffer_info;
364 struct sk_buff *skb;
365 unsigned int i;
366 unsigned int bufsz = adapter->rx_buf_len + NET_IP_ALIGN;
367
368 i = rx_ring->next_to_use;
369 rx_buffer_info = &rx_ring->rx_buffer_info[i];
370
371 while (cleaned_count--) {
372 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
373
374 if (!rx_buffer_info->page &&
375 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
376 rx_buffer_info->page = alloc_page(GFP_ATOMIC);
377 if (!rx_buffer_info->page) {
378 adapter->alloc_rx_page_failed++;
379 goto no_buffers;
380 }
381 rx_buffer_info->page_dma =
382 pci_map_page(pdev, rx_buffer_info->page,
383 0, PAGE_SIZE, PCI_DMA_FROMDEVICE);
384 }
385
386 if (!rx_buffer_info->skb) {
387 skb = netdev_alloc_skb(netdev, bufsz);
388
389 if (!skb) {
390 adapter->alloc_rx_buff_failed++;
391 goto no_buffers;
392 }
393
394 /*
395 * Make buffer alignment 2 beyond a 16 byte boundary
396 * this will result in a 16 byte aligned IP header after
397 * the 14 byte MAC header is removed
398 */
399 skb_reserve(skb, NET_IP_ALIGN);
400
401 rx_buffer_info->skb = skb;
402 rx_buffer_info->dma = pci_map_single(pdev, skb->data,
403 bufsz,
404 PCI_DMA_FROMDEVICE);
405 }
406 /* Refresh the desc even if buffer_addrs didn't change because
407 * each write-back erases this info. */
408 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
409 rx_desc->read.pkt_addr =
410 cpu_to_le64(rx_buffer_info->page_dma);
411 rx_desc->read.hdr_addr =
412 cpu_to_le64(rx_buffer_info->dma);
413 } else {
414 rx_desc->read.pkt_addr =
415 cpu_to_le64(rx_buffer_info->dma);
416 }
417
418 i++;
419 if (i == rx_ring->count)
420 i = 0;
421 rx_buffer_info = &rx_ring->rx_buffer_info[i];
422 }
423 no_buffers:
424 if (rx_ring->next_to_use != i) {
425 rx_ring->next_to_use = i;
426 if (i-- == 0)
427 i = (rx_ring->count - 1);
428
429 /*
430 * Force memory writes to complete before letting h/w
431 * know there are new descriptors to fetch. (Only
432 * applicable for weak-ordered memory model archs,
433 * such as IA-64).
434 */
435 wmb();
436 writel(i, adapter->hw.hw_addr + rx_ring->tail);
437 }
438 }
439
440 static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter,
441 struct ixgbe_ring *rx_ring,
442 int *work_done, int work_to_do)
443 {
444 struct net_device *netdev = adapter->netdev;
445 struct pci_dev *pdev = adapter->pdev;
446 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
447 struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
448 struct sk_buff *skb;
449 unsigned int i;
450 u32 upper_len, len, staterr;
451 u16 hdr_info, vlan_tag;
452 bool is_vlan, cleaned = false;
453 int cleaned_count = 0;
454 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
455
456 i = rx_ring->next_to_clean;
457 upper_len = 0;
458 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
459 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
460 rx_buffer_info = &rx_ring->rx_buffer_info[i];
461 is_vlan = (staterr & IXGBE_RXD_STAT_VP);
462 vlan_tag = le16_to_cpu(rx_desc->wb.upper.vlan);
463
464 while (staterr & IXGBE_RXD_STAT_DD) {
465 if (*work_done >= work_to_do)
466 break;
467 (*work_done)++;
468
469 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
470 hdr_info =
471 le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info);
472 len =
473 ((hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
474 IXGBE_RXDADV_HDRBUFLEN_SHIFT);
475 if (hdr_info & IXGBE_RXDADV_SPH)
476 adapter->rx_hdr_split++;
477 if (len > IXGBE_RX_HDR_SIZE)
478 len = IXGBE_RX_HDR_SIZE;
479 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
480 } else
481 len = le16_to_cpu(rx_desc->wb.upper.length);
482
483 cleaned = true;
484 skb = rx_buffer_info->skb;
485 prefetch(skb->data - NET_IP_ALIGN);
486 rx_buffer_info->skb = NULL;
487
488 if (len && !skb_shinfo(skb)->nr_frags) {
489 pci_unmap_single(pdev, rx_buffer_info->dma,
490 adapter->rx_buf_len + NET_IP_ALIGN,
491 PCI_DMA_FROMDEVICE);
492 skb_put(skb, len);
493 }
494
495 if (upper_len) {
496 pci_unmap_page(pdev, rx_buffer_info->page_dma,
497 PAGE_SIZE, PCI_DMA_FROMDEVICE);
498 rx_buffer_info->page_dma = 0;
499 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
500 rx_buffer_info->page, 0, upper_len);
501 rx_buffer_info->page = NULL;
502
503 skb->len += upper_len;
504 skb->data_len += upper_len;
505 skb->truesize += upper_len;
506 }
507
508 i++;
509 if (i == rx_ring->count)
510 i = 0;
511 next_buffer = &rx_ring->rx_buffer_info[i];
512
513 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
514 prefetch(next_rxd);
515
516 cleaned_count++;
517 if (staterr & IXGBE_RXD_STAT_EOP) {
518 rx_ring->stats.packets++;
519 rx_ring->stats.bytes += skb->len;
520 } else {
521 rx_buffer_info->skb = next_buffer->skb;
522 rx_buffer_info->dma = next_buffer->dma;
523 next_buffer->skb = skb;
524 adapter->non_eop_descs++;
525 goto next_desc;
526 }
527
528 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
529 dev_kfree_skb_irq(skb);
530 goto next_desc;
531 }
532
533 ixgbe_rx_checksum(adapter, staterr, skb);
534
535 /* probably a little skewed due to removing CRC */
536 total_rx_bytes += skb->len;
537 total_rx_packets++;
538
539 skb->protocol = eth_type_trans(skb, netdev);
540 ixgbe_receive_skb(adapter, skb, is_vlan, vlan_tag);
541 netdev->last_rx = jiffies;
542
543 next_desc:
544 rx_desc->wb.upper.status_error = 0;
545
546 /* return some buffers to hardware, one at a time is too slow */
547 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
548 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
549 cleaned_count = 0;
550 }
551
552 /* use prefetched values */
553 rx_desc = next_rxd;
554 rx_buffer_info = next_buffer;
555
556 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
557 is_vlan = (staterr & IXGBE_RXD_STAT_VP);
558 vlan_tag = le16_to_cpu(rx_desc->wb.upper.vlan);
559 }
560
561 rx_ring->next_to_clean = i;
562 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
563
564 if (cleaned_count)
565 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
566
567 adapter->net_stats.rx_bytes += total_rx_bytes;
568 adapter->net_stats.rx_packets += total_rx_packets;
569
570 return cleaned;
571 }
572
573 #define IXGBE_MAX_INTR 10
574 /**
575 * ixgbe_configure_msix - Configure MSI-X hardware
576 * @adapter: board private structure
577 *
578 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
579 * interrupts.
580 **/
581 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
582 {
583 int i, vector = 0;
584
585 for (i = 0; i < adapter->num_tx_queues; i++) {
586 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(i),
587 IXGBE_MSIX_VECTOR(vector));
588 writel(EITR_INTS_PER_SEC_TO_REG(adapter->tx_eitr),
589 adapter->hw.hw_addr + adapter->tx_ring[i].itr_register);
590 vector++;
591 }
592
593 for (i = 0; i < adapter->num_rx_queues; i++) {
594 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(i),
595 IXGBE_MSIX_VECTOR(vector));
596 writel(EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr),
597 adapter->hw.hw_addr + adapter->rx_ring[i].itr_register);
598 vector++;
599 }
600
601 vector = adapter->num_tx_queues + adapter->num_rx_queues;
602 ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX,
603 IXGBE_MSIX_VECTOR(vector));
604 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(vector), 1950);
605 }
606
607 static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
608 {
609 struct net_device *netdev = data;
610 struct ixgbe_adapter *adapter = netdev_priv(netdev);
611 struct ixgbe_hw *hw = &adapter->hw;
612 u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
613
614 if (eicr & IXGBE_EICR_LSC) {
615 adapter->lsc_int++;
616 if (!test_bit(__IXGBE_DOWN, &adapter->state))
617 mod_timer(&adapter->watchdog_timer, jiffies);
618 }
619
620 if (!test_bit(__IXGBE_DOWN, &adapter->state))
621 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
622
623 return IRQ_HANDLED;
624 }
625
626 static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
627 {
628 struct ixgbe_ring *txr = data;
629 struct ixgbe_adapter *adapter = txr->adapter;
630
631 ixgbe_clean_tx_irq(adapter, txr);
632
633 return IRQ_HANDLED;
634 }
635
636 static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
637 {
638 struct ixgbe_ring *rxr = data;
639 struct ixgbe_adapter *adapter = rxr->adapter;
640
641 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rxr->eims_value);
642 netif_rx_schedule(adapter->netdev, &adapter->napi);
643 return IRQ_HANDLED;
644 }
645
646 static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
647 {
648 struct ixgbe_adapter *adapter = container_of(napi,
649 struct ixgbe_adapter, napi);
650 struct net_device *netdev = adapter->netdev;
651 int work_done = 0;
652 struct ixgbe_ring *rxr = adapter->rx_ring;
653
654 /* Keep link state information with original netdev */
655 if (!netif_carrier_ok(netdev))
656 goto quit_polling;
657
658 ixgbe_clean_rx_irq(adapter, rxr, &work_done, budget);
659
660 /* If no Tx and not enough Rx work done, exit the polling mode */
661 if ((work_done < budget) || !netif_running(netdev)) {
662 quit_polling:
663 netif_rx_complete(netdev, napi);
664 if (!test_bit(__IXGBE_DOWN, &adapter->state))
665 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS,
666 rxr->eims_value);
667 }
668
669 return work_done;
670 }
671
672 /**
673 * ixgbe_setup_msix - Initialize MSI-X interrupts
674 *
675 * ixgbe_setup_msix allocates MSI-X vectors and requests
676 * interrutps from the kernel.
677 **/
678 static int ixgbe_setup_msix(struct ixgbe_adapter *adapter)
679 {
680 struct net_device *netdev = adapter->netdev;
681 int i, int_vector = 0, err = 0;
682 int max_msix_count;
683
684 /* +1 for the LSC interrupt */
685 max_msix_count = adapter->num_rx_queues + adapter->num_tx_queues + 1;
686 adapter->msix_entries = kcalloc(max_msix_count,
687 sizeof(struct msix_entry), GFP_KERNEL);
688 if (!adapter->msix_entries)
689 return -ENOMEM;
690
691 for (i = 0; i < max_msix_count; i++)
692 adapter->msix_entries[i].entry = i;
693
694 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
695 max_msix_count);
696 if (err)
697 goto out;
698
699 for (i = 0; i < adapter->num_tx_queues; i++) {
700 sprintf(adapter->tx_ring[i].name, "%s-tx%d", netdev->name, i);
701 err = request_irq(adapter->msix_entries[int_vector].vector,
702 &ixgbe_msix_clean_tx,
703 0,
704 adapter->tx_ring[i].name,
705 &(adapter->tx_ring[i]));
706 if (err) {
707 DPRINTK(PROBE, ERR,
708 "request_irq failed for MSIX interrupt "
709 "Error: %d\n", err);
710 goto release_irqs;
711 }
712 adapter->tx_ring[i].eims_value =
713 (1 << IXGBE_MSIX_VECTOR(int_vector));
714 adapter->tx_ring[i].itr_register = IXGBE_EITR(int_vector);
715 int_vector++;
716 }
717
718 for (i = 0; i < adapter->num_rx_queues; i++) {
719 if (strlen(netdev->name) < (IFNAMSIZ - 5))
720 sprintf(adapter->rx_ring[i].name,
721 "%s-rx%d", netdev->name, i);
722 else
723 memcpy(adapter->rx_ring[i].name,
724 netdev->name, IFNAMSIZ);
725 err = request_irq(adapter->msix_entries[int_vector].vector,
726 &ixgbe_msix_clean_rx, 0,
727 adapter->rx_ring[i].name,
728 &(adapter->rx_ring[i]));
729 if (err) {
730 DPRINTK(PROBE, ERR,
731 "request_irq failed for MSIX interrupt "
732 "Error: %d\n", err);
733 goto release_irqs;
734 }
735
736 adapter->rx_ring[i].eims_value =
737 (1 << IXGBE_MSIX_VECTOR(int_vector));
738 adapter->rx_ring[i].itr_register = IXGBE_EITR(int_vector);
739 int_vector++;
740 }
741
742 sprintf(adapter->lsc_name, "%s-lsc", netdev->name);
743 err = request_irq(adapter->msix_entries[int_vector].vector,
744 &ixgbe_msix_lsc, 0, adapter->lsc_name, netdev);
745 if (err) {
746 DPRINTK(PROBE, ERR,
747 "request_irq for msix_lsc failed: %d\n", err);
748 goto release_irqs;
749 }
750
751 /* FIXME: implement netif_napi_remove() instead */
752 adapter->napi.poll = ixgbe_clean_rxonly;
753 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED;
754 return 0;
755
756 release_irqs:
757 int_vector--;
758 for (; int_vector >= adapter->num_tx_queues; int_vector--)
759 free_irq(adapter->msix_entries[int_vector].vector,
760 &(adapter->rx_ring[int_vector -
761 adapter->num_tx_queues]));
762
763 for (; int_vector >= 0; int_vector--)
764 free_irq(adapter->msix_entries[int_vector].vector,
765 &(adapter->tx_ring[int_vector]));
766 out:
767 kfree(adapter->msix_entries);
768 adapter->msix_entries = NULL;
769 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
770 return err;
771 }
772
773 /**
774 * ixgbe_intr - Interrupt Handler
775 * @irq: interrupt number
776 * @data: pointer to a network interface device structure
777 * @pt_regs: CPU registers structure
778 **/
779 static irqreturn_t ixgbe_intr(int irq, void *data)
780 {
781 struct net_device *netdev = data;
782 struct ixgbe_adapter *adapter = netdev_priv(netdev);
783 struct ixgbe_hw *hw = &adapter->hw;
784 u32 eicr;
785
786 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
787
788 if (!eicr)
789 return IRQ_NONE; /* Not our interrupt */
790
791 if (eicr & IXGBE_EICR_LSC) {
792 adapter->lsc_int++;
793 if (!test_bit(__IXGBE_DOWN, &adapter->state))
794 mod_timer(&adapter->watchdog_timer, jiffies);
795 }
796 if (netif_rx_schedule_prep(netdev, &adapter->napi)) {
797 /* Disable interrupts and register for poll. The flush of the
798 * posted write is intentionally left out. */
799 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
800 __netif_rx_schedule(netdev, &adapter->napi);
801 }
802
803 return IRQ_HANDLED;
804 }
805
806 /**
807 * ixgbe_request_irq - initialize interrupts
808 * @adapter: board private structure
809 *
810 * Attempts to configure interrupts using the best available
811 * capabilities of the hardware and kernel.
812 **/
813 static int ixgbe_request_irq(struct ixgbe_adapter *adapter, u32 *num_rx_queues)
814 {
815 struct net_device *netdev = adapter->netdev;
816 int flags, err;
817 irq_handler_t handler = ixgbe_intr;
818
819 flags = IRQF_SHARED;
820
821 err = ixgbe_setup_msix(adapter);
822 if (!err)
823 goto request_done;
824
825 /*
826 * if we can't do MSI-X, fall through and try MSI
827 * No need to reallocate memory since we're decreasing the number of
828 * queues. We just won't use the other ones, also it is freed correctly
829 * on ixgbe_remove.
830 */
831 *num_rx_queues = 1;
832
833 /* do MSI */
834 err = pci_enable_msi(adapter->pdev);
835 if (!err) {
836 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
837 flags &= ~IRQF_SHARED;
838 handler = &ixgbe_intr;
839 }
840
841 err = request_irq(adapter->pdev->irq, handler, flags,
842 netdev->name, netdev);
843 if (err)
844 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
845
846 request_done:
847 return err;
848 }
849
850 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
851 {
852 struct net_device *netdev = adapter->netdev;
853
854 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
855 int i;
856
857 for (i = 0; i < adapter->num_tx_queues; i++)
858 free_irq(adapter->msix_entries[i].vector,
859 &(adapter->tx_ring[i]));
860 for (i = 0; i < adapter->num_rx_queues; i++)
861 free_irq(adapter->msix_entries[i +
862 adapter->num_tx_queues].vector,
863 &(adapter->rx_ring[i]));
864 i = adapter->num_rx_queues + adapter->num_tx_queues;
865 free_irq(adapter->msix_entries[i].vector, netdev);
866 pci_disable_msix(adapter->pdev);
867 kfree(adapter->msix_entries);
868 adapter->msix_entries = NULL;
869 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
870 return;
871 }
872
873 free_irq(adapter->pdev->irq, netdev);
874 if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
875 pci_disable_msi(adapter->pdev);
876 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
877 }
878 }
879
880 /**
881 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
882 * @adapter: board private structure
883 **/
884 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
885 {
886 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
887 IXGBE_WRITE_FLUSH(&adapter->hw);
888 synchronize_irq(adapter->pdev->irq);
889 }
890
891 /**
892 * ixgbe_irq_enable - Enable default interrupt generation settings
893 * @adapter: board private structure
894 **/
895 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
896 {
897 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
898 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC,
899 (IXGBE_EIMS_ENABLE_MASK &
900 ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC)));
901 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS,
902 IXGBE_EIMS_ENABLE_MASK);
903 IXGBE_WRITE_FLUSH(&adapter->hw);
904 }
905
906 /**
907 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
908 *
909 **/
910 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
911 {
912 int i;
913 struct ixgbe_hw *hw = &adapter->hw;
914
915 if (adapter->rx_eitr)
916 IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
917 EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr));
918
919 /* for re-triggering the interrupt in non-NAPI mode */
920 adapter->rx_ring[0].eims_value = (1 << IXGBE_MSIX_VECTOR(0));
921 adapter->tx_ring[0].eims_value = (1 << IXGBE_MSIX_VECTOR(0));
922
923 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0);
924 for (i = 0; i < adapter->num_tx_queues; i++)
925 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(i), i);
926 }
927
928 /**
929 * ixgbe_configure_tx - Configure 8254x Transmit Unit after Reset
930 * @adapter: board private structure
931 *
932 * Configure the Tx unit of the MAC after a reset.
933 **/
934 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
935 {
936 u64 tdba;
937 struct ixgbe_hw *hw = &adapter->hw;
938 u32 i, tdlen;
939
940 /* Setup the HW Tx Head and Tail descriptor pointers */
941 for (i = 0; i < adapter->num_tx_queues; i++) {
942 tdba = adapter->tx_ring[i].dma;
943 tdlen = adapter->tx_ring[i].count *
944 sizeof(union ixgbe_adv_tx_desc);
945 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(i), (tdba & DMA_32BIT_MASK));
946 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(i), (tdba >> 32));
947 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(i), tdlen);
948 IXGBE_WRITE_REG(hw, IXGBE_TDH(i), 0);
949 IXGBE_WRITE_REG(hw, IXGBE_TDT(i), 0);
950 adapter->tx_ring[i].head = IXGBE_TDH(i);
951 adapter->tx_ring[i].tail = IXGBE_TDT(i);
952 }
953
954 IXGBE_WRITE_REG(hw, IXGBE_TIPG, IXGBE_TIPG_FIBER_DEFAULT);
955 }
956
957 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
958 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
959
960 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
961 /**
962 * ixgbe_configure_rx - Configure 8254x Receive Unit after Reset
963 * @adapter: board private structure
964 *
965 * Configure the Rx unit of the MAC after a reset.
966 **/
967 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
968 {
969 u64 rdba;
970 struct ixgbe_hw *hw = &adapter->hw;
971 struct net_device *netdev = adapter->netdev;
972 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
973 u32 rdlen, rxctrl, rxcsum;
974 u32 random[10];
975 u32 reta, mrqc;
976 int i;
977 u32 fctrl, hlreg0;
978 u32 srrctl;
979 u32 pages;
980
981 /* Decide whether to use packet split mode or not */
982 if (netdev->mtu > ETH_DATA_LEN)
983 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
984 else
985 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
986
987 /* Set the RX buffer length according to the mode */
988 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
989 adapter->rx_buf_len = IXGBE_RX_HDR_SIZE;
990 } else {
991 if (netdev->mtu <= ETH_DATA_LEN)
992 adapter->rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
993 else
994 adapter->rx_buf_len = ALIGN(max_frame, 1024);
995 }
996
997 fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
998 fctrl |= IXGBE_FCTRL_BAM;
999 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
1000
1001 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1002 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1003 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
1004 else
1005 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
1006 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
1007
1008 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1009
1010 srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(0));
1011 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1012 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1013
1014 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1015 srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1016 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1017 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1018 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1019 IXGBE_SRRCTL_BSIZEHDR_MASK);
1020 } else {
1021 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1022
1023 if (adapter->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1024 srrctl |=
1025 IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1026 else
1027 srrctl |=
1028 adapter->rx_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1029 }
1030 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(0), srrctl);
1031
1032 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1033 /* disable receives while setting up the descriptors */
1034 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1035 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
1036
1037 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1038 * the Base and Length of the Rx Descriptor Ring */
1039 for (i = 0; i < adapter->num_rx_queues; i++) {
1040 rdba = adapter->rx_ring[i].dma;
1041 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(i), (rdba & DMA_32BIT_MASK));
1042 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(i), (rdba >> 32));
1043 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(i), rdlen);
1044 IXGBE_WRITE_REG(hw, IXGBE_RDH(i), 0);
1045 IXGBE_WRITE_REG(hw, IXGBE_RDT(i), 0);
1046 adapter->rx_ring[i].head = IXGBE_RDH(i);
1047 adapter->rx_ring[i].tail = IXGBE_RDT(i);
1048 }
1049
1050 if (adapter->num_rx_queues > 1) {
1051 /* Random 40bytes used as random key in RSS hash function */
1052 get_random_bytes(&random[0], 40);
1053
1054 switch (adapter->num_rx_queues) {
1055 case 8:
1056 case 4:
1057 /* Bits [3:0] in each byte refers the Rx queue no */
1058 reta = 0x00010203;
1059 break;
1060 case 2:
1061 reta = 0x00010001;
1062 break;
1063 default:
1064 reta = 0x00000000;
1065 break;
1066 }
1067
1068 /* Fill out redirection table */
1069 for (i = 0; i < 32; i++) {
1070 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_RETA(0), i, reta);
1071 if (adapter->num_rx_queues > 4) {
1072 i++;
1073 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_RETA(0), i,
1074 0x04050607);
1075 }
1076 }
1077
1078 /* Fill out hash function seeds */
1079 for (i = 0; i < 10; i++)
1080 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_RSSRK(0), i, random[i]);
1081
1082 mrqc = IXGBE_MRQC_RSSEN
1083 /* Perform hash on these packet types */
1084 | IXGBE_MRQC_RSS_FIELD_IPV4
1085 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1086 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1087 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1088 | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1089 | IXGBE_MRQC_RSS_FIELD_IPV6
1090 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1091 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1092 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
1093 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1094
1095 /* Multiqueue and packet checksumming are mutually exclusive. */
1096 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1097 rxcsum |= IXGBE_RXCSUM_PCSD;
1098 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1099 } else {
1100 /* Enable Receive Checksum Offload for TCP and UDP */
1101 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1102 if (adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1103 /* Enable IPv4 payload checksum for UDP fragments
1104 * Must be used in conjunction with packet-split. */
1105 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1106 } else {
1107 /* don't need to clear IPPCSE as it defaults to 0 */
1108 }
1109 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1110 }
1111 /* Enable Receives */
1112 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl);
1113 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1114 }
1115
1116 static void ixgbe_vlan_rx_register(struct net_device *netdev,
1117 struct vlan_group *grp)
1118 {
1119 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1120 u32 ctrl;
1121
1122 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1123 ixgbe_irq_disable(adapter);
1124 adapter->vlgrp = grp;
1125
1126 if (grp) {
1127 /* enable VLAN tag insert/strip */
1128 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1129 ctrl |= IXGBE_VLNCTRL_VME | IXGBE_VLNCTRL_VFE;
1130 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1131 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1132 }
1133
1134 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1135 ixgbe_irq_enable(adapter);
1136 }
1137
1138 static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1139 {
1140 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1141
1142 /* add VID to filter table */
1143 ixgbe_set_vfta(&adapter->hw, vid, 0, true);
1144 }
1145
1146 static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1147 {
1148 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1149
1150 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1151 ixgbe_irq_disable(adapter);
1152
1153 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1154
1155 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1156 ixgbe_irq_enable(adapter);
1157
1158 /* remove VID from filter table */
1159 ixgbe_set_vfta(&adapter->hw, vid, 0, false);
1160 }
1161
1162 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1163 {
1164 ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1165
1166 if (adapter->vlgrp) {
1167 u16 vid;
1168 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1169 if (!vlan_group_get_device(adapter->vlgrp, vid))
1170 continue;
1171 ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1172 }
1173 }
1174 }
1175
1176 /**
1177 * ixgbe_set_multi - Multicast and Promiscuous mode set
1178 * @netdev: network interface device structure
1179 *
1180 * The set_multi entry point is called whenever the multicast address
1181 * list or the network interface flags are updated. This routine is
1182 * responsible for configuring the hardware for proper multicast,
1183 * promiscuous mode, and all-multi behavior.
1184 **/
1185 static void ixgbe_set_multi(struct net_device *netdev)
1186 {
1187 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1188 struct ixgbe_hw *hw = &adapter->hw;
1189 struct dev_mc_list *mc_ptr;
1190 u8 *mta_list;
1191 u32 fctrl;
1192 int i;
1193
1194 /* Check for Promiscuous and All Multicast modes */
1195
1196 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1197
1198 if (netdev->flags & IFF_PROMISC) {
1199 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1200 } else if (netdev->flags & IFF_ALLMULTI) {
1201 fctrl |= IXGBE_FCTRL_MPE;
1202 fctrl &= ~IXGBE_FCTRL_UPE;
1203 } else {
1204 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1205 }
1206
1207 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
1208
1209 if (netdev->mc_count) {
1210 mta_list = kcalloc(netdev->mc_count, ETH_ALEN, GFP_ATOMIC);
1211 if (!mta_list)
1212 return;
1213
1214 /* Shared function expects packed array of only addresses. */
1215 mc_ptr = netdev->mc_list;
1216
1217 for (i = 0; i < netdev->mc_count; i++) {
1218 if (!mc_ptr)
1219 break;
1220 memcpy(mta_list + (i * ETH_ALEN), mc_ptr->dmi_addr,
1221 ETH_ALEN);
1222 mc_ptr = mc_ptr->next;
1223 }
1224
1225 ixgbe_update_mc_addr_list(hw, mta_list, i, 0);
1226 kfree(mta_list);
1227 } else {
1228 ixgbe_update_mc_addr_list(hw, NULL, 0, 0);
1229 }
1230
1231 }
1232
1233 static void ixgbe_configure(struct ixgbe_adapter *adapter)
1234 {
1235 struct net_device *netdev = adapter->netdev;
1236 int i;
1237
1238 ixgbe_set_multi(netdev);
1239
1240 ixgbe_restore_vlan(adapter);
1241
1242 ixgbe_configure_tx(adapter);
1243 ixgbe_configure_rx(adapter);
1244 for (i = 0; i < adapter->num_rx_queues; i++)
1245 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
1246 (adapter->rx_ring[i].count - 1));
1247 }
1248
1249 static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1250 {
1251 struct net_device *netdev = adapter->netdev;
1252 int i;
1253 u32 gpie = 0;
1254 struct ixgbe_hw *hw = &adapter->hw;
1255 u32 txdctl, rxdctl, mhadd;
1256 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1257
1258 ixgbe_get_hw_control(adapter);
1259
1260 if (adapter->flags & (IXGBE_FLAG_MSIX_ENABLED |
1261 IXGBE_FLAG_MSI_ENABLED)) {
1262 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1263 gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
1264 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
1265 } else {
1266 /* MSI only */
1267 gpie = (IXGBE_GPIE_EIAME |
1268 IXGBE_GPIE_PBA_SUPPORT);
1269 }
1270 IXGBE_WRITE_REG(&adapter->hw, IXGBE_GPIE, gpie);
1271 gpie = IXGBE_READ_REG(&adapter->hw, IXGBE_GPIE);
1272 }
1273
1274 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
1275
1276 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
1277 mhadd &= ~IXGBE_MHADD_MFS_MASK;
1278 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
1279
1280 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
1281 }
1282
1283 for (i = 0; i < adapter->num_tx_queues; i++) {
1284 txdctl = IXGBE_READ_REG(&adapter->hw, IXGBE_TXDCTL(i));
1285 txdctl |= IXGBE_TXDCTL_ENABLE;
1286 IXGBE_WRITE_REG(&adapter->hw, IXGBE_TXDCTL(i), txdctl);
1287 }
1288
1289 for (i = 0; i < adapter->num_rx_queues; i++) {
1290 rxdctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXDCTL(i));
1291 rxdctl |= IXGBE_RXDCTL_ENABLE;
1292 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXDCTL(i), rxdctl);
1293 }
1294 /* enable all receives */
1295 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1296 rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
1297 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxdctl);
1298
1299 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
1300 ixgbe_configure_msix(adapter);
1301 else
1302 ixgbe_configure_msi_and_legacy(adapter);
1303
1304 clear_bit(__IXGBE_DOWN, &adapter->state);
1305 napi_enable(&adapter->napi);
1306 ixgbe_irq_enable(adapter);
1307
1308 /* bring the link up in the watchdog, this could race with our first
1309 * link up interrupt but shouldn't be a problem */
1310 mod_timer(&adapter->watchdog_timer, jiffies);
1311 return 0;
1312 }
1313
1314 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
1315 {
1316 WARN_ON(in_interrupt());
1317 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
1318 msleep(1);
1319 ixgbe_down(adapter);
1320 ixgbe_up(adapter);
1321 clear_bit(__IXGBE_RESETTING, &adapter->state);
1322 }
1323
1324 int ixgbe_up(struct ixgbe_adapter *adapter)
1325 {
1326 /* hardware has been reset, we need to reload some things */
1327 ixgbe_configure(adapter);
1328
1329 return ixgbe_up_complete(adapter);
1330 }
1331
1332 void ixgbe_reset(struct ixgbe_adapter *adapter)
1333 {
1334 if (ixgbe_init_hw(&adapter->hw))
1335 DPRINTK(PROBE, ERR, "Hardware Error\n");
1336
1337 /* reprogram the RAR[0] in case user changed it. */
1338 ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
1339
1340 }
1341
1342 #ifdef CONFIG_PM
1343 static int ixgbe_resume(struct pci_dev *pdev)
1344 {
1345 struct net_device *netdev = pci_get_drvdata(pdev);
1346 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1347 u32 err, num_rx_queues = adapter->num_rx_queues;
1348
1349 pci_set_power_state(pdev, PCI_D0);
1350 pci_restore_state(pdev);
1351 err = pci_enable_device(pdev);
1352 if (err) {
1353 printk(KERN_ERR "ixgbe: Cannot enable PCI device from " \
1354 "suspend\n");
1355 return err;
1356 }
1357 pci_set_master(pdev);
1358
1359 pci_enable_wake(pdev, PCI_D3hot, 0);
1360 pci_enable_wake(pdev, PCI_D3cold, 0);
1361
1362 if (netif_running(netdev)) {
1363 err = ixgbe_request_irq(adapter, &num_rx_queues);
1364 if (err)
1365 return err;
1366 }
1367
1368 ixgbe_reset(adapter);
1369
1370 if (netif_running(netdev))
1371 ixgbe_up(adapter);
1372
1373 netif_device_attach(netdev);
1374
1375 return 0;
1376 }
1377 #endif
1378
1379 /**
1380 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
1381 * @adapter: board private structure
1382 * @rx_ring: ring to free buffers from
1383 **/
1384 static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
1385 struct ixgbe_ring *rx_ring)
1386 {
1387 struct pci_dev *pdev = adapter->pdev;
1388 unsigned long size;
1389 unsigned int i;
1390
1391 /* Free all the Rx ring sk_buffs */
1392
1393 for (i = 0; i < rx_ring->count; i++) {
1394 struct ixgbe_rx_buffer *rx_buffer_info;
1395
1396 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1397 if (rx_buffer_info->dma) {
1398 pci_unmap_single(pdev, rx_buffer_info->dma,
1399 adapter->rx_buf_len,
1400 PCI_DMA_FROMDEVICE);
1401 rx_buffer_info->dma = 0;
1402 }
1403 if (rx_buffer_info->skb) {
1404 dev_kfree_skb(rx_buffer_info->skb);
1405 rx_buffer_info->skb = NULL;
1406 }
1407 if (!rx_buffer_info->page)
1408 continue;
1409 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE,
1410 PCI_DMA_FROMDEVICE);
1411 rx_buffer_info->page_dma = 0;
1412
1413 put_page(rx_buffer_info->page);
1414 rx_buffer_info->page = NULL;
1415 }
1416
1417 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
1418 memset(rx_ring->rx_buffer_info, 0, size);
1419
1420 /* Zero out the descriptor ring */
1421 memset(rx_ring->desc, 0, rx_ring->size);
1422
1423 rx_ring->next_to_clean = 0;
1424 rx_ring->next_to_use = 0;
1425
1426 writel(0, adapter->hw.hw_addr + rx_ring->head);
1427 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1428 }
1429
1430 /**
1431 * ixgbe_clean_tx_ring - Free Tx Buffers
1432 * @adapter: board private structure
1433 * @tx_ring: ring to be cleaned
1434 **/
1435 static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
1436 struct ixgbe_ring *tx_ring)
1437 {
1438 struct ixgbe_tx_buffer *tx_buffer_info;
1439 unsigned long size;
1440 unsigned int i;
1441
1442 /* Free all the Tx ring sk_buffs */
1443
1444 for (i = 0; i < tx_ring->count; i++) {
1445 tx_buffer_info = &tx_ring->tx_buffer_info[i];
1446 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1447 }
1448
1449 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
1450 memset(tx_ring->tx_buffer_info, 0, size);
1451
1452 /* Zero out the descriptor ring */
1453 memset(tx_ring->desc, 0, tx_ring->size);
1454
1455 tx_ring->next_to_use = 0;
1456 tx_ring->next_to_clean = 0;
1457
1458 writel(0, adapter->hw.hw_addr + tx_ring->head);
1459 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1460 }
1461
1462 /**
1463 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
1464 * @adapter: board private structure
1465 **/
1466 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
1467 {
1468 int i;
1469
1470 for (i = 0; i < adapter->num_tx_queues; i++)
1471 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1472 }
1473
1474 /**
1475 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
1476 * @adapter: board private structure
1477 **/
1478 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
1479 {
1480 int i;
1481
1482 for (i = 0; i < adapter->num_rx_queues; i++)
1483 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1484 }
1485
1486 void ixgbe_down(struct ixgbe_adapter *adapter)
1487 {
1488 struct net_device *netdev = adapter->netdev;
1489 u32 rxctrl;
1490
1491 /* signal that we are down to the interrupt handler */
1492 set_bit(__IXGBE_DOWN, &adapter->state);
1493
1494 /* disable receives */
1495 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1496 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL,
1497 rxctrl & ~IXGBE_RXCTRL_RXEN);
1498
1499 netif_tx_disable(netdev);
1500
1501 /* disable transmits in the hardware */
1502
1503 /* flush both disables */
1504 IXGBE_WRITE_FLUSH(&adapter->hw);
1505 msleep(10);
1506
1507 napi_disable(&adapter->napi);
1508
1509 ixgbe_irq_disable(adapter);
1510
1511 del_timer_sync(&adapter->watchdog_timer);
1512
1513 netif_carrier_off(netdev);
1514 netif_stop_queue(netdev);
1515
1516 ixgbe_reset(adapter);
1517 ixgbe_clean_all_tx_rings(adapter);
1518 ixgbe_clean_all_rx_rings(adapter);
1519
1520 }
1521
1522 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
1523 {
1524 struct net_device *netdev = pci_get_drvdata(pdev);
1525 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1526 #ifdef CONFIG_PM
1527 int retval = 0;
1528 #endif
1529
1530 netif_device_detach(netdev);
1531
1532 if (netif_running(netdev)) {
1533 ixgbe_down(adapter);
1534 ixgbe_free_irq(adapter);
1535 }
1536
1537 #ifdef CONFIG_PM
1538 retval = pci_save_state(pdev);
1539 if (retval)
1540 return retval;
1541 #endif
1542
1543 pci_enable_wake(pdev, PCI_D3hot, 0);
1544 pci_enable_wake(pdev, PCI_D3cold, 0);
1545
1546 ixgbe_release_hw_control(adapter);
1547
1548 pci_disable_device(pdev);
1549
1550 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1551
1552 return 0;
1553 }
1554
1555 static void ixgbe_shutdown(struct pci_dev *pdev)
1556 {
1557 ixgbe_suspend(pdev, PMSG_SUSPEND);
1558 }
1559
1560 /**
1561 * ixgbe_clean - NAPI Rx polling callback
1562 * @adapter: board private structure
1563 **/
1564 static int ixgbe_clean(struct napi_struct *napi, int budget)
1565 {
1566 struct ixgbe_adapter *adapter = container_of(napi,
1567 struct ixgbe_adapter, napi);
1568 struct net_device *netdev = adapter->netdev;
1569 int tx_cleaned = 0, work_done = 0;
1570
1571 /* In non-MSIX case, there is no multi-Tx/Rx queue */
1572 tx_cleaned = ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
1573 ixgbe_clean_rx_irq(adapter, &adapter->rx_ring[0], &work_done,
1574 budget);
1575
1576 if (tx_cleaned)
1577 work_done = budget;
1578
1579 /* If budget not fully consumed, exit the polling mode */
1580 if (work_done < budget) {
1581 netif_rx_complete(netdev, napi);
1582 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1583 ixgbe_irq_enable(adapter);
1584 }
1585
1586 return work_done;
1587 }
1588
1589 /**
1590 * ixgbe_tx_timeout - Respond to a Tx Hang
1591 * @netdev: network interface device structure
1592 **/
1593 static void ixgbe_tx_timeout(struct net_device *netdev)
1594 {
1595 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1596
1597 /* Do the reset outside of interrupt context */
1598 schedule_work(&adapter->reset_task);
1599 }
1600
1601 static void ixgbe_reset_task(struct work_struct *work)
1602 {
1603 struct ixgbe_adapter *adapter;
1604 adapter = container_of(work, struct ixgbe_adapter, reset_task);
1605
1606 adapter->tx_timeout_count++;
1607
1608 ixgbe_reinit_locked(adapter);
1609 }
1610
1611 /**
1612 * ixgbe_alloc_queues - Allocate memory for all rings
1613 * @adapter: board private structure to initialize
1614 *
1615 * We allocate one ring per queue at run-time since we don't know the
1616 * number of queues at compile-time. The polling_netdev array is
1617 * intended for Multiqueue, but should work fine with a single queue.
1618 **/
1619 static int __devinit ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
1620 {
1621 int i;
1622
1623 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1624 sizeof(struct ixgbe_ring), GFP_KERNEL);
1625 if (!adapter->tx_ring)
1626 return -ENOMEM;
1627
1628 for (i = 0; i < adapter->num_tx_queues; i++)
1629 adapter->tx_ring[i].count = IXGBE_DEFAULT_TXD;
1630
1631 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1632 sizeof(struct ixgbe_ring), GFP_KERNEL);
1633 if (!adapter->rx_ring) {
1634 kfree(adapter->tx_ring);
1635 return -ENOMEM;
1636 }
1637
1638 for (i = 0; i < adapter->num_rx_queues; i++) {
1639 adapter->rx_ring[i].adapter = adapter;
1640 adapter->rx_ring[i].itr_register = IXGBE_EITR(i);
1641 adapter->rx_ring[i].count = IXGBE_DEFAULT_RXD;
1642 }
1643
1644 return 0;
1645 }
1646
1647 /**
1648 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
1649 * @adapter: board private structure to initialize
1650 *
1651 * ixgbe_sw_init initializes the Adapter private data structure.
1652 * Fields are initialized based on PCI device information and
1653 * OS network device settings (MTU size).
1654 **/
1655 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
1656 {
1657 struct ixgbe_hw *hw = &adapter->hw;
1658 struct pci_dev *pdev = adapter->pdev;
1659
1660 /* default flow control settings */
1661 hw->fc.original_type = ixgbe_fc_full;
1662 hw->fc.type = ixgbe_fc_full;
1663
1664 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
1665 if (hw->mac.ops.reset(hw)) {
1666 dev_err(&pdev->dev, "HW Init failed\n");
1667 return -EIO;
1668 }
1669 if (hw->mac.ops.setup_link_speed(hw, IXGBE_LINK_SPEED_10GB_FULL, true,
1670 false)) {
1671 dev_err(&pdev->dev, "Link Speed setup failed\n");
1672 return -EIO;
1673 }
1674
1675 /* initialize eeprom parameters */
1676 if (ixgbe_init_eeprom(hw)) {
1677 dev_err(&pdev->dev, "EEPROM initialization failed\n");
1678 return -EIO;
1679 }
1680
1681 /* Set the default values */
1682 adapter->num_rx_queues = IXGBE_DEFAULT_RXQ;
1683 adapter->num_tx_queues = 1;
1684 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
1685
1686 if (ixgbe_alloc_queues(adapter)) {
1687 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1688 return -ENOMEM;
1689 }
1690
1691 set_bit(__IXGBE_DOWN, &adapter->state);
1692
1693 return 0;
1694 }
1695
1696 /**
1697 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
1698 * @adapter: board private structure
1699 * @txdr: tx descriptor ring (for a specific queue) to setup
1700 *
1701 * Return 0 on success, negative on failure
1702 **/
1703 int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
1704 struct ixgbe_ring *txdr)
1705 {
1706 struct pci_dev *pdev = adapter->pdev;
1707 int size;
1708
1709 size = sizeof(struct ixgbe_tx_buffer) * txdr->count;
1710 txdr->tx_buffer_info = vmalloc(size);
1711 if (!txdr->tx_buffer_info) {
1712 DPRINTK(PROBE, ERR,
1713 "Unable to allocate memory for the transmit descriptor ring\n");
1714 return -ENOMEM;
1715 }
1716 memset(txdr->tx_buffer_info, 0, size);
1717
1718 /* round up to nearest 4K */
1719 txdr->size = txdr->count * sizeof(union ixgbe_adv_tx_desc);
1720 txdr->size = ALIGN(txdr->size, 4096);
1721
1722 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1723 if (!txdr->desc) {
1724 vfree(txdr->tx_buffer_info);
1725 DPRINTK(PROBE, ERR,
1726 "Memory allocation failed for the tx desc ring\n");
1727 return -ENOMEM;
1728 }
1729
1730 txdr->adapter = adapter;
1731 txdr->next_to_use = 0;
1732 txdr->next_to_clean = 0;
1733 txdr->work_limit = txdr->count;
1734
1735 return 0;
1736 }
1737
1738 /**
1739 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
1740 * @adapter: board private structure
1741 * @rxdr: rx descriptor ring (for a specific queue) to setup
1742 *
1743 * Returns 0 on success, negative on failure
1744 **/
1745 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
1746 struct ixgbe_ring *rxdr)
1747 {
1748 struct pci_dev *pdev = adapter->pdev;
1749 int size, desc_len;
1750
1751 size = sizeof(struct ixgbe_rx_buffer) * rxdr->count;
1752 rxdr->rx_buffer_info = vmalloc(size);
1753 if (!rxdr->rx_buffer_info) {
1754 DPRINTK(PROBE, ERR,
1755 "vmalloc allocation failed for the rx desc ring\n");
1756 return -ENOMEM;
1757 }
1758 memset(rxdr->rx_buffer_info, 0, size);
1759
1760 desc_len = sizeof(union ixgbe_adv_rx_desc);
1761
1762 /* Round up to nearest 4K */
1763 rxdr->size = rxdr->count * desc_len;
1764 rxdr->size = ALIGN(rxdr->size, 4096);
1765
1766 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1767
1768 if (!rxdr->desc) {
1769 DPRINTK(PROBE, ERR,
1770 "Memory allocation failed for the rx desc ring\n");
1771 vfree(rxdr->rx_buffer_info);
1772 return -ENOMEM;
1773 }
1774
1775 rxdr->next_to_clean = 0;
1776 rxdr->next_to_use = 0;
1777 rxdr->adapter = adapter;
1778
1779 return 0;
1780 }
1781
1782 /**
1783 * ixgbe_free_tx_resources - Free Tx Resources per Queue
1784 * @adapter: board private structure
1785 * @tx_ring: Tx descriptor ring for a specific queue
1786 *
1787 * Free all transmit software resources
1788 **/
1789 static void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
1790 struct ixgbe_ring *tx_ring)
1791 {
1792 struct pci_dev *pdev = adapter->pdev;
1793
1794 ixgbe_clean_tx_ring(adapter, tx_ring);
1795
1796 vfree(tx_ring->tx_buffer_info);
1797 tx_ring->tx_buffer_info = NULL;
1798
1799 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1800
1801 tx_ring->desc = NULL;
1802 }
1803
1804 /**
1805 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
1806 * @adapter: board private structure
1807 *
1808 * Free all transmit software resources
1809 **/
1810 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
1811 {
1812 int i;
1813
1814 for (i = 0; i < adapter->num_tx_queues; i++)
1815 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
1816 }
1817
1818 /**
1819 * ixgbe_free_rx_resources - Free Rx Resources
1820 * @adapter: board private structure
1821 * @rx_ring: ring to clean the resources from
1822 *
1823 * Free all receive software resources
1824 **/
1825 static void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
1826 struct ixgbe_ring *rx_ring)
1827 {
1828 struct pci_dev *pdev = adapter->pdev;
1829
1830 ixgbe_clean_rx_ring(adapter, rx_ring);
1831
1832 vfree(rx_ring->rx_buffer_info);
1833 rx_ring->rx_buffer_info = NULL;
1834
1835 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1836
1837 rx_ring->desc = NULL;
1838 }
1839
1840 /**
1841 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
1842 * @adapter: board private structure
1843 *
1844 * Free all receive software resources
1845 **/
1846 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
1847 {
1848 int i;
1849
1850 for (i = 0; i < adapter->num_rx_queues; i++)
1851 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
1852 }
1853
1854 /**
1855 * ixgbe_setup_all_tx_resources - wrapper to allocate Tx resources
1856 * (Descriptors) for all queues
1857 * @adapter: board private structure
1858 *
1859 * If this function returns with an error, then it's possible one or
1860 * more of the rings is populated (while the rest are not). It is the
1861 * callers duty to clean those orphaned rings.
1862 *
1863 * Return 0 on success, negative on failure
1864 **/
1865 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
1866 {
1867 int i, err = 0;
1868
1869 for (i = 0; i < adapter->num_tx_queues; i++) {
1870 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1871 if (err) {
1872 DPRINTK(PROBE, ERR,
1873 "Allocation for Tx Queue %u failed\n", i);
1874 break;
1875 }
1876 }
1877
1878 return err;
1879 }
1880
1881 /**
1882 * ixgbe_setup_all_rx_resources - wrapper to allocate Rx resources
1883 * (Descriptors) for all queues
1884 * @adapter: board private structure
1885 *
1886 * If this function returns with an error, then it's possible one or
1887 * more of the rings is populated (while the rest are not). It is the
1888 * callers duty to clean those orphaned rings.
1889 *
1890 * Return 0 on success, negative on failure
1891 **/
1892
1893 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
1894 {
1895 int i, err = 0;
1896
1897 for (i = 0; i < adapter->num_rx_queues; i++) {
1898 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1899 if (err) {
1900 DPRINTK(PROBE, ERR,
1901 "Allocation for Rx Queue %u failed\n", i);
1902 break;
1903 }
1904 }
1905
1906 return err;
1907 }
1908
1909 /**
1910 * ixgbe_change_mtu - Change the Maximum Transfer Unit
1911 * @netdev: network interface device structure
1912 * @new_mtu: new value for maximum frame size
1913 *
1914 * Returns 0 on success, negative on failure
1915 **/
1916 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
1917 {
1918 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1919 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
1920
1921 if ((max_frame < (ETH_ZLEN + ETH_FCS_LEN)) ||
1922 (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
1923 return -EINVAL;
1924
1925 netdev->mtu = new_mtu;
1926
1927 if (netif_running(netdev))
1928 ixgbe_reinit_locked(adapter);
1929
1930 return 0;
1931 }
1932
1933 /**
1934 * ixgbe_open - Called when a network interface is made active
1935 * @netdev: network interface device structure
1936 *
1937 * Returns 0 on success, negative value on failure
1938 *
1939 * The open entry point is called when a network interface is made
1940 * active by the system (IFF_UP). At this point all resources needed
1941 * for transmit and receive operations are allocated, the interrupt
1942 * handler is registered with the OS, the watchdog timer is started,
1943 * and the stack is notified that the interface is ready.
1944 **/
1945 static int ixgbe_open(struct net_device *netdev)
1946 {
1947 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1948 int err;
1949 u32 num_rx_queues = adapter->num_rx_queues;
1950
1951 <<<<<<< HEAD:drivers/net/ixgbe/ixgbe_main.c
1952 =======
1953 /* disallow open during test */
1954 if (test_bit(__IXGBE_TESTING, &adapter->state))
1955 return -EBUSY;
1956
1957 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/net/ixgbe/ixgbe_main.c
1958 try_intr_reinit:
1959 /* allocate transmit descriptors */
1960 err = ixgbe_setup_all_tx_resources(adapter);
1961 if (err)
1962 goto err_setup_tx;
1963
1964 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
1965 num_rx_queues = 1;
1966 adapter->num_rx_queues = num_rx_queues;
1967 }
1968
1969 /* allocate receive descriptors */
1970 err = ixgbe_setup_all_rx_resources(adapter);
1971 if (err)
1972 goto err_setup_rx;
1973
1974 ixgbe_configure(adapter);
1975
1976 err = ixgbe_request_irq(adapter, &num_rx_queues);
1977 if (err)
1978 goto err_req_irq;
1979
1980 /* ixgbe_request might have reduced num_rx_queues */
1981 if (num_rx_queues < adapter->num_rx_queues) {
1982 /* We didn't get MSI-X, so we need to release everything,
1983 * set our Rx queue count to num_rx_queues, and redo the
1984 * whole init process.
1985 */
1986 ixgbe_free_irq(adapter);
1987 if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1988 pci_disable_msi(adapter->pdev);
1989 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
1990 }
1991 ixgbe_free_all_rx_resources(adapter);
1992 ixgbe_free_all_tx_resources(adapter);
1993 adapter->num_rx_queues = num_rx_queues;
1994
1995 /* Reset the hardware, and start over. */
1996 ixgbe_reset(adapter);
1997
1998 goto try_intr_reinit;
1999 }
2000
2001 err = ixgbe_up_complete(adapter);
2002 if (err)
2003 goto err_up;
2004
2005 return 0;
2006
2007 err_up:
2008 ixgbe_release_hw_control(adapter);
2009 ixgbe_free_irq(adapter);
2010 err_req_irq:
2011 ixgbe_free_all_rx_resources(adapter);
2012 err_setup_rx:
2013 ixgbe_free_all_tx_resources(adapter);
2014 err_setup_tx:
2015 ixgbe_reset(adapter);
2016
2017 return err;
2018 }
2019
2020 /**
2021 * ixgbe_close - Disables a network interface
2022 * @netdev: network interface device structure
2023 *
2024 * Returns 0, this is not allowed to fail
2025 *
2026 * The close entry point is called when an interface is de-activated
2027 * by the OS. The hardware is still under the drivers control, but
2028 * needs to be disabled. A global MAC reset is issued to stop the
2029 * hardware, and all transmit and receive resources are freed.
2030 **/
2031 static int ixgbe_close(struct net_device *netdev)
2032 {
2033 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2034
2035 ixgbe_down(adapter);
2036 ixgbe_free_irq(adapter);
2037
2038 ixgbe_free_all_tx_resources(adapter);
2039 ixgbe_free_all_rx_resources(adapter);
2040
2041 ixgbe_release_hw_control(adapter);
2042
2043 return 0;
2044 }
2045
2046 /**
2047 * ixgbe_update_stats - Update the board statistics counters.
2048 * @adapter: board private structure
2049 **/
2050 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
2051 {
2052 struct ixgbe_hw *hw = &adapter->hw;
2053 u64 total_mpc = 0;
2054 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
2055
2056 adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
2057 for (i = 0; i < 8; i++) {
2058 /* for packet buffers not used, the register should read 0 */
2059 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
2060 missed_rx += mpc;
2061 adapter->stats.mpc[i] += mpc;
2062 total_mpc += adapter->stats.mpc[i];
2063 adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
2064 }
2065 adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
2066 /* work around hardware counting issue */
2067 adapter->stats.gprc -= missed_rx;
2068
2069 /* 82598 hardware only has a 32 bit counter in the high register */
2070 adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
2071 adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
2072 adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
2073 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
2074 adapter->stats.bprc += bprc;
2075 adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
2076 adapter->stats.mprc -= bprc;
2077 adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
2078 adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
2079 adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
2080 adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
2081 adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
2082 adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
2083 adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
2084 adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
2085 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
2086 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
2087 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
2088 adapter->stats.lxontxc += lxon;
2089 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
2090 adapter->stats.lxofftxc += lxoff;
2091 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2092 adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
2093 adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
2094 /*
2095 * 82598 errata - tx of flow control packets is included in tx counters
2096 */
2097 xon_off_tot = lxon + lxoff;
2098 adapter->stats.gptc -= xon_off_tot;
2099 adapter->stats.mptc -= xon_off_tot;
2100 adapter->stats.gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
2101 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2102 adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
2103 adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
2104 adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
2105 adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
2106 adapter->stats.ptc64 -= xon_off_tot;
2107 adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
2108 adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
2109 adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
2110 adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
2111 adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
2112 adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
2113
2114 /* Fill out the OS statistics structure */
2115 adapter->net_stats.multicast = adapter->stats.mprc;
2116
2117 /* Rx Errors */
2118 adapter->net_stats.rx_errors = adapter->stats.crcerrs +
2119 adapter->stats.rlec;
2120 adapter->net_stats.rx_dropped = 0;
2121 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
2122 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
2123 adapter->net_stats.rx_missed_errors = total_mpc;
2124 }
2125
2126 /**
2127 * ixgbe_watchdog - Timer Call-back
2128 * @data: pointer to adapter cast into an unsigned long
2129 **/
2130 static void ixgbe_watchdog(unsigned long data)
2131 {
2132 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
2133 struct net_device *netdev = adapter->netdev;
2134 bool link_up;
2135 u32 link_speed = 0;
2136
2137 adapter->hw.mac.ops.check_link(&adapter->hw, &(link_speed), &link_up);
2138
2139 if (link_up) {
2140 if (!netif_carrier_ok(netdev)) {
2141 u32 frctl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
2142 u32 rmcs = IXGBE_READ_REG(&adapter->hw, IXGBE_RMCS);
2143 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
2144 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
2145 DPRINTK(LINK, INFO, "NIC Link is Up %s, "
2146 "Flow Control: %s\n",
2147 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
2148 "10 Gbps" :
2149 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
2150 <<<<<<< HEAD:drivers/net/ixgbe/ixgbe_main.c
2151 "1 Gpbs" : "unknown speed")),
2152 =======
2153 "1 Gbps" : "unknown speed")),
2154 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/net/ixgbe/ixgbe_main.c
2155 ((FLOW_RX && FLOW_TX) ? "RX/TX" :
2156 (FLOW_RX ? "RX" :
2157 (FLOW_TX ? "TX" : "None"))));
2158
2159 netif_carrier_on(netdev);
2160 netif_wake_queue(netdev);
2161 } else {
2162 /* Force detection of hung controller */
2163 adapter->detect_tx_hung = true;
2164 }
2165 } else {
2166 if (netif_carrier_ok(netdev)) {
2167 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2168 netif_carrier_off(netdev);
2169 netif_stop_queue(netdev);
2170 }
2171 }
2172
2173 ixgbe_update_stats(adapter);
2174
2175 /* Reset the timer */
2176 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2177 mod_timer(&adapter->watchdog_timer,
2178 round_jiffies(jiffies + 2 * HZ));
2179 }
2180
2181 static int ixgbe_tso(struct ixgbe_adapter *adapter,
2182 struct ixgbe_ring *tx_ring, struct sk_buff *skb,
2183 u32 tx_flags, u8 *hdr_len)
2184 {
2185 struct ixgbe_adv_tx_context_desc *context_desc;
2186 unsigned int i;
2187 int err;
2188 struct ixgbe_tx_buffer *tx_buffer_info;
2189 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2190 u32 mss_l4len_idx = 0, l4len;
2191 *hdr_len = 0;
2192
2193 if (skb_is_gso(skb)) {
2194 if (skb_header_cloned(skb)) {
2195 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2196 if (err)
2197 return err;
2198 }
2199 l4len = tcp_hdrlen(skb);
2200 *hdr_len += l4len;
2201
2202 if (skb->protocol == htons(ETH_P_IP)) {
2203 struct iphdr *iph = ip_hdr(skb);
2204 iph->tot_len = 0;
2205 iph->check = 0;
2206 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2207 iph->daddr, 0,
2208 IPPROTO_TCP,
2209 0);
2210 adapter->hw_tso_ctxt++;
2211 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2212 ipv6_hdr(skb)->payload_len = 0;
2213 tcp_hdr(skb)->check =
2214 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2215 &ipv6_hdr(skb)->daddr,
2216 0, IPPROTO_TCP, 0);
2217 adapter->hw_tso6_ctxt++;
2218 }
2219
2220 i = tx_ring->next_to_use;
2221
2222 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2223 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2224
2225 /* VLAN MACLEN IPLEN */
2226 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2227 vlan_macip_lens |=
2228 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2229 vlan_macip_lens |= ((skb_network_offset(skb)) <<
2230 IXGBE_ADVTXD_MACLEN_SHIFT);
2231 *hdr_len += skb_network_offset(skb);
2232 vlan_macip_lens |=
2233 (skb_transport_header(skb) - skb_network_header(skb));
2234 *hdr_len +=
2235 (skb_transport_header(skb) - skb_network_header(skb));
2236 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2237 context_desc->seqnum_seed = 0;
2238
2239 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2240 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2241 IXGBE_ADVTXD_DTYP_CTXT);
2242
2243 if (skb->protocol == htons(ETH_P_IP))
2244 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2245 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2246 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2247
2248 /* MSS L4LEN IDX */
2249 mss_l4len_idx |=
2250 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
2251 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
2252 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2253
2254 tx_buffer_info->time_stamp = jiffies;
2255 tx_buffer_info->next_to_watch = i;
2256
2257 i++;
2258 if (i == tx_ring->count)
2259 i = 0;
2260 tx_ring->next_to_use = i;
2261
2262 return true;
2263 }
2264 return false;
2265 }
2266
2267 static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
2268 struct ixgbe_ring *tx_ring,
2269 struct sk_buff *skb, u32 tx_flags)
2270 {
2271 struct ixgbe_adv_tx_context_desc *context_desc;
2272 unsigned int i;
2273 struct ixgbe_tx_buffer *tx_buffer_info;
2274 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2275
2276 if (skb->ip_summed == CHECKSUM_PARTIAL ||
2277 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
2278 i = tx_ring->next_to_use;
2279 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2280 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2281
2282 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2283 vlan_macip_lens |=
2284 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2285 vlan_macip_lens |= (skb_network_offset(skb) <<
2286 IXGBE_ADVTXD_MACLEN_SHIFT);
2287 if (skb->ip_summed == CHECKSUM_PARTIAL)
2288 vlan_macip_lens |= (skb_transport_header(skb) -
2289 skb_network_header(skb));
2290
2291 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2292 context_desc->seqnum_seed = 0;
2293
2294 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2295 IXGBE_ADVTXD_DTYP_CTXT);
2296
2297 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2298 <<<<<<< HEAD:drivers/net/ixgbe/ixgbe_main.c
2299 if (skb->protocol == htons(ETH_P_IP))
2300 =======
2301 switch (skb->protocol) {
2302 case __constant_htons(ETH_P_IP):
2303 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/net/ixgbe/ixgbe_main.c
2304 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2305 <<<<<<< HEAD:drivers/net/ixgbe/ixgbe_main.c
2306 =======
2307 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2308 type_tucmd_mlhl |=
2309 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2310 break;
2311
2312 case __constant_htons(ETH_P_IPV6):
2313 /* XXX what about other V6 headers?? */
2314 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2315 type_tucmd_mlhl |=
2316 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2317 break;
2318 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/net/ixgbe/ixgbe_main.c
2319
2320 <<<<<<< HEAD:drivers/net/ixgbe/ixgbe_main.c
2321 if (skb->sk->sk_protocol == IPPROTO_TCP)
2322 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2323 =======
2324 default:
2325 if (unlikely(net_ratelimit())) {
2326 DPRINTK(PROBE, WARNING,
2327 "partial checksum but proto=%x!\n",
2328 skb->protocol);
2329 }
2330 break;
2331 }
2332 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/net/ixgbe/ixgbe_main.c
2333 }
2334
2335 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2336 context_desc->mss_l4len_idx = 0;
2337
2338 tx_buffer_info->time_stamp = jiffies;
2339 tx_buffer_info->next_to_watch = i;
2340 adapter->hw_csum_tx_good++;
2341 i++;
2342 if (i == tx_ring->count)
2343 i = 0;
2344 tx_ring->next_to_use = i;
2345
2346 return true;
2347 }
2348 return false;
2349 }
2350
2351 static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
2352 struct ixgbe_ring *tx_ring,
2353 struct sk_buff *skb, unsigned int first)
2354 {
2355 struct ixgbe_tx_buffer *tx_buffer_info;
2356 unsigned int len = skb->len;
2357 unsigned int offset = 0, size, count = 0, i;
2358 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2359 unsigned int f;
2360
2361 len -= skb->data_len;
2362
2363 i = tx_ring->next_to_use;
2364
2365 while (len) {
2366 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2367 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
2368
2369 tx_buffer_info->length = size;
2370 tx_buffer_info->dma = pci_map_single(adapter->pdev,
2371 skb->data + offset,
2372 size, PCI_DMA_TODEVICE);
2373 tx_buffer_info->time_stamp = jiffies;
2374 tx_buffer_info->next_to_watch = i;
2375
2376 len -= size;
2377 offset += size;
2378 count++;
2379 i++;
2380 if (i == tx_ring->count)
2381 i = 0;
2382 }
2383
2384 for (f = 0; f < nr_frags; f++) {
2385 struct skb_frag_struct *frag;
2386
2387 frag = &skb_shinfo(skb)->frags[f];
2388 len = frag->size;
2389 offset = frag->page_offset;
2390
2391 while (len) {
2392 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2393 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
2394
2395 tx_buffer_info->length = size;
2396 tx_buffer_info->dma = pci_map_page(adapter->pdev,
2397 frag->page,
2398 offset,
2399 size, PCI_DMA_TODEVICE);
2400 tx_buffer_info->time_stamp = jiffies;
2401 tx_buffer_info->next_to_watch = i;
2402
2403 len -= size;
2404 offset += size;
2405 count++;
2406 i++;
2407 if (i == tx_ring->count)
2408 i = 0;
2409 }
2410 }
2411 if (i == 0)
2412 i = tx_ring->count - 1;
2413 else
2414 i = i - 1;
2415 tx_ring->tx_buffer_info[i].skb = skb;
2416 tx_ring->tx_buffer_info[first].next_to_watch = i;
2417
2418 return count;
2419 }
2420
2421 static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
2422 struct ixgbe_ring *tx_ring,
2423 int tx_flags, int count, u32 paylen, u8 hdr_len)
2424 {
2425 union ixgbe_adv_tx_desc *tx_desc = NULL;
2426 struct ixgbe_tx_buffer *tx_buffer_info;
2427 u32 olinfo_status = 0, cmd_type_len = 0;
2428 unsigned int i;
2429 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
2430
2431 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
2432
2433 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
2434
2435 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2436 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
2437
2438 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
2439 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
2440
2441 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
2442 IXGBE_ADVTXD_POPTS_SHIFT;
2443
2444 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
2445 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
2446 IXGBE_ADVTXD_POPTS_SHIFT;
2447
2448 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
2449 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
2450 IXGBE_ADVTXD_POPTS_SHIFT;
2451
2452 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
2453
2454 i = tx_ring->next_to_use;
2455 while (count--) {
2456 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2457 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
2458 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
2459 tx_desc->read.cmd_type_len =
2460 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
2461 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2462
2463 i++;
2464 if (i == tx_ring->count)
2465 i = 0;
2466 }
2467
2468 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
2469
2470 /*
2471 * Force memory writes to complete before letting h/w
2472 * know there are new descriptors to fetch. (Only
2473 * applicable for weak-ordered memory model archs,
2474 * such as IA-64).
2475 */
2476 wmb();
2477
2478 tx_ring->next_to_use = i;
2479 writel(i, adapter->hw.hw_addr + tx_ring->tail);
2480 }
2481
2482 static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
2483 struct ixgbe_ring *tx_ring, int size)
2484 {
2485 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2486
2487 netif_stop_queue(netdev);
2488 /* Herbert's original patch had:
2489 * smp_mb__after_netif_stop_queue();
2490 * but since that doesn't exist yet, just open code it. */
2491 smp_mb();
2492
2493 /* We need to check again in a case another CPU has just
2494 * made room available. */
2495 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
2496 return -EBUSY;
2497
2498 /* A reprieve! - use start_queue because it doesn't call schedule */
2499 netif_wake_queue(netdev);
2500 ++adapter->restart_queue;
2501 return 0;
2502 }
2503
2504 static int ixgbe_maybe_stop_tx(struct net_device *netdev,
2505 struct ixgbe_ring *tx_ring, int size)
2506 {
2507 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
2508 return 0;
2509 return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
2510 }
2511
2512
2513 static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2514 {
2515 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2516 struct ixgbe_ring *tx_ring;
2517 unsigned int len = skb->len;
2518 unsigned int first;
2519 unsigned int tx_flags = 0;
2520 u8 hdr_len;
2521 int tso;
2522 unsigned int mss = 0;
2523 int count = 0;
2524 unsigned int f;
2525 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2526 len -= skb->data_len;
2527
2528 tx_ring = adapter->tx_ring;
2529
2530 if (skb->len <= 0) {
2531 dev_kfree_skb(skb);
2532 return NETDEV_TX_OK;
2533 }
2534 mss = skb_shinfo(skb)->gso_size;
2535
2536 if (mss)
2537 count++;
2538 else if (skb->ip_summed == CHECKSUM_PARTIAL)
2539 count++;
2540
2541 count += TXD_USE_COUNT(len);
2542 for (f = 0; f < nr_frags; f++)
2543 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
2544
2545 if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
2546 adapter->tx_busy++;
2547 return NETDEV_TX_BUSY;
2548 }
2549 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2550 tx_flags |= IXGBE_TX_FLAGS_VLAN;
2551 tx_flags |= (vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT);
2552 }
2553
2554 if (skb->protocol == htons(ETH_P_IP))
2555 tx_flags |= IXGBE_TX_FLAGS_IPV4;
2556 first = tx_ring->next_to_use;
2557 tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
2558 if (tso < 0) {
2559 dev_kfree_skb_any(skb);
2560 return NETDEV_TX_OK;
2561 }
2562
2563 if (tso)
2564 tx_flags |= IXGBE_TX_FLAGS_TSO;
2565 else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
2566 (skb->ip_summed == CHECKSUM_PARTIAL))
2567 tx_flags |= IXGBE_TX_FLAGS_CSUM;
2568
2569 ixgbe_tx_queue(adapter, tx_ring, tx_flags,
2570 ixgbe_tx_map(adapter, tx_ring, skb, first),
2571 skb->len, hdr_len);
2572
2573 netdev->trans_start = jiffies;
2574
2575 ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
2576
2577 return NETDEV_TX_OK;
2578 }
2579
2580 /**
2581 * ixgbe_get_stats - Get System Network Statistics
2582 * @netdev: network interface device structure
2583 *
2584 * Returns the address of the device statistics structure.
2585 * The statistics are actually updated from the timer callback.
2586 **/
2587 static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
2588 {
2589 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2590
2591 /* only return the current stats */
2592 return &adapter->net_stats;
2593 }
2594
2595 /**
2596 * ixgbe_set_mac - Change the Ethernet Address of the NIC
2597 * @netdev: network interface device structure
2598 * @p: pointer to an address structure
2599 *
2600 * Returns 0 on success, negative on failure
2601 **/
2602 static int ixgbe_set_mac(struct net_device *netdev, void *p)
2603 {
2604 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2605 struct sockaddr *addr = p;
2606
2607 if (!is_valid_ether_addr(addr->sa_data))
2608 return -EADDRNOTAVAIL;
2609
2610 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2611 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2612
2613 ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
2614
2615 return 0;
2616 }
2617
2618 #ifdef CONFIG_NET_POLL_CONTROLLER
2619 /*
2620 * Polling 'interrupt' - used by things like netconsole to send skbs
2621 * without having to re-enable interrupts. It's not called while
2622 * the interrupt routine is executing.
2623 */
2624 static void ixgbe_netpoll(struct net_device *netdev)
2625 {
2626 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2627
2628 disable_irq(adapter->pdev->irq);
2629 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
2630 ixgbe_intr(adapter->pdev->irq, netdev);
2631 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
2632 enable_irq(adapter->pdev->irq);
2633 }
2634 #endif
2635
2636 /**
2637 * ixgbe_probe - Device Initialization Routine
2638 * @pdev: PCI device information struct
2639 * @ent: entry in ixgbe_pci_tbl
2640 *
2641 * Returns 0 on success, negative on failure
2642 *
2643 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
2644 * The OS initialization, configuring of the adapter private structure,
2645 * and a hardware reset occur.
2646 **/
2647 static int __devinit ixgbe_probe(struct pci_dev *pdev,
2648 const struct pci_device_id *ent)
2649 {
2650 struct net_device *netdev;
2651 struct ixgbe_adapter *adapter = NULL;
2652 struct ixgbe_hw *hw;
2653 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
2654 unsigned long mmio_start, mmio_len;
2655 static int cards_found;
2656 int i, err, pci_using_dac;
2657 u16 link_status, link_speed, link_width;
2658 u32 part_num;
2659
2660 err = pci_enable_device(pdev);
2661 if (err)
2662 return err;
2663
2664 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
2665 !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
2666 pci_using_dac = 1;
2667 } else {
2668 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
2669 if (err) {
2670 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
2671 if (err) {
2672 dev_err(&pdev->dev, "No usable DMA "
2673 "configuration, aborting\n");
2674 goto err_dma;
2675 }
2676 }
2677 pci_using_dac = 0;
2678 }
2679
2680 err = pci_request_regions(pdev, ixgbe_driver_name);
2681 if (err) {
2682 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
2683 goto err_pci_reg;
2684 }
2685
2686 pci_set_master(pdev);
2687
2688 netdev = alloc_etherdev(sizeof(struct ixgbe_adapter));
2689 if (!netdev) {
2690 err = -ENOMEM;
2691 goto err_alloc_etherdev;
2692 }
2693
2694 SET_NETDEV_DEV(netdev, &pdev->dev);
2695
2696 pci_set_drvdata(pdev, netdev);
2697 adapter = netdev_priv(netdev);
2698
2699 adapter->netdev = netdev;
2700 adapter->pdev = pdev;
2701 hw = &adapter->hw;
2702 hw->back = adapter;
2703 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
2704
2705 mmio_start = pci_resource_start(pdev, 0);
2706 mmio_len = pci_resource_len(pdev, 0);
2707
2708 hw->hw_addr = ioremap(mmio_start, mmio_len);
2709 if (!hw->hw_addr) {
2710 err = -EIO;
2711 goto err_ioremap;
2712 }
2713
2714 for (i = 1; i <= 5; i++) {
2715 if (pci_resource_len(pdev, i) == 0)
2716 continue;
2717 }
2718
2719 netdev->open = &ixgbe_open;
2720 netdev->stop = &ixgbe_close;
2721 netdev->hard_start_xmit = &ixgbe_xmit_frame;
2722 netdev->get_stats = &ixgbe_get_stats;
2723 netdev->set_multicast_list = &ixgbe_set_multi;
2724 netdev->set_mac_address = &ixgbe_set_mac;
2725 netdev->change_mtu = &ixgbe_change_mtu;
2726 ixgbe_set_ethtool_ops(netdev);
2727 netdev->tx_timeout = &ixgbe_tx_timeout;
2728 netdev->watchdog_timeo = 5 * HZ;
2729 netif_napi_add(netdev, &adapter->napi, ixgbe_clean, 64);
2730 netdev->vlan_rx_register = ixgbe_vlan_rx_register;
2731 netdev->vlan_rx_add_vid = ixgbe_vlan_rx_add_vid;
2732 netdev->vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid;
2733 #ifdef CONFIG_NET_POLL_CONTROLLER
2734 netdev->poll_controller = ixgbe_netpoll;
2735 #endif
2736 strcpy(netdev->name, pci_name(pdev));
2737
2738 netdev->mem_start = mmio_start;
2739 netdev->mem_end = mmio_start + mmio_len;
2740
2741 adapter->bd_number = cards_found;
2742
2743 /* PCI config space info */
2744 hw->vendor_id = pdev->vendor;
2745 hw->device_id = pdev->device;
2746 hw->revision_id = pdev->revision;
2747 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2748 hw->subsystem_device_id = pdev->subsystem_device;
2749
2750 /* Setup hw api */
2751 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
2752
2753 err = ii->get_invariants(hw);
2754 if (err)
2755 goto err_hw_init;
2756
2757 /* setup the private structure */
2758 err = ixgbe_sw_init(adapter);
2759 if (err)
2760 goto err_sw_init;
2761
2762 netdev->features = NETIF_F_SG |
2763 NETIF_F_HW_CSUM |
2764 NETIF_F_HW_VLAN_TX |
2765 NETIF_F_HW_VLAN_RX |
2766 NETIF_F_HW_VLAN_FILTER;
2767
2768 netdev->features |= NETIF_F_TSO;
2769
2770 netdev->features |= NETIF_F_TSO6;
2771 if (pci_using_dac)
2772 netdev->features |= NETIF_F_HIGHDMA;
2773
2774
2775 /* make sure the EEPROM is good */
2776 if (ixgbe_validate_eeprom_checksum(hw, NULL) < 0) {
2777 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
2778 err = -EIO;
2779 goto err_eeprom;
2780 }
2781
2782 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
2783 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
2784
2785 if (ixgbe_validate_mac_addr(netdev->dev_addr)) {
2786 err = -EIO;
2787 goto err_eeprom;
2788 }
2789
2790 init_timer(&adapter->watchdog_timer);
2791 adapter->watchdog_timer.function = &ixgbe_watchdog;
2792 adapter->watchdog_timer.data = (unsigned long)adapter;
2793
2794 INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
2795
2796 /* initialize default flow control settings */
2797 hw->fc.original_type = ixgbe_fc_full;
2798 hw->fc.type = ixgbe_fc_full;
2799 hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
2800 hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
2801 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
2802
2803 /* Interrupt Throttle Rate */
2804 adapter->rx_eitr = (1000000 / IXGBE_DEFAULT_ITR_RX_USECS);
2805 adapter->tx_eitr = (1000000 / IXGBE_DEFAULT_ITR_TX_USECS);
2806
2807 /* print bus type/speed/width info */
2808 pci_read_config_word(pdev, IXGBE_PCI_LINK_STATUS, &link_status);
2809 link_speed = link_status & IXGBE_PCI_LINK_SPEED;
2810 link_width = link_status & IXGBE_PCI_LINK_WIDTH;
2811 dev_info(&pdev->dev, "(PCI Express:%s:%s) "
2812 "%02x:%02x:%02x:%02x:%02x:%02x\n",
2813 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" :
2814 (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" :
2815 "Unknown"),
2816 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" :
2817 (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" :
2818 (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" :
2819 (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" :
2820 "Unknown"),
2821 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
2822 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
2823 ixgbe_read_part_num(hw, &part_num);
2824 dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
2825 hw->mac.type, hw->phy.type,
2826 (part_num >> 8), (part_num & 0xff));
2827
2828 <<<<<<< HEAD:drivers/net/ixgbe/ixgbe_main.c
2829 =======
2830 if (link_width <= IXGBE_PCI_LINK_WIDTH_4) {
2831 dev_warn(&pdev->dev, "PCI-Express bandwidth available for "
2832 "this card is not sufficient for optimal "
2833 "performance.\n");
2834 dev_warn(&pdev->dev, "For optimal performance a x8 "
2835 "PCI-Express slot is required.\n");
2836 }
2837
2838 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/net/ixgbe/ixgbe_main.c
2839 /* reset the hardware with the new settings */
2840 ixgbe_start_hw(hw);
2841
2842 netif_carrier_off(netdev);
2843 netif_stop_queue(netdev);
2844
2845 strcpy(netdev->name, "eth%d");
2846 err = register_netdev(netdev);
2847 if (err)
2848 goto err_register;
2849
2850
2851 dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
2852 cards_found++;
2853 return 0;
2854
2855 err_register:
2856 ixgbe_release_hw_control(adapter);
2857 err_hw_init:
2858 err_sw_init:
2859 err_eeprom:
2860 iounmap(hw->hw_addr);
2861 err_ioremap:
2862 free_netdev(netdev);
2863 err_alloc_etherdev:
2864 pci_release_regions(pdev);
2865 err_pci_reg:
2866 err_dma:
2867 pci_disable_device(pdev);
2868 return err;
2869 }
2870
2871 /**
2872 * ixgbe_remove - Device Removal Routine
2873 * @pdev: PCI device information struct
2874 *
2875 * ixgbe_remove is called by the PCI subsystem to alert the driver
2876 * that it should release a PCI device. The could be caused by a
2877 * Hot-Plug event, or because the driver is going to be removed from
2878 * memory.
2879 **/
2880 static void __devexit ixgbe_remove(struct pci_dev *pdev)
2881 {
2882 struct net_device *netdev = pci_get_drvdata(pdev);
2883 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2884
2885 set_bit(__IXGBE_DOWN, &adapter->state);
2886 del_timer_sync(&adapter->watchdog_timer);
2887
2888 flush_scheduled_work();
2889
2890 unregister_netdev(netdev);
2891
2892 ixgbe_release_hw_control(adapter);
2893
2894 kfree(adapter->tx_ring);
2895 kfree(adapter->rx_ring);
2896
2897 iounmap(adapter->hw.hw_addr);
2898 pci_release_regions(pdev);
2899
2900 free_netdev(netdev);
2901
2902 pci_disable_device(pdev);
2903 }
2904
2905 /**
2906 * ixgbe_io_error_detected - called when PCI error is detected
2907 * @pdev: Pointer to PCI device
2908 * @state: The current pci connection state
2909 *
2910 * This function is called after a PCI bus error affecting
2911 * this device has been detected.
2912 */
2913 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
2914 pci_channel_state_t state)
2915 {
2916 struct net_device *netdev = pci_get_drvdata(pdev);
2917 struct ixgbe_adapter *adapter = netdev->priv;
2918
2919 netif_device_detach(netdev);
2920
2921 if (netif_running(netdev))
2922 ixgbe_down(adapter);
2923 pci_disable_device(pdev);
2924
2925 /* Request a slot slot reset. */
2926 return PCI_ERS_RESULT_NEED_RESET;
2927 }
2928
2929 /**
2930 * ixgbe_io_slot_reset - called after the pci bus has been reset.
2931 * @pdev: Pointer to PCI device
2932 *
2933 * Restart the card from scratch, as if from a cold-boot.
2934 */
2935 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
2936 {
2937 struct net_device *netdev = pci_get_drvdata(pdev);
2938 struct ixgbe_adapter *adapter = netdev->priv;
2939
2940 if (pci_enable_device(pdev)) {
2941 DPRINTK(PROBE, ERR,
2942 "Cannot re-enable PCI device after reset.\n");
2943 return PCI_ERS_RESULT_DISCONNECT;
2944 }
2945 pci_set_master(pdev);
2946
2947 pci_enable_wake(pdev, PCI_D3hot, 0);
2948 pci_enable_wake(pdev, PCI_D3cold, 0);
2949
2950 ixgbe_reset(adapter);
2951
2952 return PCI_ERS_RESULT_RECOVERED;
2953 }
2954
2955 /**
2956 * ixgbe_io_resume - called when traffic can start flowing again.
2957 * @pdev: Pointer to PCI device
2958 *
2959 * This callback is called when the error recovery driver tells us that
2960 * its OK to resume normal operation.
2961 */
2962 static void ixgbe_io_resume(struct pci_dev *pdev)
2963 {
2964 struct net_device *netdev = pci_get_drvdata(pdev);
2965 struct ixgbe_adapter *adapter = netdev->priv;
2966
2967 if (netif_running(netdev)) {
2968 if (ixgbe_up(adapter)) {
2969 DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
2970 return;
2971 }
2972 }
2973
2974 netif_device_attach(netdev);
2975
2976 }
2977
2978 static struct pci_error_handlers ixgbe_err_handler = {
2979 .error_detected = ixgbe_io_error_detected,
2980 .slot_reset = ixgbe_io_slot_reset,
2981 .resume = ixgbe_io_resume,
2982 };
2983
2984 static struct pci_driver ixgbe_driver = {
2985 .name = ixgbe_driver_name,
2986 .id_table = ixgbe_pci_tbl,
2987 .probe = ixgbe_probe,
2988 .remove = __devexit_p(ixgbe_remove),
2989 #ifdef CONFIG_PM
2990 .suspend = ixgbe_suspend,
2991 .resume = ixgbe_resume,
2992 #endif
2993 .shutdown = ixgbe_shutdown,
2994 .err_handler = &ixgbe_err_handler
2995 };
2996
2997 /**
2998 * ixgbe_init_module - Driver Registration Routine
2999 *
3000 * ixgbe_init_module is the first routine called when the driver is
3001 * loaded. All it does is register with the PCI subsystem.
3002 **/
3003 static int __init ixgbe_init_module(void)
3004 {
3005 int ret;
3006 printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
3007 ixgbe_driver_string, ixgbe_driver_version);
3008
3009 printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
3010
3011 ret = pci_register_driver(&ixgbe_driver);
3012 return ret;
3013 }
3014 module_init(ixgbe_init_module);
3015
3016 /**
3017 * ixgbe_exit_module - Driver Exit Cleanup Routine
3018 *
3019 * ixgbe_exit_module is called just before the driver is removed
3020 * from memory.
3021 **/
3022 static void __exit ixgbe_exit_module(void)
3023 {
3024 pci_unregister_driver(&ixgbe_driver);
3025 }
3026 module_exit(ixgbe_exit_module);
3027
3028 /* ixgbe_main.c */
WRT350N Kernel Patches