2 * Sonics Silicon Backplane
3 * Broadcom EXTIF core driver
5 * Copyright 2005, Broadcom Corporation
6 * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
7 * Copyright 2006, 2007, Felix Fietkau <nbd@openwrt.org>
8 * Copyright 2007, Aurelien Jarno <aurelien@aurel32.net>
10 * Licensed under the GNU/GPL. See COPYING for details.
13 #include <linux/serial.h>
14 #include <linux/serial_core.h>
15 #include <linux/serial_reg.h>
17 #include "ssb_private.h"
20 static inline u32
extif_read32(struct ssb_extif
*extif
, u16 offset
)
22 return ssb_read32(extif
->dev
, offset
);
25 static inline void extif_write32(struct ssb_extif
*extif
, u16 offset
, u32 value
)
27 ssb_write32(extif
->dev
, offset
, value
);
30 <<<<<<< HEAD
:drivers
/ssb
/driver_extif
.c
31 static inline void extif_write32_masked(struct ssb_extif
*extif
, u16 offset
,
34 static inline u32
extif_write32_masked(struct ssb_extif
*extif
, u16 offset
,
36 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/ssb
/driver_extif
.c
39 value
|= extif_read32(extif
, offset
) & ~mask
;
40 extif_write32(extif
, offset
, value
);
41 <<<<<<< HEAD
:drivers
/ssb
/driver_extif
.c
45 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/ssb
/driver_extif
.c
48 #ifdef CONFIG_SSB_SERIAL
49 static bool serial_exists(u8
*regs
)
54 save_mcr
= regs
[UART_MCR
];
55 regs
[UART_MCR
] = (UART_MCR_LOOP
| UART_MCR_OUT2
| UART_MCR_RTS
);
56 msr
= regs
[UART_MSR
] & (UART_MSR_DCD
| UART_MSR_RI
57 | UART_MSR_CTS
| UART_MSR_DSR
);
58 regs
[UART_MCR
] = save_mcr
;
60 return (msr
== (UART_MSR_DCD
| UART_MSR_CTS
));
63 int ssb_extif_serial_init(struct ssb_extif
*extif
, struct ssb_serial_port
*ports
)
67 /* Disable GPIO interrupt initially */
68 extif_write32(extif
, SSB_EXTIF_GPIO_INTPOL
, 0);
69 extif_write32(extif
, SSB_EXTIF_GPIO_INTMASK
, 0);
71 for (i
= 0; i
< 2; i
++) {
72 void __iomem
*uart_regs
;
74 uart_regs
= ioremap_nocache(SSB_EUART
, 16);
78 if (serial_exists(uart_regs
) && ports
) {
79 extif_write32(extif
, SSB_EXTIF_GPIO_INTMASK
, 2);
82 ports
[i
].regs
= uart_regs
;
84 ports
[i
].baud_base
= 13500000;
85 ports
[i
].reg_shift
= 0;
92 #endif /* CONFIG_SSB_SERIAL */
94 void ssb_extif_timing_init(struct ssb_extif
*extif
, unsigned long ns
)
98 /* Initialize extif so we can get to the LEDs and external UART */
99 extif_write32(extif
, SSB_EXTIF_PROG_CFG
, SSB_EXTCFG_EN
);
101 /* Set timing for the flash */
102 tmp
= DIV_ROUND_UP(10, ns
) << SSB_PROG_WCNT_3_SHIFT
;
103 tmp
|= DIV_ROUND_UP(40, ns
) << SSB_PROG_WCNT_1_SHIFT
;
104 tmp
|= DIV_ROUND_UP(120, ns
);
105 extif_write32(extif
, SSB_EXTIF_PROG_WAITCNT
, tmp
);
107 /* Set programmable interface timing for external uart */
108 tmp
= DIV_ROUND_UP(10, ns
) << SSB_PROG_WCNT_3_SHIFT
;
109 tmp
|= DIV_ROUND_UP(20, ns
) << SSB_PROG_WCNT_2_SHIFT
;
110 tmp
|= DIV_ROUND_UP(100, ns
) << SSB_PROG_WCNT_1_SHIFT
;
111 tmp
|= DIV_ROUND_UP(120, ns
);
112 extif_write32(extif
, SSB_EXTIF_PROG_WAITCNT
, tmp
);
115 void ssb_extif_get_clockcontrol(struct ssb_extif
*extif
,
116 u32
*pll_type
, u32
*n
, u32
*m
)
118 *pll_type
= SSB_PLLTYPE_1
;
119 *n
= extif_read32(extif
, SSB_EXTIF_CLOCK_N
);
120 *m
= extif_read32(extif
, SSB_EXTIF_CLOCK_SB
);
123 <<<<<<< HEAD
:drivers
/ssb
/driver_extif
.c
125 void ssb_extif_watchdog_timer_set(struct ssb_extif
*extif
,
128 extif_write32(extif
, SSB_EXTIF_WATCHDOG
, ticks
);
131 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/ssb
/driver_extif
.c
132 u32
ssb_extif_gpio_in(struct ssb_extif
*extif
, u32 mask
)
134 return extif_read32(extif
, SSB_EXTIF_GPIO_IN
) & mask
;
137 <<<<<<< HEAD
:drivers
/ssb
/driver_extif
.c
138 void ssb_extif_gpio_out(struct ssb_extif
*extif
, u32 mask
, u32 value
)
140 u32
ssb_extif_gpio_out(struct ssb_extif
*extif
, u32 mask
, u32 value
)
141 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/ssb
/driver_extif
.c
143 return extif_write32_masked(extif
, SSB_EXTIF_GPIO_OUT(0),
147 <<<<<<< HEAD
:drivers
/ssb
/driver_extif
.c
148 void ssb_extif_gpio_outen(struct ssb_extif
*extif
, u32 mask
, u32 value
)
150 u32
ssb_extif_gpio_outen(struct ssb_extif
*extif
, u32 mask
, u32 value
)
151 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/ssb
/driver_extif
.c
153 return extif_write32_masked(extif
, SSB_EXTIF_GPIO_OUTEN(0),
157 <<<<<<< HEAD
:drivers
/ssb
/driver_extif
.c
159 u32
ssb_extif_gpio_polarity(struct ssb_extif
*extif
, u32 mask
, u32 value
)
161 return extif_write32_masked(extif
, SSB_EXTIF_GPIO_INTPOL
, mask
, value
);
164 u32
ssb_extif_gpio_intmask(struct ssb_extif
*extif
, u32 mask
, u32 value
)
166 return extif_write32_masked(extif
, SSB_EXTIF_GPIO_INTMASK
, mask
, value
);
168 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/ssb
/driver_extif
.c