drivers/ata/pata_hpt3x3.c

   1 /*
   2  *      pata_hpt3x3             -       HPT3x3 driver
   3  *      (c) Copyright 2005-2006 Red Hat
   4  *
   5  *      Was pata_hpt34x but the naming was confusing as it supported the
   6  *      343 and 363 so it has been renamed.
   7  *
   8  *      Based on:
   9  *      linux/drivers/ide/pci/hpt34x.c          Version 0.40    Sept 10, 2002
  10  *      Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
  11  *
  12  *      May be copied or modified under the terms of the GNU General Public
  13  *      License
  14  */
  15
  16 #include <linux/kernel.h>
  17 #include <linux/module.h>
  18 #include <linux/pci.h>
  19 #include <linux/init.h>
  20 #include <linux/blkdev.h>
  21 #include <linux/delay.h>
  22 #include <scsi/scsi_host.h>
  23 #include <linux/libata.h>
  24
  25 #define DRV_NAME        "pata_hpt3x3"
  26 #define DRV_VERSION     "0.5.3"
  27
  28 /**
  29  *      hpt3x3_set_piomode              -       PIO setup
  30  *      @ap: ATA interface
  31  *      @adev: device on the interface
  32  *
  33  *      Set our PIO requirements. This is fairly simple on the HPT3x3 as
  34  *      all we have to do is clear the MWDMA and UDMA bits then load the
  35  *      mode number.
  36  */
  37
  38 static void hpt3x3_set_piomode(struct ata_port *ap, struct ata_device *adev)
  39 {
  40         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  41         u32 r1, r2;
  42         int dn = 2 * ap->port_no + adev->devno;
  43
  44         pci_read_config_dword(pdev, 0x44, &r1);
  45         pci_read_config_dword(pdev, 0x48, &r2);
  46         /* Load the PIO timing number */
  47         r1 &= ~(7 << (3 * dn));
  48         r1 |= (adev->pio_mode - XFER_PIO_0) << (3 * dn);
  49         r2 &= ~(0x11 << dn);    /* Clear MWDMA and UDMA bits */
  50
  51         pci_write_config_dword(pdev, 0x44, r1);
  52         pci_write_config_dword(pdev, 0x48, r2);
  53 }
  54
  55 #if defined(CONFIG_PATA_HPT3X3_DMA)
  56 /**
  57  *      hpt3x3_set_dmamode              -       DMA timing setup
  58  *      @ap: ATA interface
  59  *      @adev: Device being configured
  60  *
  61  *      Set up the channel for MWDMA or UDMA modes. Much the same as with
  62  *      PIO, load the mode number and then set MWDMA or UDMA flag.
  63  *
  64  *      0x44 : bit 0-2 master mode, 3-5 slave mode, etc
  65  *      0x48 : bit 4/0 DMA/UDMA bit 5/1 for slave etc
  66  */
  67
  68 static void hpt3x3_set_dmamode(struct ata_port *ap, struct ata_device *adev)
  69 {
  70         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  71         u32 r1, r2;
  72         int dn = 2 * ap->port_no + adev->devno;
  73         int mode_num = adev->dma_mode & 0x0F;
  74
  75         pci_read_config_dword(pdev, 0x44, &r1);
  76         pci_read_config_dword(pdev, 0x48, &r2);
  77         /* Load the timing number */
  78         r1 &= ~(7 << (3 * dn));
  79         r1 |= (mode_num << (3 * dn));
  80         r2 &= ~(0x11 << dn);    /* Clear MWDMA and UDMA bits */
  81
  82         if (adev->dma_mode >= XFER_UDMA_0)
  83                 r2 |= (0x10 << dn);     /* Ultra mode */
  84         else
  85                 r2 |= (0x01 << dn);     /* MWDMA */
  86
  87         pci_write_config_dword(pdev, 0x44, r1);
  88         pci_write_config_dword(pdev, 0x48, r2);
  89 }
  90 #endif /* CONFIG_PATA_HPT3X3_DMA */
  91
  92 /**
  93  *      hpt3x3_atapi_dma        -       ATAPI DMA check
  94  *      @qc: Queued command
  95  *
  96  *      Just say no - we don't do ATAPI DMA
  97  */
  98
  99 static int hpt3x3_atapi_dma(struct ata_queued_cmd *qc)
 100 {
 101         return 1;
 102 }
 103
 104 static struct scsi_host_template hpt3x3_sht = {
 105         .module                 = THIS_MODULE,
 106         .name                   = DRV_NAME,
 107         .ioctl                  = ata_scsi_ioctl,
 108         .queuecommand           = ata_scsi_queuecmd,
 109         .can_queue              = ATA_DEF_QUEUE,
 110         .this_id                = ATA_SHT_THIS_ID,
 111         .sg_tablesize           = LIBATA_MAX_PRD,
 112         .cmd_per_lun            = ATA_SHT_CMD_PER_LUN,
 113         .emulated               = ATA_SHT_EMULATED,
 114         .use_clustering         = ATA_SHT_USE_CLUSTERING,
 115         .proc_name              = DRV_NAME,
 116         .dma_boundary           = ATA_DMA_BOUNDARY,
 117         .slave_configure        = ata_scsi_slave_config,
 118         .slave_destroy          = ata_scsi_slave_destroy,
 119         .bios_param             = ata_std_bios_param,
 120 };
 121
 122 static struct ata_port_operations hpt3x3_port_ops = {
 123         .set_piomode    = hpt3x3_set_piomode,
 124 #if defined(CONFIG_PATA_HPT3X3_DMA)
 125         .set_dmamode    = hpt3x3_set_dmamode,
 126 #endif
 127         .mode_filter    = ata_pci_default_filter,
 128
 129         .tf_load        = ata_tf_load,
 130         .tf_read        = ata_tf_read,
 131         .check_status   = ata_check_status,
 132         .exec_command   = ata_exec_command,
 133         .dev_select     = ata_std_dev_select,
 134
 135         .freeze         = ata_bmdma_freeze,
 136         .thaw           = ata_bmdma_thaw,
 137         .error_handler  = ata_bmdma_error_handler,
 138         .post_internal_cmd = ata_bmdma_post_internal_cmd,
 139         .cable_detect   = ata_cable_40wire,
 140
 141         .bmdma_setup    = ata_bmdma_setup,
 142         .bmdma_start    = ata_bmdma_start,
 143         .bmdma_stop     = ata_bmdma_stop,
 144         .bmdma_status   = ata_bmdma_status,
 145         .check_atapi_dma= hpt3x3_atapi_dma,
 146
 147         .qc_prep        = ata_qc_prep,
 148         .qc_issue       = ata_qc_issue_prot,
 149
 150         .data_xfer      = ata_data_xfer,
 151
 152         .irq_handler    = ata_interrupt,
 153         .irq_clear      = ata_bmdma_irq_clear,
 154         .irq_on         = ata_irq_on,
 155
 156         .port_start     = ata_sff_port_start,
 157 };
 158
 159 /**
 160  *      hpt3x3_init_chipset     -       chip setup
 161  *      @dev: PCI device
 162  *
 163  *      Perform the setup required at boot and on resume.
 164  */
 165
 166 static void hpt3x3_init_chipset(struct pci_dev *dev)
 167 {
 168         u16 cmd;
 169         /* Initialize the board */
 170         pci_write_config_word(dev, 0x80, 0x00);
 171         /* Check if it is a 343 or a 363. 363 has COMMAND_MEMORY set */
 172         pci_read_config_word(dev, PCI_COMMAND, &cmd);
 173         if (cmd & PCI_COMMAND_MEMORY)
 174                 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF0);
 175         else
 176                 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x20);
 177 }
 178
 179 /**
 180  *      hpt3x3_init_one         -       Initialise an HPT343/363
 181  *      @pdev: PCI device
 182  *      @id: Entry in match table
 183  *
 184  *      Perform basic initialisation. We set the device up so we access all
 185  *      ports via BAR4. This is neccessary to work around errata.
 186  */
 187
 188 static int hpt3x3_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
 189 {
 190         static int printed_version;
 191         static const struct ata_port_info info = {
 192                 .sht = &hpt3x3_sht,
 193                 .flags = ATA_FLAG_SLAVE_POSS,
 194                 .pio_mask = 0x1f,
 195 #if defined(CONFIG_PATA_HPT3X3_DMA)
 196                 /* Further debug needed */
 197                 .mwdma_mask = 0x07,
 198                 .udma_mask = 0x07,
 199 #endif
 200                 .port_ops = &hpt3x3_port_ops
 201         };
 202         /* Register offsets of taskfiles in BAR4 area */
 203         static const u8 offset_cmd[2] = { 0x20, 0x28 };
 204         static const u8 offset_ctl[2] = { 0x36, 0x3E };
 205         const struct ata_port_info *ppi[] = { &info, NULL };
 206         struct ata_host *host;
 207         int i, rc;
 208         void __iomem *base;
 209
 210         hpt3x3_init_chipset(pdev);
 211
 212         if (!printed_version++)
 213                 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
 214
 215         host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2);
 216         if (!host)
 217                 return -ENOMEM;
 218         /* acquire resources and fill host */
 219         rc = pcim_enable_device(pdev);
 220         if (rc)
 221                 return rc;
 222
 223         /* Everything is relative to BAR4 if we set up this way */
 224         rc = pcim_iomap_regions(pdev, 1 << 4, DRV_NAME);
 225         if (rc == -EBUSY)
 226                 pcim_pin_device(pdev);
 227         if (rc)
 228                 return rc;
 229         host->iomap = pcim_iomap_table(pdev);
 230         rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
 231         if (rc)
 232                 return rc;
 233         rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
 234         if (rc)
 235                 return rc;
 236
 237         base = host->iomap[4];  /* Bus mastering base */
 238
 239         for (i = 0; i < host->n_ports; i++) {
 240                 struct ata_port *ap = host->ports[i];
 241                 struct ata_ioports *ioaddr = &ap->ioaddr;
 242
 243                 ioaddr->cmd_addr = base + offset_cmd[i];
 244                 ioaddr->altstatus_addr =
 245                 ioaddr->ctl_addr = base + offset_ctl[i];
 246                 ioaddr->scr_addr = NULL;
 247                 ata_std_ports(ioaddr);
 248                 ioaddr->bmdma_addr = base + 8 * i;
 249
 250                 ata_port_pbar_desc(ap, 4, -1, "ioport");
 251                 ata_port_pbar_desc(ap, 4, offset_cmd[i], "cmd");
 252         }
 253         pci_set_master(pdev);
 254         return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED,
 255                                  &hpt3x3_sht);
 256 }
 257
 258 #ifdef CONFIG_PM
 259 static int hpt3x3_reinit_one(struct pci_dev *dev)
 260 {
 261         hpt3x3_init_chipset(dev);
 262         return ata_pci_device_resume(dev);
 263 }
 264 #endif
 265
 266 static const struct pci_device_id hpt3x3[] = {
 267         { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT343), },
 268
 269         { },
 270 };
 271
 272 static struct pci_driver hpt3x3_pci_driver = {
 273         .name           = DRV_NAME,
 274         .id_table       = hpt3x3,
 275         .probe          = hpt3x3_init_one,
 276         .remove         = ata_pci_remove_one,
 277 #ifdef CONFIG_PM
 278         .suspend        = ata_pci_device_suspend,
 279         .resume         = hpt3x3_reinit_one,
 280 #endif
 281 };
 282
 283 static int __init hpt3x3_init(void)
 284 {
 285         return pci_register_driver(&hpt3x3_pci_driver);
 286 }
 287
 288
 289 static void __exit hpt3x3_exit(void)
 290 {
 291         pci_unregister_driver(&hpt3x3_pci_driver);
 292 }
 293
 294
 295 MODULE_AUTHOR("Alan Cox");
 296 MODULE_DESCRIPTION("low-level driver for the Highpoint HPT343/363");
 297 MODULE_LICENSE("GPL");
 298 MODULE_DEVICE_TABLE(pci, hpt3x3);
 299 MODULE_VERSION(DRV_VERSION);
 300
 301 module_init(hpt3x3_init);
 302 module_exit(hpt3x3_exit);