x86: change NR_CPUS arrays in numa_64 fixup
[wrt350n-kernel.git] / include / asm-powerpc / ucc.h
blob46b09ba6bead6fa8b230436f6dc4508348189eff
1 /*
2 * Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved.
4 * Authors: Shlomi Gridish <gridish@freescale.com>
5 * Li Yang <leoli@freescale.com>
7 * Description:
8 * Internal header file for UCC unit routines.
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
15 #ifndef __UCC_H__
16 #define __UCC_H__
18 #include <asm/immap_qe.h>
19 #include <asm/qe.h>
21 #define STATISTICS
23 #define UCC_MAX_NUM 8
25 /* Slow or fast type for UCCs.
27 enum ucc_speed_type {
28 UCC_SPEED_TYPE_FAST = UCC_GUEMR_MODE_FAST_RX | UCC_GUEMR_MODE_FAST_TX,
29 UCC_SPEED_TYPE_SLOW = UCC_GUEMR_MODE_SLOW_RX | UCC_GUEMR_MODE_SLOW_TX
32 /* ucc_set_type
33 * Sets UCC to slow or fast mode.
35 * ucc_num - (In) number of UCC (0-7).
36 * speed - (In) slow or fast mode for UCC.
38 int ucc_set_type(unsigned int ucc_num, enum ucc_speed_type speed);
40 int ucc_set_qe_mux_mii_mng(unsigned int ucc_num);
42 int ucc_set_qe_mux_rxtx(unsigned int ucc_num, enum qe_clock clock,
43 enum comm_dir mode);
45 int ucc_mux_set_grant_tsa_bkpt(unsigned int ucc_num, int set, u32 mask);
47 /* QE MUX clock routing for UCC
49 static inline int ucc_set_qe_mux_grant(unsigned int ucc_num, int set)
51 return ucc_mux_set_grant_tsa_bkpt(ucc_num, set, QE_CMXUCR_GRANT);
54 static inline int ucc_set_qe_mux_tsa(unsigned int ucc_num, int set)
56 return ucc_mux_set_grant_tsa_bkpt(ucc_num, set, QE_CMXUCR_TSA);
59 static inline int ucc_set_qe_mux_bkpt(unsigned int ucc_num, int set)
61 return ucc_mux_set_grant_tsa_bkpt(ucc_num, set, QE_CMXUCR_BKPT);
64 #endif /* __UCC_H__ */