2 * Low-level SPU handling
4 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
6 * Author: Arnd Bergmann <arndb@de.ibm.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 #include <linux/interrupt.h>
26 #include <linux/list.h>
27 #include <linux/module.h>
28 #include <linux/ptrace.h>
29 #include <linux/slab.h>
30 #include <linux/wait.h>
33 #include <linux/mutex.h>
34 #include <linux/linux_logo.h>
36 #include <asm/spu_priv1.h>
37 #include <asm/spu_csa.h>
41 const struct spu_management_ops
*spu_management_ops
;
42 EXPORT_SYMBOL_GPL(spu_management_ops
);
44 const struct spu_priv1_ops
*spu_priv1_ops
;
45 EXPORT_SYMBOL_GPL(spu_priv1_ops
);
47 struct cbe_spu_info cbe_spu_info
[MAX_NUMNODES
];
48 EXPORT_SYMBOL_GPL(cbe_spu_info
);
51 * The spufs fault-handling code needs to call force_sig_info to raise signals
52 * on DMA errors. Export it here to avoid general kernel-wide access to this
55 EXPORT_SYMBOL_GPL(force_sig_info
);
58 * Protects cbe_spu_info and spu->number.
60 static DEFINE_SPINLOCK(spu_lock
);
63 * List of all spus in the system.
65 * This list is iterated by callers from irq context and callers that
66 * want to sleep. Thus modifications need to be done with both
67 * spu_full_list_lock and spu_full_list_mutex held, while iterating
68 * through it requires either of these locks.
70 * In addition spu_full_list_lock protects all assignmens to
73 static LIST_HEAD(spu_full_list
);
74 static DEFINE_SPINLOCK(spu_full_list_lock
);
75 static DEFINE_MUTEX(spu_full_list_mutex
);
81 void spu_invalidate_slbs(struct spu
*spu
)
83 struct spu_priv2 __iomem
*priv2
= spu
->priv2
;
84 <<<<<<< HEAD
:arch
/powerpc
/platforms
/cell
/spu_base
.c
87 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:arch
/powerpc
/platforms
/cell
/spu_base
.c
89 <<<<<<< HEAD
:arch
/powerpc
/platforms
/cell
/spu_base
.c
91 spin_lock_irqsave(&spu
->register_lock
, flags
);
92 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:arch
/powerpc
/platforms
/cell
/spu_base
.c
93 if (spu_mfc_sr1_get(spu
) & MFC_STATE1_RELOCATE_MASK
)
94 out_be64(&priv2
->slb_invalidate_all_W
, 0UL);
95 <<<<<<< HEAD
:arch
/powerpc
/platforms
/cell
/spu_base
.c
97 spin_unlock_irqrestore(&spu
->register_lock
, flags
);
98 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:arch
/powerpc
/platforms
/cell
/spu_base
.c
100 EXPORT_SYMBOL_GPL(spu_invalidate_slbs
);
102 /* This is called by the MM core when a segment size is changed, to
103 * request a flush of all the SPEs using a given mm
105 void spu_flush_all_slbs(struct mm_struct
*mm
)
110 spin_lock_irqsave(&spu_full_list_lock
, flags
);
111 list_for_each_entry(spu
, &spu_full_list
, full_list
) {
113 spu_invalidate_slbs(spu
);
115 spin_unlock_irqrestore(&spu_full_list_lock
, flags
);
118 /* The hack below stinks... try to do something better one of
119 * these days... Does it even work properly with NR_CPUS == 1 ?
121 static inline void mm_needs_global_tlbie(struct mm_struct
*mm
)
123 int nr
= (NR_CPUS
> 1) ? NR_CPUS
: NR_CPUS
+ 1;
125 /* Global TLBIE broadcast required with SPEs. */
126 __cpus_setall(&mm
->cpu_vm_mask
, nr
);
129 void spu_associate_mm(struct spu
*spu
, struct mm_struct
*mm
)
133 spin_lock_irqsave(&spu_full_list_lock
, flags
);
135 spin_unlock_irqrestore(&spu_full_list_lock
, flags
);
137 mm_needs_global_tlbie(mm
);
139 EXPORT_SYMBOL_GPL(spu_associate_mm
);
141 int spu_64k_pages_available(void)
143 return mmu_psize_defs
[MMU_PAGE_64K
].shift
!= 0;
145 EXPORT_SYMBOL_GPL(spu_64k_pages_available
);
147 static void spu_restart_dma(struct spu
*spu
)
149 struct spu_priv2 __iomem
*priv2
= spu
->priv2
;
151 if (!test_bit(SPU_CONTEXT_SWITCH_PENDING
, &spu
->flags
))
152 out_be64(&priv2
->mfc_control_RW
, MFC_CNTL_RESTART_DMA_COMMAND
);
155 static inline void spu_load_slb(struct spu
*spu
, int slbe
, struct spu_slb
*slb
)
157 struct spu_priv2 __iomem
*priv2
= spu
->priv2
;
159 pr_debug("%s: adding SLB[%d] 0x%016lx 0x%016lx\n",
160 __func__
, slbe
, slb
->vsid
, slb
->esid
);
162 out_be64(&priv2
->slb_index_W
, slbe
);
163 <<<<<<< HEAD
:arch
/powerpc
/platforms
/cell
/spu_base
.c
165 /* set invalid before writing vsid */
166 out_be64(&priv2
->slb_esid_RW
, 0);
167 /* now it's safe to write the vsid */
168 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:arch
/powerpc
/platforms
/cell
/spu_base
.c
169 out_be64(&priv2
->slb_vsid_RW
, slb
->vsid
);
170 <<<<<<< HEAD
:arch
/powerpc
/platforms
/cell
/spu_base
.c
172 /* setting the new esid makes the entry valid again */
173 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:arch
/powerpc
/platforms
/cell
/spu_base
.c
174 out_be64(&priv2
->slb_esid_RW
, slb
->esid
);
177 static int __spu_trap_data_seg(struct spu
*spu
, unsigned long ea
)
179 struct mm_struct
*mm
= spu
->mm
;
183 pr_debug("%s\n", __FUNCTION__
);
185 <<<<<<< HEAD
:arch
/powerpc
/platforms
/cell
/spu_base
.c
186 if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE
, &spu
->flags
)) {
187 /* SLBs are pre-loaded for context switch, so
188 * we should never get here!
190 printk("%s: invalid access during switch!\n", __func__
);
194 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:arch
/powerpc
/platforms
/cell
/spu_base
.c
195 slb
.esid
= (ea
& ESID_MASK
) | SLB_ESID_V
;
197 switch(REGION_ID(ea
)) {
199 #ifdef CONFIG_PPC_MM_SLICES
200 psize
= get_slice_psize(mm
, ea
);
202 psize
= mm
->context
.user_psize
;
204 slb
.vsid
= (get_vsid(mm
->context
.id
, ea
, MMU_SEGSIZE_256M
)
205 << SLB_VSID_SHIFT
) | SLB_VSID_USER
;
207 case VMALLOC_REGION_ID
:
208 if (ea
< VMALLOC_END
)
209 psize
= mmu_vmalloc_psize
;
211 psize
= mmu_io_psize
;
212 slb
.vsid
= (get_kernel_vsid(ea
, MMU_SEGSIZE_256M
)
213 << SLB_VSID_SHIFT
) | SLB_VSID_KERNEL
;
215 case KERNEL_REGION_ID
:
216 psize
= mmu_linear_psize
;
217 slb
.vsid
= (get_kernel_vsid(ea
, MMU_SEGSIZE_256M
)
218 << SLB_VSID_SHIFT
) | SLB_VSID_KERNEL
;
221 /* Future: support kernel segments so that drivers
224 pr_debug("invalid region access at %016lx\n", ea
);
227 slb
.vsid
|= mmu_psize_defs
[psize
].sllp
;
229 spu_load_slb(spu
, spu
->slb_replace
, &slb
);
232 if (spu
->slb_replace
>= 8)
233 spu
->slb_replace
= 0;
235 spu_restart_dma(spu
);
236 spu
->stats
.slb_flt
++;
240 extern int hash_page(unsigned long ea
, unsigned long access
, unsigned long trap
); //XXX
241 static int __spu_trap_data_map(struct spu
*spu
, unsigned long ea
, u64 dsisr
)
243 pr_debug("%s, %lx, %lx\n", __FUNCTION__
, dsisr
, ea
);
245 /* Handle kernel space hash faults immediately.
246 User hash faults need to be deferred to process context. */
247 if ((dsisr
& MFC_DSISR_PTE_NOT_FOUND
)
248 && REGION_ID(ea
) != USER_REGION_ID
249 && hash_page(ea
, _PAGE_PRESENT
, 0x300) == 0) {
250 spu_restart_dma(spu
);
254 <<<<<<< HEAD
:arch
/powerpc
/platforms
/cell
/spu_base
.c
255 if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE
, &spu
->flags
)) {
256 printk("%s: invalid access during switch!\n", __func__
);
261 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:arch
/powerpc
/platforms
/cell
/spu_base
.c
262 spu
->class_0_pending
= 0;
266 spu
->stop_callback(spu
);
271 static void __spu_kernel_slb(void *addr
, struct spu_slb
*slb
)
273 unsigned long ea
= (unsigned long)addr
;
276 if (REGION_ID(ea
) == KERNEL_REGION_ID
)
277 llp
= mmu_psize_defs
[mmu_linear_psize
].sllp
;
279 llp
= mmu_psize_defs
[mmu_virtual_psize
].sllp
;
281 slb
->vsid
= (get_kernel_vsid(ea
, MMU_SEGSIZE_256M
) << SLB_VSID_SHIFT
) |
282 SLB_VSID_KERNEL
| llp
;
283 slb
->esid
= (ea
& ESID_MASK
) | SLB_ESID_V
;
287 * Given an array of @nr_slbs SLB entries, @slbs, return non-zero if the
288 * address @new_addr is present.
290 static inline int __slb_present(struct spu_slb
*slbs
, int nr_slbs
,
293 unsigned long ea
= (unsigned long)new_addr
;
296 for (i
= 0; i
< nr_slbs
; i
++)
297 if (!((slbs
[i
].esid
^ ea
) & ESID_MASK
))
304 * Setup the SPU kernel SLBs, in preparation for a context save/restore. We
305 * need to map both the context save area, and the save/restore code.
307 * Because the lscsa and code may cross segment boundaires, we check to see
308 * if mappings are required for the start and end of each range. We currently
309 * assume that the mappings are smaller that one segment - if not, something
310 * is seriously wrong.
312 void spu_setup_kernel_slbs(struct spu
*spu
, struct spu_lscsa
*lscsa
,
313 void *code
, int code_size
)
315 struct spu_slb slbs
[4];
317 /* start and end addresses of both mappings */
319 lscsa
, (void *)lscsa
+ sizeof(*lscsa
) - 1,
320 code
, code
+ code_size
- 1
323 /* check the set of addresses, and create a new entry in the slbs array
324 * if there isn't already a SLB for that address */
325 for (i
= 0; i
< ARRAY_SIZE(addrs
); i
++) {
326 if (__slb_present(slbs
, nr_slbs
, addrs
[i
]))
329 __spu_kernel_slb(addrs
[i
], &slbs
[nr_slbs
]);
333 <<<<<<< HEAD
:arch
/powerpc
/platforms
/cell
/spu_base
.c
335 spin_lock_irq(&spu
->register_lock
);
336 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:arch
/powerpc
/platforms
/cell
/spu_base
.c
337 /* Add the set of SLBs */
338 for (i
= 0; i
< nr_slbs
; i
++)
339 spu_load_slb(spu
, i
, &slbs
[i
]);
340 <<<<<<< HEAD
:arch
/powerpc
/platforms
/cell
/spu_base
.c
342 spin_unlock_irq(&spu
->register_lock
);
343 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:arch
/powerpc
/platforms
/cell
/spu_base
.c
345 EXPORT_SYMBOL_GPL(spu_setup_kernel_slbs
);
348 spu_irq_class_0(int irq
, void *data
)
351 unsigned long stat
, mask
;
355 spin_lock(&spu
->register_lock
);
356 mask
= spu_int_mask_get(spu
, 0);
357 stat
= spu_int_stat_get(spu
, 0) & mask
;
359 spu
->class_0_pending
|= stat
;
360 spu
->dsisr
= spu_mfc_dsisr_get(spu
);
361 spu
->dar
= spu_mfc_dar_get(spu
);
362 spin_unlock(&spu
->register_lock
);
364 spu
->stop_callback(spu
);
366 spu_int_stat_clear(spu
, 0, stat
);
372 spu_irq_class_1(int irq
, void *data
)
375 unsigned long stat
, mask
, dar
, dsisr
;
379 /* atomically read & clear class1 status. */
380 spin_lock(&spu
->register_lock
);
381 mask
= spu_int_mask_get(spu
, 1);
382 stat
= spu_int_stat_get(spu
, 1) & mask
;
383 dar
= spu_mfc_dar_get(spu
);
384 dsisr
= spu_mfc_dsisr_get(spu
);
385 if (stat
& CLASS1_STORAGE_FAULT_INTR
)
386 spu_mfc_dsisr_set(spu
, 0ul);
387 spu_int_stat_clear(spu
, 1, stat
);
388 <<<<<<< HEAD
:arch
/powerpc
/platforms
/cell
/spu_base
.c
389 spin_unlock(&spu
->register_lock
);
390 pr_debug("%s: %lx %lx %lx %lx\n", __FUNCTION__
, mask
, stat
,
393 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:arch
/powerpc
/platforms
/cell
/spu_base
.c
395 if (stat
& CLASS1_SEGMENT_FAULT_INTR
)
396 __spu_trap_data_seg(spu
, dar
);
398 <<<<<<< HEAD
:arch
/powerpc
/platforms
/cell
/spu_base
.c
400 spin_unlock(&spu
->register_lock
);
401 pr_debug("%s: %lx %lx %lx %lx\n", __FUNCTION__
, mask
, stat
,
404 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:arch
/powerpc
/platforms
/cell
/spu_base
.c
405 if (stat
& CLASS1_STORAGE_FAULT_INTR
)
406 __spu_trap_data_map(spu
, dar
, dsisr
);
408 if (stat
& CLASS1_LS_COMPARE_SUSPEND_ON_GET_INTR
)
411 if (stat
& CLASS1_LS_COMPARE_SUSPEND_ON_PUT_INTR
)
414 return stat
? IRQ_HANDLED
: IRQ_NONE
;
418 spu_irq_class_2(int irq
, void *data
)
423 const int mailbox_intrs
=
424 CLASS2_MAILBOX_THRESHOLD_INTR
| CLASS2_MAILBOX_INTR
;
427 spin_lock(&spu
->register_lock
);
428 stat
= spu_int_stat_get(spu
, 2);
429 mask
= spu_int_mask_get(spu
, 2);
430 /* ignore interrupts we're not waiting for */
433 /* mailbox interrupts are level triggered. mask them now before
435 if (stat
& mailbox_intrs
)
436 spu_int_mask_and(spu
, 2, ~(stat
& mailbox_intrs
));
437 /* acknowledge all interrupts before the callbacks */
438 spu_int_stat_clear(spu
, 2, stat
);
439 spin_unlock(&spu
->register_lock
);
441 pr_debug("class 2 interrupt %d, %lx, %lx\n", irq
, stat
, mask
);
443 if (stat
& CLASS2_MAILBOX_INTR
)
444 spu
->ibox_callback(spu
);
446 if (stat
& CLASS2_SPU_STOP_INTR
)
447 spu
->stop_callback(spu
);
449 if (stat
& CLASS2_SPU_HALT_INTR
)
450 spu
->stop_callback(spu
);
452 if (stat
& CLASS2_SPU_DMA_TAG_GROUP_COMPLETE_INTR
)
453 spu
->mfc_callback(spu
);
455 if (stat
& CLASS2_MAILBOX_THRESHOLD_INTR
)
456 spu
->wbox_callback(spu
);
458 spu
->stats
.class2_intr
++;
459 return stat
? IRQ_HANDLED
: IRQ_NONE
;
462 static int spu_request_irqs(struct spu
*spu
)
466 if (spu
->irqs
[0] != NO_IRQ
) {
467 snprintf(spu
->irq_c0
, sizeof (spu
->irq_c0
), "spe%02d.0",
469 ret
= request_irq(spu
->irqs
[0], spu_irq_class_0
,
475 if (spu
->irqs
[1] != NO_IRQ
) {
476 snprintf(spu
->irq_c1
, sizeof (spu
->irq_c1
), "spe%02d.1",
478 ret
= request_irq(spu
->irqs
[1], spu_irq_class_1
,
484 if (spu
->irqs
[2] != NO_IRQ
) {
485 snprintf(spu
->irq_c2
, sizeof (spu
->irq_c2
), "spe%02d.2",
487 ret
= request_irq(spu
->irqs
[2], spu_irq_class_2
,
496 if (spu
->irqs
[1] != NO_IRQ
)
497 free_irq(spu
->irqs
[1], spu
);
499 if (spu
->irqs
[0] != NO_IRQ
)
500 free_irq(spu
->irqs
[0], spu
);
505 static void spu_free_irqs(struct spu
*spu
)
507 if (spu
->irqs
[0] != NO_IRQ
)
508 free_irq(spu
->irqs
[0], spu
);
509 if (spu
->irqs
[1] != NO_IRQ
)
510 free_irq(spu
->irqs
[1], spu
);
511 if (spu
->irqs
[2] != NO_IRQ
)
512 free_irq(spu
->irqs
[2], spu
);
515 void spu_init_channels(struct spu
*spu
)
517 static const struct {
521 { 0x00, 1, }, { 0x01, 1, }, { 0x03, 1, }, { 0x04, 1, },
522 { 0x18, 1, }, { 0x19, 1, }, { 0x1b, 1, }, { 0x1d, 1, },
524 { 0x00, 0, }, { 0x03, 0, }, { 0x04, 0, }, { 0x15, 16, },
525 { 0x17, 1, }, { 0x18, 0, }, { 0x19, 0, }, { 0x1b, 0, },
526 { 0x1c, 1, }, { 0x1d, 0, }, { 0x1e, 1, },
528 struct spu_priv2 __iomem
*priv2
;
533 /* initialize all channel data to zero */
534 for (i
= 0; i
< ARRAY_SIZE(zero_list
); i
++) {
537 out_be64(&priv2
->spu_chnlcntptr_RW
, zero_list
[i
].channel
);
538 for (count
= 0; count
< zero_list
[i
].count
; count
++)
539 out_be64(&priv2
->spu_chnldata_RW
, 0);
542 /* initialize channel counts to meaningful values */
543 for (i
= 0; i
< ARRAY_SIZE(count_list
); i
++) {
544 out_be64(&priv2
->spu_chnlcntptr_RW
, count_list
[i
].channel
);
545 out_be64(&priv2
->spu_chnlcnt_RW
, count_list
[i
].count
);
548 EXPORT_SYMBOL_GPL(spu_init_channels
);
550 static int spu_shutdown(struct sys_device
*sysdev
)
552 struct spu
*spu
= container_of(sysdev
, struct spu
, sysdev
);
555 spu_destroy_spu(spu
);
559 static struct sysdev_class spu_sysdev_class
= {
561 .shutdown
= spu_shutdown
,
564 int spu_add_sysdev_attr(struct sysdev_attribute
*attr
)
568 mutex_lock(&spu_full_list_mutex
);
569 list_for_each_entry(spu
, &spu_full_list
, full_list
)
570 sysdev_create_file(&spu
->sysdev
, attr
);
571 mutex_unlock(&spu_full_list_mutex
);
575 EXPORT_SYMBOL_GPL(spu_add_sysdev_attr
);
577 int spu_add_sysdev_attr_group(struct attribute_group
*attrs
)
582 mutex_lock(&spu_full_list_mutex
);
583 list_for_each_entry(spu
, &spu_full_list
, full_list
) {
584 rc
= sysfs_create_group(&spu
->sysdev
.kobj
, attrs
);
586 /* we're in trouble here, but try unwinding anyway */
588 printk(KERN_ERR
"%s: can't create sysfs group '%s'\n",
589 __func__
, attrs
->name
);
591 list_for_each_entry_continue_reverse(spu
,
592 &spu_full_list
, full_list
)
593 sysfs_remove_group(&spu
->sysdev
.kobj
, attrs
);
598 mutex_unlock(&spu_full_list_mutex
);
602 EXPORT_SYMBOL_GPL(spu_add_sysdev_attr_group
);
605 void spu_remove_sysdev_attr(struct sysdev_attribute
*attr
)
609 mutex_lock(&spu_full_list_mutex
);
610 list_for_each_entry(spu
, &spu_full_list
, full_list
)
611 sysdev_remove_file(&spu
->sysdev
, attr
);
612 mutex_unlock(&spu_full_list_mutex
);
614 EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr
);
616 void spu_remove_sysdev_attr_group(struct attribute_group
*attrs
)
620 mutex_lock(&spu_full_list_mutex
);
621 list_for_each_entry(spu
, &spu_full_list
, full_list
)
622 sysfs_remove_group(&spu
->sysdev
.kobj
, attrs
);
623 mutex_unlock(&spu_full_list_mutex
);
625 EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr_group
);
627 static int spu_create_sysdev(struct spu
*spu
)
631 spu
->sysdev
.id
= spu
->number
;
632 spu
->sysdev
.cls
= &spu_sysdev_class
;
633 ret
= sysdev_register(&spu
->sysdev
);
635 printk(KERN_ERR
"Can't register SPU %d with sysfs\n",
640 sysfs_add_device_to_node(&spu
->sysdev
, spu
->node
);
645 static int __init
create_spu(void *data
)
654 spu
= kzalloc(sizeof (*spu
), GFP_KERNEL
);
658 spu
->alloc_state
= SPU_FREE
;
660 spin_lock_init(&spu
->register_lock
);
661 spin_lock(&spu_lock
);
662 spu
->number
= number
++;
663 spin_unlock(&spu_lock
);
665 ret
= spu_create_spu(spu
, data
);
670 spu_mfc_sdr_setup(spu
);
671 spu_mfc_sr1_set(spu
, 0x33);
672 ret
= spu_request_irqs(spu
);
676 ret
= spu_create_sysdev(spu
);
680 mutex_lock(&cbe_spu_info
[spu
->node
].list_mutex
);
681 list_add(&spu
->cbe_list
, &cbe_spu_info
[spu
->node
].spus
);
682 cbe_spu_info
[spu
->node
].n_spus
++;
683 mutex_unlock(&cbe_spu_info
[spu
->node
].list_mutex
);
685 mutex_lock(&spu_full_list_mutex
);
686 spin_lock_irqsave(&spu_full_list_lock
, flags
);
687 list_add(&spu
->full_list
, &spu_full_list
);
688 spin_unlock_irqrestore(&spu_full_list_lock
, flags
);
689 mutex_unlock(&spu_full_list_mutex
);
691 spu
->stats
.util_state
= SPU_UTIL_IDLE_LOADED
;
693 spu
->stats
.tstamp
= timespec_to_ns(&ts
);
695 INIT_LIST_HEAD(&spu
->aff_list
);
702 spu_destroy_spu(spu
);
709 static const char *spu_state_names
[] = {
710 "user", "system", "iowait", "idle"
713 static unsigned long long spu_acct_time(struct spu
*spu
,
714 enum spu_utilization_state state
)
717 unsigned long long time
= spu
->stats
.times
[state
];
720 * If the spu is idle or the context is stopped, utilization
721 * statistics are not updated. Apply the time delta from the
722 * last recorded state of the spu.
724 if (spu
->stats
.util_state
== state
) {
726 time
+= timespec_to_ns(&ts
) - spu
->stats
.tstamp
;
729 return time
/ NSEC_PER_MSEC
;
733 static ssize_t
spu_stat_show(struct sys_device
*sysdev
, char *buf
)
735 struct spu
*spu
= container_of(sysdev
, struct spu
, sysdev
);
737 return sprintf(buf
, "%s %llu %llu %llu %llu "
738 "%llu %llu %llu %llu %llu %llu %llu %llu\n",
739 spu_state_names
[spu
->stats
.util_state
],
740 spu_acct_time(spu
, SPU_UTIL_USER
),
741 spu_acct_time(spu
, SPU_UTIL_SYSTEM
),
742 spu_acct_time(spu
, SPU_UTIL_IOWAIT
),
743 spu_acct_time(spu
, SPU_UTIL_IDLE_LOADED
),
744 spu
->stats
.vol_ctx_switch
,
745 spu
->stats
.invol_ctx_switch
,
750 spu
->stats
.class2_intr
,
751 spu
->stats
.libassist
);
754 static SYSDEV_ATTR(stat
, 0644, spu_stat_show
, NULL
);
756 static int __init
init_spu_base(void)
760 for (i
= 0; i
< MAX_NUMNODES
; i
++) {
761 mutex_init(&cbe_spu_info
[i
].list_mutex
);
762 INIT_LIST_HEAD(&cbe_spu_info
[i
].spus
);
765 if (!spu_management_ops
)
768 /* create sysdev class for spus */
769 ret
= sysdev_class_register(&spu_sysdev_class
);
773 ret
= spu_enumerate_spus(create_spu
);
776 printk(KERN_WARNING
"%s: Error initializing spus\n",
778 goto out_unregister_sysdev_class
;
783 * We cannot put the forward declaration in
784 * <linux/linux_logo.h> because of conflicting session type
785 * conflicts for const and __initdata with different compiler
788 extern const struct linux_logo logo_spe_clut224
;
790 fb_append_extra_logo(&logo_spe_clut224
, ret
);
793 mutex_lock(&spu_full_list_mutex
);
794 xmon_register_spus(&spu_full_list
);
795 crash_register_spus(&spu_full_list
);
796 mutex_unlock(&spu_full_list_mutex
);
797 spu_add_sysdev_attr(&attr_stat
);
803 out_unregister_sysdev_class
:
804 sysdev_class_unregister(&spu_sysdev_class
);
808 module_init(init_spu_base
);
810 MODULE_LICENSE("GPL");
811 MODULE_AUTHOR("Arnd Bergmann <arndb@de.ibm.com>");