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Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[wrt350n-kernel.git] / arch / x86 / pci / common.c
blob783fd973bf8495372ca0385c57f845b2b918b333
1 /*
2 * Low-Level PCI Support for PC
3 *
4 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
5 */
6
7 #include <linux/sched.h>
8 #include <linux/pci.h>
9 #include <linux/ioport.h>
10 #include <linux/init.h>
11 #include <linux/dmi.h>
12
13 #include <asm/acpi.h>
14 #include <asm/segment.h>
15 #include <asm/io.h>
16 #include <asm/smp.h>
17
18 #include "pci.h"
19
20 unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
21 PCI_PROBE_MMCONF;
22
23 static int pci_bf_sort;
24 int pci_routeirq;
25 int pcibios_last_bus = -1;
26 unsigned long pirq_table_addr;
27 struct pci_bus *pci_root_bus;
28 struct pci_raw_ops *raw_pci_ops;
29 struct pci_raw_ops *raw_pci_ext_ops;
30
31 int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
32 int reg, int len, u32 *val)
33 {
34 if (reg < 256 && raw_pci_ops)
35 return raw_pci_ops->read(domain, bus, devfn, reg, len, val);
36 if (raw_pci_ext_ops)
37 return raw_pci_ext_ops->read(domain, bus, devfn, reg, len, val);
38 return -EINVAL;
39 }
40
41 int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
42 int reg, int len, u32 val)
43 {
44 if (reg < 256 && raw_pci_ops)
45 return raw_pci_ops->write(domain, bus, devfn, reg, len, val);
46 if (raw_pci_ext_ops)
47 return raw_pci_ext_ops->write(domain, bus, devfn, reg, len, val);
48 return -EINVAL;
49 }
50
51 static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
52 {
53 return raw_pci_read(pci_domain_nr(bus), bus->number,
54 devfn, where, size, value);
55 }
56
57 static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
58 {
59 return raw_pci_write(pci_domain_nr(bus), bus->number,
60 devfn, where, size, value);
61 }
62
63 struct pci_ops pci_root_ops = {
64 .read = pci_read,
65 .write = pci_write,
66 };
67
68 /*
69 * legacy, numa, and acpi all want to call pcibios_scan_root
70 * from their initcalls. This flag prevents that.
71 */
72 int pcibios_scanned;
73
74 /*
75 * This interrupt-safe spinlock protects all accesses to PCI
76 * configuration space.
77 */
78 DEFINE_SPINLOCK(pci_config_lock);
79
80 /*
81 * Several buggy motherboards address only 16 devices and mirror
82 * them to next 16 IDs. We try to detect this `feature' on all
83 * primary buses (those containing host bridges as they are
84 * expected to be unique) and remove the ghost devices.
85 */
86
87 static void __devinit pcibios_fixup_ghosts(struct pci_bus *b)
88 {
89 struct list_head *ln, *mn;
90 struct pci_dev *d, *e;
91 int mirror = PCI_DEVFN(16,0);
92 int seen_host_bridge = 0;
93 int i;
94
95 DBG("PCI: Scanning for ghost devices on bus %d\n", b->number);
96 list_for_each(ln, &b->devices) {
97 d = pci_dev_b(ln);
98 if ((d->class >> 8) == PCI_CLASS_BRIDGE_HOST)
99 seen_host_bridge++;
100 for (mn=ln->next; mn != &b->devices; mn=mn->next) {
101 e = pci_dev_b(mn);
102 if (e->devfn != d->devfn + mirror ||
103 e->vendor != d->vendor ||
104 e->device != d->device ||
105 e->class != d->class)
106 continue;
107 for(i=0; i<PCI_NUM_RESOURCES; i++)
108 if (e->resource[i].start != d->resource[i].start ||
109 e->resource[i].end != d->resource[i].end ||
110 e->resource[i].flags != d->resource[i].flags)
111 continue;
112 break;
113 }
114 if (mn == &b->devices)
115 return;
116 }
117 if (!seen_host_bridge)
118 return;
119 printk(KERN_WARNING "PCI: Ignoring ghost devices on bus %02x\n", b->number);
120
121 ln = &b->devices;
122 while (ln->next != &b->devices) {
123 d = pci_dev_b(ln->next);
124 if (d->devfn >= mirror) {
125 list_del(&d->global_list);
126 list_del(&d->bus_list);
127 kfree(d);
128 } else
129 ln = ln->next;
130 }
131 }
132
133 static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev)
134 {
135 struct resource *rom_r = &dev->resource[PCI_ROM_RESOURCE];
136
137 if (rom_r->parent)
138 return;
139 if (rom_r->start)
140 /* we deal with BIOS assigned ROM later */
141 return;
142 if (!(pci_probe & PCI_ASSIGN_ROMS))
143 rom_r->start = rom_r->end = rom_r->flags = 0;
144 }
145
146 /*
147 * Called after each bus is probed, but before its children
148 * are examined.
149 */
150
151 void __devinit pcibios_fixup_bus(struct pci_bus *b)
152 {
153 struct pci_dev *dev;
154
155 pcibios_fixup_ghosts(b);
156 pci_read_bridge_bases(b);
157 list_for_each_entry(dev, &b->devices, bus_list)
158 pcibios_fixup_device_resources(dev);
159 }
160
161 /*
162 * Only use DMI information to set this if nothing was passed
163 * on the kernel command line (which was parsed earlier).
164 */
165
166 static int __devinit set_bf_sort(const struct dmi_system_id *d)
167 {
168 if (pci_bf_sort == pci_bf_sort_default) {
169 pci_bf_sort = pci_dmi_bf;
170 printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident);
171 }
172 return 0;
173 }
174
175 /*
176 * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
177 */
178 #ifdef __i386__
179 static int __devinit assign_all_busses(const struct dmi_system_id *d)
180 {
181 pci_probe |= PCI_ASSIGN_ALL_BUSSES;
182 printk(KERN_INFO "%s detected: enabling PCI bus# renumbering"
183 " (pci=assign-busses)\n", d->ident);
184 return 0;
185 }
186 #endif
187
188 static struct dmi_system_id __devinitdata pciprobe_dmi_table[] = {
189 #ifdef __i386__
190 /*
191 * Laptops which need pci=assign-busses to see Cardbus cards
192 */
193 {
194 .callback = assign_all_busses,
195 .ident = "Samsung X20 Laptop",
196 .matches = {
197 DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
198 DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"),
199 },
200 },
201 #endif /* __i386__ */
202 {
203 .callback = set_bf_sort,
204 .ident = "Dell PowerEdge 1950",
205 .matches = {
206 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
207 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1950"),
208 },
209 },
210 {
211 .callback = set_bf_sort,
212 .ident = "Dell PowerEdge 1955",
213 .matches = {
214 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
215 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1955"),
216 },
217 },
218 {
219 .callback = set_bf_sort,
220 .ident = "Dell PowerEdge 2900",
221 .matches = {
222 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
223 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2900"),
224 },
225 },
226 {
227 .callback = set_bf_sort,
228 .ident = "Dell PowerEdge 2950",
229 .matches = {
230 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
231 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"),
232 },
233 },
234 {
235 .callback = set_bf_sort,
236 .ident = "Dell PowerEdge R900",
237 .matches = {
238 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
239 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R900"),
240 },
241 },
242 {
243 .callback = set_bf_sort,
244 .ident = "HP ProLiant BL20p G3",
245 .matches = {
246 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
247 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G3"),
248 },
249 },
250 {
251 .callback = set_bf_sort,
252 .ident = "HP ProLiant BL20p G4",
253 .matches = {
254 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
255 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G4"),
256 },
257 },
258 {
259 .callback = set_bf_sort,
260 .ident = "HP ProLiant BL30p G1",
261 .matches = {
262 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
263 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL30p G1"),
264 },
265 },
266 {
267 .callback = set_bf_sort,
268 .ident = "HP ProLiant BL25p G1",
269 .matches = {
270 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
271 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL25p G1"),
272 },
273 },
274 {
275 .callback = set_bf_sort,
276 .ident = "HP ProLiant BL35p G1",
277 .matches = {
278 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
279 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL35p G1"),
280 },
281 },
282 {
283 .callback = set_bf_sort,
284 .ident = "HP ProLiant BL45p G1",
285 .matches = {
286 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
287 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G1"),
288 },
289 },
290 {
291 .callback = set_bf_sort,
292 .ident = "HP ProLiant BL45p G2",
293 .matches = {
294 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
295 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G2"),
296 },
297 },
298 {
299 .callback = set_bf_sort,
300 .ident = "HP ProLiant BL460c G1",
301 .matches = {
302 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
303 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL460c G1"),
304 },
305 },
306 {
307 .callback = set_bf_sort,
308 .ident = "HP ProLiant BL465c G1",
309 .matches = {
310 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
311 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL465c G1"),
312 },
313 },
314 {
315 .callback = set_bf_sort,
316 .ident = "HP ProLiant BL480c G1",
317 .matches = {
318 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
319 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL480c G1"),
320 },
321 },
322 {
323 .callback = set_bf_sort,
324 .ident = "HP ProLiant BL685c G1",
325 .matches = {
326 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
327 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"),
328 },
329 },
330 {
331 .callback = set_bf_sort,
332 .ident = "HP ProLiant DL385 G2",
333 .matches = {
334 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
335 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL385 G2"),
336 },
337 },
338 {
339 .callback = set_bf_sort,
340 .ident = "HP ProLiant DL585 G2",
341 .matches = {
342 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
343 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"),
344 },
345 },
346 #ifdef __i386__
347 {
348 .callback = assign_all_busses,
349 .ident = "Compaq EVO N800c",
350 .matches = {
351 DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
352 DMI_MATCH(DMI_PRODUCT_NAME, "EVO N800c"),
353 },
354 },
355 #endif
356 {
357 .callback = set_bf_sort,
358 .ident = "HP ProLiant DL385 G2",
359 .matches = {
360 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
361 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL385 G2"),
362 },
363 },
364 {
365 .callback = set_bf_sort,
366 .ident = "HP ProLiant DL585 G2",
367 .matches = {
368 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
369 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"),
370 },
371 },
372 {}
373 };
374
375 struct pci_bus * __devinit pcibios_scan_root(int busnum)
376 {
377 struct pci_bus *bus = NULL;
378 struct pci_sysdata *sd;
379
380 dmi_check_system(pciprobe_dmi_table);
381
382 while ((bus = pci_find_next_bus(bus)) != NULL) {
383 if (bus->number == busnum) {
384 /* Already scanned */
385 return bus;
386 }
387 }
388
389 /* Allocate per-root-bus (not per bus) arch-specific data.
390 * TODO: leak; this memory is never freed.
391 * It's arguable whether it's worth the trouble to care.
392 */
393 sd = kzalloc(sizeof(*sd), GFP_KERNEL);
394 if (!sd) {
395 printk(KERN_ERR "PCI: OOM, not probing PCI bus %02x\n", busnum);
396 return NULL;
397 }
398
399 printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum);
400
401 return pci_scan_bus_parented(NULL, busnum, &pci_root_ops, sd);
402 }
403
404 extern u8 pci_cache_line_size;
405
406 static int __init pcibios_init(void)
407 {
408 struct cpuinfo_x86 *c = &boot_cpu_data;
409
410 if (!raw_pci_ops) {
411 printk(KERN_WARNING "PCI: System does not support PCI\n");
412 return 0;
413 }
414
415 /*
416 * Assume PCI cacheline size of 32 bytes for all x86s except K7/K8
417 * and P4. It's also good for 386/486s (which actually have 16)
418 * as quite a few PCI devices do not support smaller values.
419 */
420 pci_cache_line_size = 32 >> 2;
421 if (c->x86 >= 6 && c->x86_vendor == X86_VENDOR_AMD)
422 pci_cache_line_size = 64 >> 2; /* K7 & K8 */
423 else if (c->x86 > 6 && c->x86_vendor == X86_VENDOR_INTEL)
424 pci_cache_line_size = 128 >> 2; /* P4 */
425
426 pcibios_resource_survey();
427
428 if (pci_bf_sort >= pci_force_bf)
429 pci_sort_breadthfirst();
430 #ifdef CONFIG_PCI_BIOS
431 if ((pci_probe & PCI_BIOS_SORT) && !(pci_probe & PCI_NO_SORT))
432 pcibios_sort();
433 #endif
434 return 0;
435 }
436
437 subsys_initcall(pcibios_init);
438
439 char * __devinit pcibios_setup(char *str)
440 {
441 if (!strcmp(str, "off")) {
442 pci_probe = 0;
443 return NULL;
444 } else if (!strcmp(str, "bfsort")) {
445 pci_bf_sort = pci_force_bf;
446 return NULL;
447 } else if (!strcmp(str, "nobfsort")) {
448 pci_bf_sort = pci_force_nobf;
449 return NULL;
450 }
451 #ifdef CONFIG_PCI_BIOS
452 else if (!strcmp(str, "bios")) {
453 pci_probe = PCI_PROBE_BIOS;
454 return NULL;
455 } else if (!strcmp(str, "nobios")) {
456 pci_probe &= ~PCI_PROBE_BIOS;
457 return NULL;
458 } else if (!strcmp(str, "nosort")) {
459 pci_probe |= PCI_NO_SORT;
460 return NULL;
461 } else if (!strcmp(str, "biosirq")) {
462 pci_probe |= PCI_BIOS_IRQ_SCAN;
463 return NULL;
464 } else if (!strncmp(str, "pirqaddr=", 9)) {
465 pirq_table_addr = simple_strtoul(str+9, NULL, 0);
466 return NULL;
467 }
468 #endif
469 #ifdef CONFIG_PCI_DIRECT
470 else if (!strcmp(str, "conf1")) {
471 pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
472 return NULL;
473 }
474 else if (!strcmp(str, "conf2")) {
475 pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
476 return NULL;
477 }
478 #endif
479 #ifdef CONFIG_PCI_MMCONFIG
480 else if (!strcmp(str, "nommconf")) {
481 pci_probe &= ~PCI_PROBE_MMCONF;
482 return NULL;
483 }
484 #endif
485 else if (!strcmp(str, "noacpi")) {
486 acpi_noirq_set();
487 return NULL;
488 }
489 else if (!strcmp(str, "noearly")) {
490 pci_probe |= PCI_PROBE_NOEARLY;
491 return NULL;
492 }
493 #ifndef CONFIG_X86_VISWS
494 else if (!strcmp(str, "usepirqmask")) {
495 pci_probe |= PCI_USE_PIRQ_MASK;
496 return NULL;
497 } else if (!strncmp(str, "irqmask=", 8)) {
498 pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
499 return NULL;
500 } else if (!strncmp(str, "lastbus=", 8)) {
501 pcibios_last_bus = simple_strtol(str+8, NULL, 0);
502 return NULL;
503 }
504 #endif
505 else if (!strcmp(str, "rom")) {
506 pci_probe |= PCI_ASSIGN_ROMS;
507 return NULL;
508 } else if (!strcmp(str, "assign-busses")) {
509 pci_probe |= PCI_ASSIGN_ALL_BUSSES;
510 return NULL;
511 } else if (!strcmp(str, "use_crs")) {
512 pci_probe |= PCI_USE__CRS;
513 return NULL;
514 } else if (!strcmp(str, "routeirq")) {
515 pci_routeirq = 1;
516 return NULL;
517 }
518 return str;
519 }
520
521 unsigned int pcibios_assign_all_busses(void)
522 {
523 return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
524 }
525
526 int pcibios_enable_device(struct pci_dev *dev, int mask)
527 {
528 int err;
529
530 if ((err = pcibios_enable_resources(dev, mask)) < 0)
531 return err;
532
533 if (!dev->msi_enabled)
534 return pcibios_enable_irq(dev);
535 return 0;
536 }
537
538 void pcibios_disable_device (struct pci_dev *dev)
539 {
540 if (!dev->msi_enabled && pcibios_disable_irq)
541 pcibios_disable_irq(dev);
542 }
543
544 <<<<<<< HEAD:arch/x86/pci/common.c
545 struct pci_bus *pci_scan_bus_with_sysdata(int busno)
546 =======
547 struct pci_bus *__devinit pci_scan_bus_with_sysdata(int busno)
548 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/pci/common.c
549 {
550 struct pci_bus *bus = NULL;
551 struct pci_sysdata *sd;
552
553 /*
554 * Allocate per-root-bus (not per bus) arch-specific data.
555 * TODO: leak; this memory is never freed.
556 * It's arguable whether it's worth the trouble to care.
557 */
558 sd = kzalloc(sizeof(*sd), GFP_KERNEL);
559 if (!sd) {
560 printk(KERN_ERR "PCI: OOM, skipping PCI bus %02x\n", busno);
561 return NULL;
562 }
563 sd->node = -1;
564 bus = pci_scan_bus(busno, &pci_root_ops, sd);
565 if (!bus)
566 kfree(sd);
567
568 return bus;
569 }
WRT350N Kernel Patches