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Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[wrt350n-kernel.git] / drivers / net / netx-eth.c
blob78d34af13a1ca8c59817a3c203b77e715ae6399d
1 /*
2 * drivers/net/netx-eth.c
3 *
4 * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20 #include <linux/init.h>
21 #include <linux/module.h>
22 #include <linux/kernel.h>
23 #include <linux/delay.h>
24
25 #include <linux/netdevice.h>
26 #include <linux/platform_device.h>
27 #include <linux/etherdevice.h>
28 #include <linux/skbuff.h>
29 #include <linux/mii.h>
30
31 #include <asm/io.h>
32 #include <asm/hardware.h>
33 #include <asm/arch/hardware.h>
34 #include <asm/arch/netx-regs.h>
35 #include <asm/arch/pfifo.h>
36 #include <asm/arch/xc.h>
37 #include <asm/arch/eth.h>
38
39 /* XC Fifo Offsets */
40 #define EMPTY_PTR_FIFO(xcno) (0 + ((xcno) << 3)) /* Index of the empty pointer FIFO */
41 #define IND_FIFO_PORT_HI(xcno) (1 + ((xcno) << 3)) /* Index of the FIFO where received */
42 /* Data packages are indicated by XC */
43 #define IND_FIFO_PORT_LO(xcno) (2 + ((xcno) << 3)) /* Index of the FIFO where received */
44 /* Data packages are indicated by XC */
45 #define REQ_FIFO_PORT_HI(xcno) (3 + ((xcno) << 3)) /* Index of the FIFO where Data packages */
46 /* have to be indicated by ARM which */
47 /* shall be sent */
48 #define REQ_FIFO_PORT_LO(xcno) (4 + ((xcno) << 3)) /* Index of the FIFO where Data packages */
49 /* have to be indicated by ARM which shall */
50 /* be sent */
51 #define CON_FIFO_PORT_HI(xcno) (5 + ((xcno) << 3)) /* Index of the FIFO where sent Data packages */
52 /* are confirmed */
53 #define CON_FIFO_PORT_LO(xcno) (6 + ((xcno) << 3)) /* Index of the FIFO where sent Data */
54 /* packages are confirmed */
55 #define PFIFO_MASK(xcno) (0x7f << (xcno*8))
56
57 #define FIFO_PTR_FRAMELEN_SHIFT 0
58 #define FIFO_PTR_FRAMELEN_MASK (0x7ff << 0)
59 #define FIFO_PTR_FRAMELEN(len) (((len) << 0) & FIFO_PTR_FRAMELEN_MASK)
60 #define FIFO_PTR_TIMETRIG (1<<11)
61 #define FIFO_PTR_MULTI_REQ
62 #define FIFO_PTR_ORIGIN (1<<14)
63 #define FIFO_PTR_VLAN (1<<15)
64 #define FIFO_PTR_FRAMENO_SHIFT 16
65 #define FIFO_PTR_FRAMENO_MASK (0x3f << 16)
66 #define FIFO_PTR_FRAMENO(no) (((no) << 16) & FIFO_PTR_FRAMENO_MASK)
67 #define FIFO_PTR_SEGMENT_SHIFT 22
68 #define FIFO_PTR_SEGMENT_MASK (0xf << 22)
69 #define FIFO_PTR_SEGMENT(seg) (((seg) & 0xf) << 22)
70 #define FIFO_PTR_ERROR_SHIFT 28
71 #define FIFO_PTR_ERROR_MASK (0xf << 28)
72
73 #define ISR_LINK_STATUS_CHANGE (1<<4)
74 #define ISR_IND_LO (1<<3)
75 #define ISR_CON_LO (1<<2)
76 #define ISR_IND_HI (1<<1)
77 #define ISR_CON_HI (1<<0)
78
79 #define ETH_MAC_LOCAL_CONFIG 0x1560
80 #define ETH_MAC_4321 0x1564
81 #define ETH_MAC_65 0x1568
82
83 #define MAC_TRAFFIC_CLASS_ARRANGEMENT_SHIFT 16
84 #define MAC_TRAFFIC_CLASS_ARRANGEMENT_MASK (0xf<<MAC_TRAFFIC_CLASS_ARRANGEMENT_SHIFT)
85 #define MAC_TRAFFIC_CLASS_ARRANGEMENT(x) (((x)<<MAC_TRAFFIC_CLASS_ARRANGEMENT_SHIFT) & MAC_TRAFFIC_CLASS_ARRANGEMENT_MASK)
86 #define LOCAL_CONFIG_LINK_STATUS_IRQ_EN (1<<24)
87 #define LOCAL_CONFIG_CON_LO_IRQ_EN (1<<23)
88 #define LOCAL_CONFIG_CON_HI_IRQ_EN (1<<22)
89 #define LOCAL_CONFIG_IND_LO_IRQ_EN (1<<21)
90 #define LOCAL_CONFIG_IND_HI_IRQ_EN (1<<20)
91
92 #define CARDNAME "netx-eth"
93
94 /* LSB must be zero */
95 #define INTERNAL_PHY_ADR 0x1c
96
97 struct netx_eth_priv {
98 void __iomem *sram_base, *xpec_base, *xmac_base;
99 int id;
100 struct mii_if_info mii;
101 u32 msg_enable;
102 struct xc *xc;
103 spinlock_t lock;
104 };
105
106 static void netx_eth_set_multicast_list(struct net_device *ndev)
107 {
108 /* implement me */
109 }
110
111 static int
112 netx_eth_hard_start_xmit(struct sk_buff *skb, struct net_device *ndev)
113 {
114 struct netx_eth_priv *priv = netdev_priv(ndev);
115 unsigned char *buf = skb->data;
116 unsigned int len = skb->len;
117
118 spin_lock_irq(&priv->lock);
119 memcpy_toio(priv->sram_base + 1560, (void *)buf, len);
120 if (len < 60) {
121 memset_io(priv->sram_base + 1560 + len, 0, 60 - len);
122 len = 60;
123 }
124
125 pfifo_push(REQ_FIFO_PORT_LO(priv->id),
126 FIFO_PTR_SEGMENT(priv->id) |
127 FIFO_PTR_FRAMENO(1) |
128 FIFO_PTR_FRAMELEN(len));
129
130 ndev->trans_start = jiffies;
131 ndev->stats.tx_packets++;
132 ndev->stats.tx_bytes += skb->len;
133
134 netif_stop_queue(ndev);
135 spin_unlock_irq(&priv->lock);
136 dev_kfree_skb(skb);
137
138 return 0;
139 }
140
141 static void netx_eth_receive(struct net_device *ndev)
142 {
143 struct netx_eth_priv *priv = netdev_priv(ndev);
144 unsigned int val, frameno, seg, len;
145 unsigned char *data;
146 struct sk_buff *skb;
147
148 val = pfifo_pop(IND_FIFO_PORT_LO(priv->id));
149
150 frameno = (val & FIFO_PTR_FRAMENO_MASK) >> FIFO_PTR_FRAMENO_SHIFT;
151 seg = (val & FIFO_PTR_SEGMENT_MASK) >> FIFO_PTR_SEGMENT_SHIFT;
152 len = (val & FIFO_PTR_FRAMELEN_MASK) >> FIFO_PTR_FRAMELEN_SHIFT;
153
154 skb = dev_alloc_skb(len);
155 if (unlikely(skb == NULL)) {
156 printk(KERN_NOTICE "%s: Low memory, packet dropped.\n",
157 ndev->name);
158 ndev->stats.rx_dropped++;
159 return;
160 }
161
162 data = skb_put(skb, len);
163
164 memcpy_fromio(data, priv->sram_base + frameno * 1560, len);
165
166 pfifo_push(EMPTY_PTR_FIFO(priv->id),
167 FIFO_PTR_SEGMENT(seg) | FIFO_PTR_FRAMENO(frameno));
168
169 ndev->last_rx = jiffies;
170 skb->protocol = eth_type_trans(skb, ndev);
171 netif_rx(skb);
172 ndev->stats.rx_packets++;
173 ndev->stats.rx_bytes += len;
174 }
175
176 static irqreturn_t
177 netx_eth_interrupt(int irq, void *dev_id)
178 {
179 struct net_device *ndev = dev_id;
180 struct netx_eth_priv *priv = netdev_priv(ndev);
181 int status;
182 unsigned long flags;
183
184 spin_lock_irqsave(&priv->lock, flags);
185
186 status = readl(NETX_PFIFO_XPEC_ISR(priv->id));
187 while (status) {
188 int fill_level;
189 writel(status, NETX_PFIFO_XPEC_ISR(priv->id));
190
191 if ((status & ISR_CON_HI) || (status & ISR_IND_HI))
192 printk("%s: unexpected status: 0x%08x\n",
193 __FUNCTION__, status);
194
195 fill_level =
196 readl(NETX_PFIFO_FILL_LEVEL(IND_FIFO_PORT_LO(priv->id)));
197 while (fill_level--)
198 netx_eth_receive(ndev);
199
200 if (status & ISR_CON_LO)
201 netif_wake_queue(ndev);
202
203 if (status & ISR_LINK_STATUS_CHANGE)
204 mii_check_media(&priv->mii, netif_msg_link(priv), 1);
205
206 status = readl(NETX_PFIFO_XPEC_ISR(priv->id));
207 }
208 spin_unlock_irqrestore(&priv->lock, flags);
209 return IRQ_HANDLED;
210 }
211
212 static int netx_eth_open(struct net_device *ndev)
213 {
214 struct netx_eth_priv *priv = netdev_priv(ndev);
215
216 if (request_irq
217 (ndev->irq, &netx_eth_interrupt, IRQF_SHARED, ndev->name, ndev))
218 return -EAGAIN;
219
220 writel(ndev->dev_addr[0] |
221 ndev->dev_addr[1]<<8 |
222 ndev->dev_addr[2]<<16 |
223 ndev->dev_addr[3]<<24,
224 priv->xpec_base + NETX_XPEC_RAM_START_OFS + ETH_MAC_4321);
225 writel(ndev->dev_addr[4] |
226 ndev->dev_addr[5]<<8,
227 priv->xpec_base + NETX_XPEC_RAM_START_OFS + ETH_MAC_65);
228
229 writel(LOCAL_CONFIG_LINK_STATUS_IRQ_EN |
230 LOCAL_CONFIG_CON_LO_IRQ_EN |
231 LOCAL_CONFIG_CON_HI_IRQ_EN |
232 LOCAL_CONFIG_IND_LO_IRQ_EN |
233 LOCAL_CONFIG_IND_HI_IRQ_EN,
234 priv->xpec_base + NETX_XPEC_RAM_START_OFS +
235 ETH_MAC_LOCAL_CONFIG);
236
237 mii_check_media(&priv->mii, netif_msg_link(priv), 1);
238 netif_start_queue(ndev);
239
240 return 0;
241 }
242
243 static int netx_eth_close(struct net_device *ndev)
244 {
245 struct netx_eth_priv *priv = netdev_priv(ndev);
246
247 netif_stop_queue(ndev);
248
249 writel(0,
250 priv->xpec_base + NETX_XPEC_RAM_START_OFS + ETH_MAC_LOCAL_CONFIG);
251
252 free_irq(ndev->irq, ndev);
253
254 return 0;
255 }
256
257 static void netx_eth_timeout(struct net_device *ndev)
258 {
259 struct netx_eth_priv *priv = netdev_priv(ndev);
260 int i;
261
262 printk(KERN_ERR "%s: transmit timed out, resetting\n", ndev->name);
263
264 spin_lock_irq(&priv->lock);
265
266 xc_reset(priv->xc);
267 xc_start(priv->xc);
268
269 for (i=2; i<=18; i++)
270 pfifo_push(EMPTY_PTR_FIFO(priv->id),
271 FIFO_PTR_FRAMENO(i) | FIFO_PTR_SEGMENT(priv->id));
272
273 spin_unlock_irq(&priv->lock);
274
275 netif_wake_queue(ndev);
276 }
277
278 static int
279 netx_eth_phy_read(struct net_device *ndev, int phy_id, int reg)
280 {
281 unsigned int val;
282
283 val = MIIMU_SNRDY | MIIMU_PREAMBLE | MIIMU_PHYADDR(phy_id) |
284 MIIMU_REGADDR(reg) | MIIMU_PHY_NRES;
285
286 writel(val, NETX_MIIMU);
287 while (readl(NETX_MIIMU) & MIIMU_SNRDY);
288
289 return readl(NETX_MIIMU) >> 16;
290
291 }
292
293 static void
294 netx_eth_phy_write(struct net_device *ndev, int phy_id, int reg, int value)
295 {
296 unsigned int val;
297
298 val = MIIMU_SNRDY | MIIMU_PREAMBLE | MIIMU_PHYADDR(phy_id) |
299 MIIMU_REGADDR(reg) | MIIMU_PHY_NRES | MIIMU_OPMODE_WRITE |
300 MIIMU_DATA(value);
301
302 writel(val, NETX_MIIMU);
303 while (readl(NETX_MIIMU) & MIIMU_SNRDY);
304 }
305
306 static int netx_eth_enable(struct net_device *ndev)
307 {
308 struct netx_eth_priv *priv = netdev_priv(ndev);
309 unsigned int mac4321, mac65;
310 int running, i;
311
312 ether_setup(ndev);
313
314 ndev->open = netx_eth_open;
315 ndev->stop = netx_eth_close;
316 ndev->hard_start_xmit = netx_eth_hard_start_xmit;
317 ndev->tx_timeout = netx_eth_timeout;
318 ndev->watchdog_timeo = msecs_to_jiffies(5000);
319 ndev->set_multicast_list = netx_eth_set_multicast_list;
320
321 priv->msg_enable = NETIF_MSG_LINK;
322 priv->mii.phy_id_mask = 0x1f;
323 priv->mii.reg_num_mask = 0x1f;
324 priv->mii.force_media = 0;
325 priv->mii.full_duplex = 0;
326 priv->mii.dev = ndev;
327 priv->mii.mdio_read = netx_eth_phy_read;
328 priv->mii.mdio_write = netx_eth_phy_write;
329 priv->mii.phy_id = INTERNAL_PHY_ADR + priv->id;
330
331 running = xc_running(priv->xc);
332 xc_stop(priv->xc);
333
334 /* if the xc engine is already running, assume the bootloader has
335 * loaded the firmware for us
336 */
337 if (running) {
338 /* get Node Address from hardware */
339 mac4321 = readl(priv->xpec_base +
340 NETX_XPEC_RAM_START_OFS + ETH_MAC_4321);
341 mac65 = readl(priv->xpec_base +
342 NETX_XPEC_RAM_START_OFS + ETH_MAC_65);
343
344 ndev->dev_addr[0] = mac4321 & 0xff;
345 ndev->dev_addr[1] = (mac4321 >> 8) & 0xff;
346 ndev->dev_addr[2] = (mac4321 >> 16) & 0xff;
347 ndev->dev_addr[3] = (mac4321 >> 24) & 0xff;
348 ndev->dev_addr[4] = mac65 & 0xff;
349 ndev->dev_addr[5] = (mac65 >> 8) & 0xff;
350 } else {
351 if (xc_request_firmware(priv->xc)) {
352 printk(CARDNAME ": requesting firmware failed\n");
353 return -ENODEV;
354 }
355 }
356
357 xc_reset(priv->xc);
358 xc_start(priv->xc);
359
360 if (!is_valid_ether_addr(ndev->dev_addr))
361 printk("%s: Invalid ethernet MAC address. Please "
362 "set using ifconfig\n", ndev->name);
363
364 for (i=2; i<=18; i++)
365 pfifo_push(EMPTY_PTR_FIFO(priv->id),
366 FIFO_PTR_FRAMENO(i) | FIFO_PTR_SEGMENT(priv->id));
367
368 return register_netdev(ndev);
369
370 }
371
372 static int netx_eth_drv_probe(struct platform_device *pdev)
373 {
374 struct netx_eth_priv *priv;
375 struct net_device *ndev;
376 struct netxeth_platform_data *pdata;
377 int ret;
378
379 ndev = alloc_etherdev(sizeof (struct netx_eth_priv));
380 if (!ndev) {
381 printk("%s: could not allocate device.\n", CARDNAME);
382 ret = -ENOMEM;
383 goto exit;
384 }
385 SET_NETDEV_DEV(ndev, &pdev->dev);
386
387 platform_set_drvdata(pdev, ndev);
388
389 priv = netdev_priv(ndev);
390
391 pdata = (struct netxeth_platform_data *)pdev->dev.platform_data;
392 priv->xc = request_xc(pdata->xcno, &pdev->dev);
393 if (!priv->xc) {
394 dev_err(&pdev->dev, "unable to request xc engine\n");
395 ret = -ENODEV;
396 goto exit_free_netdev;
397 }
398
399 ndev->irq = priv->xc->irq;
400 priv->id = pdev->id;
401 priv->xpec_base = priv->xc->xpec_base;
402 priv->xmac_base = priv->xc->xmac_base;
403 priv->sram_base = priv->xc->sram_base;
404
405 ret = pfifo_request(PFIFO_MASK(priv->id));
406 if (ret) {
407 printk("unable to request PFIFO\n");
408 goto exit_free_xc;
409 }
410
411 ret = netx_eth_enable(ndev);
412 if (ret)
413 goto exit_free_pfifo;
414
415 return 0;
416 exit_free_pfifo:
417 pfifo_free(PFIFO_MASK(priv->id));
418 exit_free_xc:
419 free_xc(priv->xc);
420 exit_free_netdev:
421 platform_set_drvdata(pdev, NULL);
422 free_netdev(ndev);
423 exit:
424 return ret;
425 }
426
427 static int netx_eth_drv_remove(struct platform_device *pdev)
428 {
429 struct net_device *ndev = dev_get_drvdata(&pdev->dev);
430 struct netx_eth_priv *priv = netdev_priv(ndev);
431
432 platform_set_drvdata(pdev, NULL);
433
434 unregister_netdev(ndev);
435 xc_stop(priv->xc);
436 free_xc(priv->xc);
437 free_netdev(ndev);
438 pfifo_free(PFIFO_MASK(priv->id));
439
440 return 0;
441 }
442
443 static int netx_eth_drv_suspend(struct platform_device *pdev, pm_message_t state)
444 {
445 dev_err(&pdev->dev, "suspend not implemented\n");
446 return 0;
447 }
448
449 static int netx_eth_drv_resume(struct platform_device *pdev)
450 {
451 dev_err(&pdev->dev, "resume not implemented\n");
452 return 0;
453 }
454
455 static struct platform_driver netx_eth_driver = {
456 .probe = netx_eth_drv_probe,
457 .remove = netx_eth_drv_remove,
458 .suspend = netx_eth_drv_suspend,
459 .resume = netx_eth_drv_resume,
460 .driver = {
461 .name = CARDNAME,
462 .owner = THIS_MODULE,
463 },
464 };
465
466 static int __init netx_eth_init(void)
467 {
468 unsigned int phy_control, val;
469
470 printk("NetX Ethernet driver\n");
471
472 phy_control = PHY_CONTROL_PHY_ADDRESS(INTERNAL_PHY_ADR>>1) |
473 PHY_CONTROL_PHY1_MODE(PHY_MODE_ALL) |
474 PHY_CONTROL_PHY1_AUTOMDIX |
475 PHY_CONTROL_PHY1_EN |
476 PHY_CONTROL_PHY0_MODE(PHY_MODE_ALL) |
477 PHY_CONTROL_PHY0_AUTOMDIX |
478 PHY_CONTROL_PHY0_EN |
479 PHY_CONTROL_CLK_XLATIN;
480
481 val = readl(NETX_SYSTEM_IOC_ACCESS_KEY);
482 writel(val, NETX_SYSTEM_IOC_ACCESS_KEY);
483
484 writel(phy_control | PHY_CONTROL_RESET, NETX_SYSTEM_PHY_CONTROL);
485 udelay(100);
486
487 val = readl(NETX_SYSTEM_IOC_ACCESS_KEY);
488 writel(val, NETX_SYSTEM_IOC_ACCESS_KEY);
489
490 writel(phy_control, NETX_SYSTEM_PHY_CONTROL);
491
492 return platform_driver_register(&netx_eth_driver);
493 }
494
495 static void __exit netx_eth_cleanup(void)
496 {
497 platform_driver_unregister(&netx_eth_driver);
498 }
499
500 module_init(netx_eth_init);
501 module_exit(netx_eth_cleanup);
502
503 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
504 MODULE_LICENSE("GPL");
505
WRT350N Kernel Patches