3 Broadcom B43legacy wireless driver
5 DMA ringbuffer and descriptor allocation/management
7 Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
9 Some code in this file is derived from the b44.c driver
10 Copyright (C) 2002 David S. Miller
11 Copyright (C) Pekka Pietikainen
13 This program is free software; you can redistribute it and/or modify
14 it under the terms of the GNU General Public License as published by
15 the Free Software Foundation; either version 2 of the License, or
16 (at your option) any later version.
18 This program is distributed in the hope that it will be useful,
19 but WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 GNU General Public License for more details.
23 You should have received a copy of the GNU General Public License
24 along with this program; see the file COPYING. If not, write to
25 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
26 Boston, MA 02110-1301, USA.
30 #include "b43legacy.h"
36 #include <linux/dma-mapping.h>
37 #include <linux/pci.h>
38 #include <linux/delay.h>
39 #include <linux/skbuff.h>
44 struct b43legacy_dmadesc_generic
*op32_idx2desc(
45 struct b43legacy_dmaring
*ring
,
47 struct b43legacy_dmadesc_meta
**meta
)
49 struct b43legacy_dmadesc32
*desc
;
51 *meta
= &(ring
->meta
[slot
]);
52 desc
= ring
->descbase
;
55 return (struct b43legacy_dmadesc_generic
*)desc
;
58 static void op32_fill_descriptor(struct b43legacy_dmaring
*ring
,
59 struct b43legacy_dmadesc_generic
*desc
,
60 dma_addr_t dmaaddr
, u16 bufsize
,
61 int start
, int end
, int irq
)
63 struct b43legacy_dmadesc32
*descbase
= ring
->descbase
;
69 slot
= (int)(&(desc
->dma32
) - descbase
);
70 B43legacy_WARN_ON(!(slot
>= 0 && slot
< ring
->nr_slots
));
72 addr
= (u32
)(dmaaddr
& ~SSB_DMA_TRANSLATION_MASK
);
73 addrext
= (u32
)(dmaaddr
& SSB_DMA_TRANSLATION_MASK
)
74 >> SSB_DMA_TRANSLATION_SHIFT
;
75 addr
|= ssb_dma_translation(ring
->dev
->dev
);
76 ctl
= (bufsize
- ring
->frameoffset
)
77 & B43legacy_DMA32_DCTL_BYTECNT
;
78 if (slot
== ring
->nr_slots
- 1)
79 ctl
|= B43legacy_DMA32_DCTL_DTABLEEND
;
81 ctl
|= B43legacy_DMA32_DCTL_FRAMESTART
;
83 ctl
|= B43legacy_DMA32_DCTL_FRAMEEND
;
85 ctl
|= B43legacy_DMA32_DCTL_IRQ
;
86 ctl
|= (addrext
<< B43legacy_DMA32_DCTL_ADDREXT_SHIFT
)
87 & B43legacy_DMA32_DCTL_ADDREXT_MASK
;
89 desc
->dma32
.control
= cpu_to_le32(ctl
);
90 desc
->dma32
.address
= cpu_to_le32(addr
);
93 static void op32_poke_tx(struct b43legacy_dmaring
*ring
, int slot
)
95 b43legacy_dma_write(ring
, B43legacy_DMA32_TXINDEX
,
96 (u32
)(slot
* sizeof(struct b43legacy_dmadesc32
)));
99 static void op32_tx_suspend(struct b43legacy_dmaring
*ring
)
101 b43legacy_dma_write(ring
, B43legacy_DMA32_TXCTL
,
102 b43legacy_dma_read(ring
, B43legacy_DMA32_TXCTL
)
103 | B43legacy_DMA32_TXSUSPEND
);
106 static void op32_tx_resume(struct b43legacy_dmaring
*ring
)
108 b43legacy_dma_write(ring
, B43legacy_DMA32_TXCTL
,
109 b43legacy_dma_read(ring
, B43legacy_DMA32_TXCTL
)
110 & ~B43legacy_DMA32_TXSUSPEND
);
113 static int op32_get_current_rxslot(struct b43legacy_dmaring
*ring
)
117 val
= b43legacy_dma_read(ring
, B43legacy_DMA32_RXSTATUS
);
118 val
&= B43legacy_DMA32_RXDPTR
;
120 return (val
/ sizeof(struct b43legacy_dmadesc32
));
123 static void op32_set_current_rxslot(struct b43legacy_dmaring
*ring
,
126 b43legacy_dma_write(ring
, B43legacy_DMA32_RXINDEX
,
127 (u32
)(slot
* sizeof(struct b43legacy_dmadesc32
)));
130 static const struct b43legacy_dma_ops dma32_ops
= {
131 .idx2desc
= op32_idx2desc
,
132 .fill_descriptor
= op32_fill_descriptor
,
133 .poke_tx
= op32_poke_tx
,
134 .tx_suspend
= op32_tx_suspend
,
135 .tx_resume
= op32_tx_resume
,
136 .get_current_rxslot
= op32_get_current_rxslot
,
137 .set_current_rxslot
= op32_set_current_rxslot
,
142 struct b43legacy_dmadesc_generic
*op64_idx2desc(
143 struct b43legacy_dmaring
*ring
,
145 struct b43legacy_dmadesc_meta
148 struct b43legacy_dmadesc64
*desc
;
150 *meta
= &(ring
->meta
[slot
]);
151 desc
= ring
->descbase
;
152 desc
= &(desc
[slot
]);
154 return (struct b43legacy_dmadesc_generic
*)desc
;
157 static void op64_fill_descriptor(struct b43legacy_dmaring
*ring
,
158 struct b43legacy_dmadesc_generic
*desc
,
159 dma_addr_t dmaaddr
, u16 bufsize
,
160 int start
, int end
, int irq
)
162 struct b43legacy_dmadesc64
*descbase
= ring
->descbase
;
170 slot
= (int)(&(desc
->dma64
) - descbase
);
171 B43legacy_WARN_ON(!(slot
>= 0 && slot
< ring
->nr_slots
));
173 addrlo
= (u32
)(dmaaddr
& 0xFFFFFFFF);
174 addrhi
= (((u64
)dmaaddr
>> 32) & ~SSB_DMA_TRANSLATION_MASK
);
175 addrext
= (((u64
)dmaaddr
>> 32) & SSB_DMA_TRANSLATION_MASK
)
176 >> SSB_DMA_TRANSLATION_SHIFT
;
177 addrhi
|= ssb_dma_translation(ring
->dev
->dev
);
178 if (slot
== ring
->nr_slots
- 1)
179 ctl0
|= B43legacy_DMA64_DCTL0_DTABLEEND
;
181 ctl0
|= B43legacy_DMA64_DCTL0_FRAMESTART
;
183 ctl0
|= B43legacy_DMA64_DCTL0_FRAMEEND
;
185 ctl0
|= B43legacy_DMA64_DCTL0_IRQ
;
186 ctl1
|= (bufsize
- ring
->frameoffset
)
187 & B43legacy_DMA64_DCTL1_BYTECNT
;
188 ctl1
|= (addrext
<< B43legacy_DMA64_DCTL1_ADDREXT_SHIFT
)
189 & B43legacy_DMA64_DCTL1_ADDREXT_MASK
;
191 desc
->dma64
.control0
= cpu_to_le32(ctl0
);
192 desc
->dma64
.control1
= cpu_to_le32(ctl1
);
193 desc
->dma64
.address_low
= cpu_to_le32(addrlo
);
194 desc
->dma64
.address_high
= cpu_to_le32(addrhi
);
197 static void op64_poke_tx(struct b43legacy_dmaring
*ring
, int slot
)
199 b43legacy_dma_write(ring
, B43legacy_DMA64_TXINDEX
,
200 (u32
)(slot
* sizeof(struct b43legacy_dmadesc64
)));
203 static void op64_tx_suspend(struct b43legacy_dmaring
*ring
)
205 b43legacy_dma_write(ring
, B43legacy_DMA64_TXCTL
,
206 b43legacy_dma_read(ring
, B43legacy_DMA64_TXCTL
)
207 | B43legacy_DMA64_TXSUSPEND
);
210 static void op64_tx_resume(struct b43legacy_dmaring
*ring
)
212 b43legacy_dma_write(ring
, B43legacy_DMA64_TXCTL
,
213 b43legacy_dma_read(ring
, B43legacy_DMA64_TXCTL
)
214 & ~B43legacy_DMA64_TXSUSPEND
);
217 static int op64_get_current_rxslot(struct b43legacy_dmaring
*ring
)
221 val
= b43legacy_dma_read(ring
, B43legacy_DMA64_RXSTATUS
);
222 val
&= B43legacy_DMA64_RXSTATDPTR
;
224 return (val
/ sizeof(struct b43legacy_dmadesc64
));
227 static void op64_set_current_rxslot(struct b43legacy_dmaring
*ring
,
230 b43legacy_dma_write(ring
, B43legacy_DMA64_RXINDEX
,
231 (u32
)(slot
* sizeof(struct b43legacy_dmadesc64
)));
234 static const struct b43legacy_dma_ops dma64_ops
= {
235 .idx2desc
= op64_idx2desc
,
236 .fill_descriptor
= op64_fill_descriptor
,
237 .poke_tx
= op64_poke_tx
,
238 .tx_suspend
= op64_tx_suspend
,
239 .tx_resume
= op64_tx_resume
,
240 .get_current_rxslot
= op64_get_current_rxslot
,
241 .set_current_rxslot
= op64_set_current_rxslot
,
245 static inline int free_slots(struct b43legacy_dmaring
*ring
)
247 return (ring
->nr_slots
- ring
->used_slots
);
250 static inline int next_slot(struct b43legacy_dmaring
*ring
, int slot
)
252 B43legacy_WARN_ON(!(slot
>= -1 && slot
<= ring
->nr_slots
- 1));
253 if (slot
== ring
->nr_slots
- 1)
258 static inline int prev_slot(struct b43legacy_dmaring
*ring
, int slot
)
260 B43legacy_WARN_ON(!(slot
>= 0 && slot
<= ring
->nr_slots
- 1));
262 return ring
->nr_slots
- 1;
266 #ifdef CONFIG_B43LEGACY_DEBUG
267 static void update_max_used_slots(struct b43legacy_dmaring
*ring
,
268 int current_used_slots
)
270 if (current_used_slots
<= ring
->max_used_slots
)
272 ring
->max_used_slots
= current_used_slots
;
273 if (b43legacy_debug(ring
->dev
, B43legacy_DBG_DMAVERBOSE
))
274 b43legacydbg(ring
->dev
->wl
,
275 "max_used_slots increased to %d on %s ring %d\n",
276 ring
->max_used_slots
,
277 ring
->tx
? "TX" : "RX",
282 void update_max_used_slots(struct b43legacy_dmaring
*ring
,
283 int current_used_slots
)
287 /* Request a slot for usage. */
289 int request_slot(struct b43legacy_dmaring
*ring
)
293 B43legacy_WARN_ON(!ring
->tx
);
294 B43legacy_WARN_ON(ring
->stopped
);
295 B43legacy_WARN_ON(free_slots(ring
) == 0);
297 slot
= next_slot(ring
, ring
->current_slot
);
298 ring
->current_slot
= slot
;
301 update_max_used_slots(ring
, ring
->used_slots
);
306 /* Mac80211-queue to b43legacy-ring mapping */
307 static struct b43legacy_dmaring
*priority_to_txring(
308 struct b43legacy_wldev
*dev
,
311 struct b43legacy_dmaring
*ring
;
313 /*FIXME: For now we always run on TX-ring-1 */
314 return dev
->dma
.tx_ring1
;
316 /* 0 = highest priority */
317 switch (queue_priority
) {
319 B43legacy_WARN_ON(1);
322 ring
= dev
->dma
.tx_ring3
;
325 ring
= dev
->dma
.tx_ring2
;
328 ring
= dev
->dma
.tx_ring1
;
331 ring
= dev
->dma
.tx_ring0
;
334 ring
= dev
->dma
.tx_ring4
;
337 ring
= dev
->dma
.tx_ring5
;
344 /* Bcm4301-ring to mac80211-queue mapping */
345 static inline int txring_to_priority(struct b43legacy_dmaring
*ring
)
347 static const u8 idx_to_prio
[] =
348 { 3, 2, 1, 0, 4, 5, };
350 /*FIXME: have only one queue, for now */
353 return idx_to_prio
[ring
->index
];
357 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
358 u16
b43legacy_dmacontroller_base(int dma64bit
, int controller_idx
)
360 static u16
b43legacy_dmacontroller_base(enum b43legacy_dmatype type
,
362 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
364 static const u16 map64
[] = {
365 B43legacy_MMIO_DMA64_BASE0
,
366 B43legacy_MMIO_DMA64_BASE1
,
367 B43legacy_MMIO_DMA64_BASE2
,
368 B43legacy_MMIO_DMA64_BASE3
,
369 B43legacy_MMIO_DMA64_BASE4
,
370 B43legacy_MMIO_DMA64_BASE5
,
372 static const u16 map32
[] = {
373 B43legacy_MMIO_DMA32_BASE0
,
374 B43legacy_MMIO_DMA32_BASE1
,
375 B43legacy_MMIO_DMA32_BASE2
,
376 B43legacy_MMIO_DMA32_BASE3
,
377 B43legacy_MMIO_DMA32_BASE4
,
378 B43legacy_MMIO_DMA32_BASE5
,
381 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
384 if (type
== B43legacy_DMA_64BIT
) {
385 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
386 B43legacy_WARN_ON(!(controller_idx
>= 0 &&
387 controller_idx
< ARRAY_SIZE(map64
)));
388 return map64
[controller_idx
];
390 B43legacy_WARN_ON(!(controller_idx
>= 0 &&
391 controller_idx
< ARRAY_SIZE(map32
)));
392 return map32
[controller_idx
];
396 dma_addr_t
map_descbuffer(struct b43legacy_dmaring
*ring
,
404 dmaaddr
= dma_map_single(ring
->dev
->dev
->dev
,
408 dmaaddr
= dma_map_single(ring
->dev
->dev
->dev
,
416 void unmap_descbuffer(struct b43legacy_dmaring
*ring
,
422 dma_unmap_single(ring
->dev
->dev
->dev
,
426 dma_unmap_single(ring
->dev
->dev
->dev
,
432 void sync_descbuffer_for_cpu(struct b43legacy_dmaring
*ring
,
436 B43legacy_WARN_ON(ring
->tx
);
438 dma_sync_single_for_cpu(ring
->dev
->dev
->dev
,
439 addr
, len
, DMA_FROM_DEVICE
);
443 void sync_descbuffer_for_device(struct b43legacy_dmaring
*ring
,
447 B43legacy_WARN_ON(ring
->tx
);
449 dma_sync_single_for_device(ring
->dev
->dev
->dev
,
450 addr
, len
, DMA_FROM_DEVICE
);
454 void free_descriptor_buffer(struct b43legacy_dmaring
*ring
,
455 struct b43legacy_dmadesc_meta
*meta
,
460 dev_kfree_skb_irq(meta
->skb
);
462 dev_kfree_skb(meta
->skb
);
467 static int alloc_ringmemory(struct b43legacy_dmaring
*ring
)
469 struct device
*dev
= ring
->dev
->dev
->dev
;
471 ring
->descbase
= dma_alloc_coherent(dev
, B43legacy_DMA_RINGMEMSIZE
,
472 &(ring
->dmabase
), GFP_KERNEL
);
473 if (!ring
->descbase
) {
474 b43legacyerr(ring
->dev
->wl
, "DMA ringmemory allocation"
478 memset(ring
->descbase
, 0, B43legacy_DMA_RINGMEMSIZE
);
483 static void free_ringmemory(struct b43legacy_dmaring
*ring
)
485 struct device
*dev
= ring
->dev
->dev
->dev
;
487 dma_free_coherent(dev
, B43legacy_DMA_RINGMEMSIZE
,
488 ring
->descbase
, ring
->dmabase
);
491 /* Reset the RX DMA channel */
492 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
493 int b43legacy_dmacontroller_rx_reset(struct b43legacy_wldev
*dev
,
494 u16 mmio_base
, int dma64
)
496 static int b43legacy_dmacontroller_rx_reset(struct b43legacy_wldev
*dev
,
498 enum b43legacy_dmatype type
)
499 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
507 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
508 offset
= dma64
? B43legacy_DMA64_RXCTL
: B43legacy_DMA32_RXCTL
;
510 offset
= (type
== B43legacy_DMA_64BIT
) ?
511 B43legacy_DMA64_RXCTL
: B43legacy_DMA32_RXCTL
;
512 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
513 b43legacy_write32(dev
, mmio_base
+ offset
, 0);
514 for (i
= 0; i
< 10; i
++) {
515 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
516 offset
= dma64
? B43legacy_DMA64_RXSTATUS
:
517 B43legacy_DMA32_RXSTATUS
;
519 offset
= (type
== B43legacy_DMA_64BIT
) ?
520 B43legacy_DMA64_RXSTATUS
: B43legacy_DMA32_RXSTATUS
;
521 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
522 value
= b43legacy_read32(dev
, mmio_base
+ offset
);
523 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
526 if (type
== B43legacy_DMA_64BIT
) {
527 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
528 value
&= B43legacy_DMA64_RXSTAT
;
529 if (value
== B43legacy_DMA64_RXSTAT_DISABLED
) {
534 value
&= B43legacy_DMA32_RXSTATE
;
535 if (value
== B43legacy_DMA32_RXSTAT_DISABLED
) {
543 b43legacyerr(dev
->wl
, "DMA RX reset timed out\n");
550 /* Reset the RX DMA channel */
551 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
552 int b43legacy_dmacontroller_tx_reset(struct b43legacy_wldev
*dev
,
553 u16 mmio_base
, int dma64
)
555 static int b43legacy_dmacontroller_tx_reset(struct b43legacy_wldev
*dev
,
557 enum b43legacy_dmatype type
)
558 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
566 for (i
= 0; i
< 10; i
++) {
567 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
568 offset
= dma64
? B43legacy_DMA64_TXSTATUS
:
569 B43legacy_DMA32_TXSTATUS
;
571 offset
= (type
== B43legacy_DMA_64BIT
) ?
572 B43legacy_DMA64_TXSTATUS
: B43legacy_DMA32_TXSTATUS
;
573 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
574 value
= b43legacy_read32(dev
, mmio_base
+ offset
);
575 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
578 if (type
== B43legacy_DMA_64BIT
) {
579 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
580 value
&= B43legacy_DMA64_TXSTAT
;
581 if (value
== B43legacy_DMA64_TXSTAT_DISABLED
||
582 value
== B43legacy_DMA64_TXSTAT_IDLEWAIT
||
583 value
== B43legacy_DMA64_TXSTAT_STOPPED
)
586 value
&= B43legacy_DMA32_TXSTATE
;
587 if (value
== B43legacy_DMA32_TXSTAT_DISABLED
||
588 value
== B43legacy_DMA32_TXSTAT_IDLEWAIT
||
589 value
== B43legacy_DMA32_TXSTAT_STOPPED
)
594 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
595 offset
= dma64
? B43legacy_DMA64_TXCTL
: B43legacy_DMA32_TXCTL
;
597 offset
= (type
== B43legacy_DMA_64BIT
) ? B43legacy_DMA64_TXCTL
:
598 B43legacy_DMA32_TXCTL
;
599 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
600 b43legacy_write32(dev
, mmio_base
+ offset
, 0);
601 for (i
= 0; i
< 10; i
++) {
602 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
603 offset
= dma64
? B43legacy_DMA64_TXSTATUS
:
604 B43legacy_DMA32_TXSTATUS
;
606 offset
= (type
== B43legacy_DMA_64BIT
) ?
607 B43legacy_DMA64_TXSTATUS
: B43legacy_DMA32_TXSTATUS
;
608 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
609 value
= b43legacy_read32(dev
, mmio_base
+ offset
);
610 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
613 if (type
== B43legacy_DMA_64BIT
) {
614 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
615 value
&= B43legacy_DMA64_TXSTAT
;
616 if (value
== B43legacy_DMA64_TXSTAT_DISABLED
) {
621 value
&= B43legacy_DMA32_TXSTATE
;
622 if (value
== B43legacy_DMA32_TXSTAT_DISABLED
) {
630 b43legacyerr(dev
->wl
, "DMA TX reset timed out\n");
633 /* ensure the reset is completed. */
639 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
641 /* Check if a DMA mapping address is invalid. */
642 static bool b43legacy_dma_mapping_error(struct b43legacy_dmaring
*ring
,
646 if (unlikely(dma_mapping_error(addr
)))
649 switch (ring
->type
) {
650 case B43legacy_DMA_30BIT
:
651 if ((u64
)addr
+ buffersize
> (1ULL << 30))
654 case B43legacy_DMA_32BIT
:
655 if ((u64
)addr
+ buffersize
> (1ULL << 32))
658 case B43legacy_DMA_64BIT
:
659 /* Currently we can't have addresses beyond 64 bits in the kernel. */
663 /* The address is OK. */
667 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
668 static int setup_rx_descbuffer(struct b43legacy_dmaring
*ring
,
669 struct b43legacy_dmadesc_generic
*desc
,
670 struct b43legacy_dmadesc_meta
*meta
,
673 struct b43legacy_rxhdr_fw3
*rxhdr
;
674 struct b43legacy_hwtxstatus
*txstat
;
678 B43legacy_WARN_ON(ring
->tx
);
680 skb
= __dev_alloc_skb(ring
->rx_buffersize
, gfp_flags
);
683 dmaaddr
= map_descbuffer(ring
, skb
->data
,
684 ring
->rx_buffersize
, 0);
685 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
686 if (dma_mapping_error(dmaaddr
)) {
688 if (b43legacy_dma_mapping_error(ring
, dmaaddr
, ring
->rx_buffersize
)) {
689 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
690 /* ugh. try to realloc in zone_dma */
691 gfp_flags
|= GFP_DMA
;
693 dev_kfree_skb_any(skb
);
695 skb
= __dev_alloc_skb(ring
->rx_buffersize
, gfp_flags
);
698 dmaaddr
= map_descbuffer(ring
, skb
->data
,
699 ring
->rx_buffersize
, 0);
702 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
703 if (dma_mapping_error(dmaaddr
)) {
705 if (b43legacy_dma_mapping_error(ring
, dmaaddr
, ring
->rx_buffersize
)) {
706 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
707 dev_kfree_skb_any(skb
);
712 meta
->dmaaddr
= dmaaddr
;
713 ring
->ops
->fill_descriptor(ring
, desc
, dmaaddr
,
714 ring
->rx_buffersize
, 0, 0, 0);
716 rxhdr
= (struct b43legacy_rxhdr_fw3
*)(skb
->data
);
717 rxhdr
->frame_len
= 0;
718 txstat
= (struct b43legacy_hwtxstatus
*)(skb
->data
);
724 /* Allocate the initial descbuffers.
725 * This is used for an RX ring only.
727 static int alloc_initial_descbuffers(struct b43legacy_dmaring
*ring
)
731 struct b43legacy_dmadesc_generic
*desc
;
732 struct b43legacy_dmadesc_meta
*meta
;
734 for (i
= 0; i
< ring
->nr_slots
; i
++) {
735 desc
= ring
->ops
->idx2desc(ring
, i
, &meta
);
737 err
= setup_rx_descbuffer(ring
, desc
, meta
, GFP_KERNEL
);
739 b43legacyerr(ring
->dev
->wl
,
740 "Failed to allocate initial descbuffers\n");
744 mb(); /* all descbuffer setup before next line */
745 ring
->used_slots
= ring
->nr_slots
;
751 for (i
--; i
>= 0; i
--) {
752 desc
= ring
->ops
->idx2desc(ring
, i
, &meta
);
754 unmap_descbuffer(ring
, meta
->dmaaddr
, ring
->rx_buffersize
, 0);
755 dev_kfree_skb(meta
->skb
);
760 /* Do initial setup of the DMA controller.
761 * Reset the controller, write the ring busaddress
762 * and switch the "enable" bit on.
764 static int dmacontroller_setup(struct b43legacy_dmaring
*ring
)
769 u32 trans
= ssb_dma_translation(ring
->dev
->dev
);
772 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
775 if (ring
->type
== B43legacy_DMA_64BIT
) {
776 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
777 u64 ringbase
= (u64
)(ring
->dmabase
);
779 addrext
= ((ringbase
>> 32) & SSB_DMA_TRANSLATION_MASK
)
780 >> SSB_DMA_TRANSLATION_SHIFT
;
781 value
= B43legacy_DMA64_TXENABLE
;
782 value
|= (addrext
<< B43legacy_DMA64_TXADDREXT_SHIFT
)
783 & B43legacy_DMA64_TXADDREXT_MASK
;
784 b43legacy_dma_write(ring
, B43legacy_DMA64_TXCTL
,
786 b43legacy_dma_write(ring
, B43legacy_DMA64_TXRINGLO
,
787 (ringbase
& 0xFFFFFFFF));
788 b43legacy_dma_write(ring
, B43legacy_DMA64_TXRINGHI
,
790 & ~SSB_DMA_TRANSLATION_MASK
)
793 u32 ringbase
= (u32
)(ring
->dmabase
);
795 addrext
= (ringbase
& SSB_DMA_TRANSLATION_MASK
)
796 >> SSB_DMA_TRANSLATION_SHIFT
;
797 value
= B43legacy_DMA32_TXENABLE
;
798 value
|= (addrext
<< B43legacy_DMA32_TXADDREXT_SHIFT
)
799 & B43legacy_DMA32_TXADDREXT_MASK
;
800 b43legacy_dma_write(ring
, B43legacy_DMA32_TXCTL
,
802 b43legacy_dma_write(ring
, B43legacy_DMA32_TXRING
,
804 ~SSB_DMA_TRANSLATION_MASK
)
808 err
= alloc_initial_descbuffers(ring
);
811 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
814 if (ring
->type
== B43legacy_DMA_64BIT
) {
815 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
816 u64 ringbase
= (u64
)(ring
->dmabase
);
818 addrext
= ((ringbase
>> 32) & SSB_DMA_TRANSLATION_MASK
)
819 >> SSB_DMA_TRANSLATION_SHIFT
;
820 value
= (ring
->frameoffset
<<
821 B43legacy_DMA64_RXFROFF_SHIFT
);
822 value
|= B43legacy_DMA64_RXENABLE
;
823 value
|= (addrext
<< B43legacy_DMA64_RXADDREXT_SHIFT
)
824 & B43legacy_DMA64_RXADDREXT_MASK
;
825 b43legacy_dma_write(ring
, B43legacy_DMA64_RXCTL
,
827 b43legacy_dma_write(ring
, B43legacy_DMA64_RXRINGLO
,
828 (ringbase
& 0xFFFFFFFF));
829 b43legacy_dma_write(ring
, B43legacy_DMA64_RXRINGHI
,
831 ~SSB_DMA_TRANSLATION_MASK
) |
833 b43legacy_dma_write(ring
, B43legacy_DMA64_RXINDEX
,
836 u32 ringbase
= (u32
)(ring
->dmabase
);
838 addrext
= (ringbase
& SSB_DMA_TRANSLATION_MASK
)
839 >> SSB_DMA_TRANSLATION_SHIFT
;
840 value
= (ring
->frameoffset
<<
841 B43legacy_DMA32_RXFROFF_SHIFT
);
842 value
|= B43legacy_DMA32_RXENABLE
;
844 B43legacy_DMA32_RXADDREXT_SHIFT
)
845 & B43legacy_DMA32_RXADDREXT_MASK
;
846 b43legacy_dma_write(ring
, B43legacy_DMA32_RXCTL
,
848 b43legacy_dma_write(ring
, B43legacy_DMA32_RXRING
,
850 ~SSB_DMA_TRANSLATION_MASK
)
852 b43legacy_dma_write(ring
, B43legacy_DMA32_RXINDEX
,
861 /* Shutdown the DMA controller. */
862 static void dmacontroller_cleanup(struct b43legacy_dmaring
*ring
)
865 b43legacy_dmacontroller_tx_reset(ring
->dev
, ring
->mmio_base
,
866 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
871 if (ring
->type
== B43legacy_DMA_64BIT
) {
872 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
873 b43legacy_dma_write(ring
, B43legacy_DMA64_TXRINGLO
, 0);
874 b43legacy_dma_write(ring
, B43legacy_DMA64_TXRINGHI
, 0);
876 b43legacy_dma_write(ring
, B43legacy_DMA32_TXRING
, 0);
878 b43legacy_dmacontroller_rx_reset(ring
->dev
, ring
->mmio_base
,
879 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
884 if (ring
->type
== B43legacy_DMA_64BIT
) {
885 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
886 b43legacy_dma_write(ring
, B43legacy_DMA64_RXRINGLO
, 0);
887 b43legacy_dma_write(ring
, B43legacy_DMA64_RXRINGHI
, 0);
889 b43legacy_dma_write(ring
, B43legacy_DMA32_RXRING
, 0);
893 static void free_all_descbuffers(struct b43legacy_dmaring
*ring
)
895 struct b43legacy_dmadesc_generic
*desc
;
896 struct b43legacy_dmadesc_meta
*meta
;
899 if (!ring
->used_slots
)
901 for (i
= 0; i
< ring
->nr_slots
; i
++) {
902 desc
= ring
->ops
->idx2desc(ring
, i
, &meta
);
905 B43legacy_WARN_ON(!ring
->tx
);
909 unmap_descbuffer(ring
, meta
->dmaaddr
,
912 unmap_descbuffer(ring
, meta
->dmaaddr
,
913 ring
->rx_buffersize
, 0);
914 free_descriptor_buffer(ring
, meta
, 0);
918 static u64
supported_dma_mask(struct b43legacy_wldev
*dev
)
923 tmp
= b43legacy_read32(dev
, SSB_TMSHIGH
);
924 if (tmp
& SSB_TMSHIGH_DMA64
)
925 return DMA_64BIT_MASK
;
926 mmio_base
= b43legacy_dmacontroller_base(0, 0);
927 b43legacy_write32(dev
,
928 mmio_base
+ B43legacy_DMA32_TXCTL
,
929 B43legacy_DMA32_TXADDREXT_MASK
);
930 tmp
= b43legacy_read32(dev
, mmio_base
+
931 B43legacy_DMA32_TXCTL
);
932 if (tmp
& B43legacy_DMA32_TXADDREXT_MASK
)
933 return DMA_32BIT_MASK
;
935 return DMA_30BIT_MASK
;
938 /* Main initialization function. */
940 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
941 struct b43legacy_dmaring
*b43legacy_setup_dmaring(
942 struct b43legacy_wldev
*dev
,
943 int controller_index
,
947 struct b43legacy_dmaring
*b43legacy_setup_dmaring(struct b43legacy_wldev
*dev
,
948 int controller_index
,
950 enum b43legacy_dmatype type
)
951 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
953 struct b43legacy_dmaring
*ring
;
958 ring
= kzalloc(sizeof(*ring
), GFP_KERNEL
);
961 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
964 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
966 nr_slots
= B43legacy_RXRING_SLOTS
;
968 nr_slots
= B43legacy_TXRING_SLOTS
;
970 ring
->meta
= kcalloc(nr_slots
, sizeof(struct b43legacy_dmadesc_meta
),
975 ring
->txhdr_cache
= kcalloc(nr_slots
,
976 sizeof(struct b43legacy_txhdr_fw3
),
978 if (!ring
->txhdr_cache
)
981 /* test for ability to dma to txhdr_cache */
982 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
983 dma_test
= dma_map_single(dev
->dev
->dev
,
985 sizeof(struct b43legacy_txhdr_fw3
),
988 dma_test
= dma_map_single(dev
->dev
->dev
, ring
->txhdr_cache
,
989 sizeof(struct b43legacy_txhdr_fw3
),
991 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
993 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
994 if (dma_mapping_error(dma_test
)) {
996 if (b43legacy_dma_mapping_error(ring
, dma_test
,
997 sizeof(struct b43legacy_txhdr_fw3
))) {
998 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
1000 kfree(ring
->txhdr_cache
);
1001 ring
->txhdr_cache
= kcalloc(nr_slots
,
1002 sizeof(struct b43legacy_txhdr_fw3
),
1003 GFP_KERNEL
| GFP_DMA
);
1004 if (!ring
->txhdr_cache
)
1005 goto err_kfree_meta
;
1007 dma_test
= dma_map_single(dev
->dev
->dev
,
1009 sizeof(struct b43legacy_txhdr_fw3
),
1012 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
1013 if (dma_mapping_error(dma_test
))
1015 if (b43legacy_dma_mapping_error(ring
, dma_test
,
1016 sizeof(struct b43legacy_txhdr_fw3
)))
1017 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
1018 goto err_kfree_txhdr_cache
;
1021 dma_unmap_single(dev
->dev
->dev
,
1022 dma_test
, sizeof(struct b43legacy_txhdr_fw3
),
1027 ring
->nr_slots
= nr_slots
;
1028 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
1029 ring
->mmio_base
= b43legacy_dmacontroller_base(dma64
,
1032 ring
->mmio_base
= b43legacy_dmacontroller_base(type
, controller_index
);
1033 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
1034 ring
->index
= controller_index
;
1035 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
1036 ring
->dma64
= !!dma64
;
1039 if (type
== B43legacy_DMA_64BIT
)
1040 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
1041 ring
->ops
= &dma64_ops
;
1043 ring
->ops
= &dma32_ops
;
1046 ring
->current_slot
= -1;
1048 if (ring
->index
== 0) {
1049 ring
->rx_buffersize
= B43legacy_DMA0_RX_BUFFERSIZE
;
1050 ring
->frameoffset
= B43legacy_DMA0_RX_FRAMEOFFSET
;
1051 } else if (ring
->index
== 3) {
1052 ring
->rx_buffersize
= B43legacy_DMA3_RX_BUFFERSIZE
;
1053 ring
->frameoffset
= B43legacy_DMA3_RX_FRAMEOFFSET
;
1055 B43legacy_WARN_ON(1);
1057 spin_lock_init(&ring
->lock
);
1058 #ifdef CONFIG_B43LEGACY_DEBUG
1059 ring
->last_injected_overflow
= jiffies
;
1062 err
= alloc_ringmemory(ring
);
1064 goto err_kfree_txhdr_cache
;
1065 err
= dmacontroller_setup(ring
);
1067 goto err_free_ringmemory
;
1072 err_free_ringmemory
:
1073 free_ringmemory(ring
);
1074 err_kfree_txhdr_cache
:
1075 kfree(ring
->txhdr_cache
);
1084 /* Main cleanup function. */
1085 static void b43legacy_destroy_dmaring(struct b43legacy_dmaring
*ring
)
1090 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
1091 b43legacydbg(ring
->dev
->wl
, "DMA-%s 0x%04X (%s) max used slots:"
1092 " %d/%d\n", (ring
->dma64
) ? "64" : "32", ring
->mmio_base
,
1093 (ring
->tx
) ? "TX" : "RX",
1094 ring
->max_used_slots
, ring
->nr_slots
);
1096 b43legacydbg(ring
->dev
->wl
, "DMA-%u 0x%04X (%s) max used slots:"
1097 " %d/%d\n", (unsigned int)(ring
->type
), ring
->mmio_base
,
1098 (ring
->tx
) ? "TX" : "RX", ring
->max_used_slots
,
1100 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
1101 /* Device IRQs are disabled prior entering this function,
1102 * so no need to take care of concurrency with rx handler stuff.
1104 dmacontroller_cleanup(ring
);
1105 free_all_descbuffers(ring
);
1106 free_ringmemory(ring
);
1108 kfree(ring
->txhdr_cache
);
1113 void b43legacy_dma_free(struct b43legacy_wldev
*dev
)
1115 struct b43legacy_dma
*dma
;
1117 if (b43legacy_using_pio(dev
))
1121 b43legacy_destroy_dmaring(dma
->rx_ring3
);
1122 dma
->rx_ring3
= NULL
;
1123 b43legacy_destroy_dmaring(dma
->rx_ring0
);
1124 dma
->rx_ring0
= NULL
;
1126 b43legacy_destroy_dmaring(dma
->tx_ring5
);
1127 dma
->tx_ring5
= NULL
;
1128 b43legacy_destroy_dmaring(dma
->tx_ring4
);
1129 dma
->tx_ring4
= NULL
;
1130 b43legacy_destroy_dmaring(dma
->tx_ring3
);
1131 dma
->tx_ring3
= NULL
;
1132 b43legacy_destroy_dmaring(dma
->tx_ring2
);
1133 dma
->tx_ring2
= NULL
;
1134 b43legacy_destroy_dmaring(dma
->tx_ring1
);
1135 dma
->tx_ring1
= NULL
;
1136 b43legacy_destroy_dmaring(dma
->tx_ring0
);
1137 dma
->tx_ring0
= NULL
;
1140 int b43legacy_dma_init(struct b43legacy_wldev
*dev
)
1142 struct b43legacy_dma
*dma
= &dev
->dma
;
1143 struct b43legacy_dmaring
*ring
;
1146 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
1149 enum b43legacy_dmatype type
;
1150 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
1152 dmamask
= supported_dma_mask(dev
);
1153 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
1154 if (dmamask
== DMA_64BIT_MASK
)
1159 B43legacy_WARN_ON(1);
1160 case DMA_30BIT_MASK
:
1161 type
= B43legacy_DMA_30BIT
;
1163 case DMA_32BIT_MASK
:
1164 type
= B43legacy_DMA_32BIT
;
1166 case DMA_64BIT_MASK
:
1167 type
= B43legacy_DMA_64BIT
;
1170 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
1172 err
= ssb_dma_set_mask(dev
->dev
, dmamask
);
1174 #ifdef CONFIG_B43LEGACY_PIO
1175 b43legacywarn(dev
->wl
, "DMA for this device not supported. "
1176 "Falling back to PIO\n");
1177 dev
->__using_pio
= 1;
1180 b43legacyerr(dev
->wl
, "DMA for this device not supported and "
1181 "no PIO support compiled in\n");
1187 /* setup TX DMA channels. */
1188 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
1189 ring
= b43legacy_setup_dmaring(dev
, 0, 1, dma64
);
1191 ring
= b43legacy_setup_dmaring(dev
, 0, 1, type
);
1192 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
1195 dma
->tx_ring0
= ring
;
1197 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
1198 ring
= b43legacy_setup_dmaring(dev
, 1, 1, dma64
);
1200 ring
= b43legacy_setup_dmaring(dev
, 1, 1, type
);
1201 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
1203 goto err_destroy_tx0
;
1204 dma
->tx_ring1
= ring
;
1206 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
1207 ring
= b43legacy_setup_dmaring(dev
, 2, 1, dma64
);
1209 ring
= b43legacy_setup_dmaring(dev
, 2, 1, type
);
1210 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
1212 goto err_destroy_tx1
;
1213 dma
->tx_ring2
= ring
;
1215 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
1216 ring
= b43legacy_setup_dmaring(dev
, 3, 1, dma64
);
1218 ring
= b43legacy_setup_dmaring(dev
, 3, 1, type
);
1219 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
1221 goto err_destroy_tx2
;
1222 dma
->tx_ring3
= ring
;
1224 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
1225 ring
= b43legacy_setup_dmaring(dev
, 4, 1, dma64
);
1227 ring
= b43legacy_setup_dmaring(dev
, 4, 1, type
);
1228 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
1230 goto err_destroy_tx3
;
1231 dma
->tx_ring4
= ring
;
1233 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
1234 ring
= b43legacy_setup_dmaring(dev
, 5, 1, dma64
);
1236 ring
= b43legacy_setup_dmaring(dev
, 5, 1, type
);
1237 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
1239 goto err_destroy_tx4
;
1240 dma
->tx_ring5
= ring
;
1242 /* setup RX DMA channels. */
1243 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
1244 ring
= b43legacy_setup_dmaring(dev
, 0, 0, dma64
);
1246 ring
= b43legacy_setup_dmaring(dev
, 0, 0, type
);
1247 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
1249 goto err_destroy_tx5
;
1250 dma
->rx_ring0
= ring
;
1252 if (dev
->dev
->id
.revision
< 5) {
1253 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
1254 ring
= b43legacy_setup_dmaring(dev
, 3, 0, dma64
);
1256 ring
= b43legacy_setup_dmaring(dev
, 3, 0, type
);
1257 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
1259 goto err_destroy_rx0
;
1260 dma
->rx_ring3
= ring
;
1263 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
1264 b43legacydbg(dev
->wl
, "%d-bit DMA initialized\n",
1265 (dmamask
== DMA_64BIT_MASK
) ? 64 :
1266 (dmamask
== DMA_32BIT_MASK
) ? 32 : 30);
1268 b43legacydbg(dev
->wl
, "%u-bit DMA initialized\n", (unsigned int)type
);
1269 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
1275 b43legacy_destroy_dmaring(dma
->rx_ring0
);
1276 dma
->rx_ring0
= NULL
;
1278 b43legacy_destroy_dmaring(dma
->tx_ring5
);
1279 dma
->tx_ring5
= NULL
;
1281 b43legacy_destroy_dmaring(dma
->tx_ring4
);
1282 dma
->tx_ring4
= NULL
;
1284 b43legacy_destroy_dmaring(dma
->tx_ring3
);
1285 dma
->tx_ring3
= NULL
;
1287 b43legacy_destroy_dmaring(dma
->tx_ring2
);
1288 dma
->tx_ring2
= NULL
;
1290 b43legacy_destroy_dmaring(dma
->tx_ring1
);
1291 dma
->tx_ring1
= NULL
;
1293 b43legacy_destroy_dmaring(dma
->tx_ring0
);
1294 dma
->tx_ring0
= NULL
;
1298 /* Generate a cookie for the TX header. */
1299 static u16
generate_cookie(struct b43legacy_dmaring
*ring
,
1302 u16 cookie
= 0x1000;
1304 /* Use the upper 4 bits of the cookie as
1305 * DMA controller ID and store the slot number
1306 * in the lower 12 bits.
1307 * Note that the cookie must never be 0, as this
1308 * is a special value used in RX path.
1310 switch (ring
->index
) {
1330 B43legacy_WARN_ON(!(((u16
)slot
& 0xF000) == 0x0000));
1331 cookie
|= (u16
)slot
;
1336 /* Inspect a cookie and find out to which controller/slot it belongs. */
1338 struct b43legacy_dmaring
*parse_cookie(struct b43legacy_wldev
*dev
,
1339 u16 cookie
, int *slot
)
1341 struct b43legacy_dma
*dma
= &dev
->dma
;
1342 struct b43legacy_dmaring
*ring
= NULL
;
1344 switch (cookie
& 0xF000) {
1346 ring
= dma
->tx_ring0
;
1349 ring
= dma
->tx_ring1
;
1352 ring
= dma
->tx_ring2
;
1355 ring
= dma
->tx_ring3
;
1358 ring
= dma
->tx_ring4
;
1361 ring
= dma
->tx_ring5
;
1364 B43legacy_WARN_ON(1);
1366 *slot
= (cookie
& 0x0FFF);
1367 B43legacy_WARN_ON(!(ring
&& *slot
>= 0 && *slot
< ring
->nr_slots
));
1372 static int dma_tx_fragment(struct b43legacy_dmaring
*ring
,
1373 struct sk_buff
*skb
,
1374 struct ieee80211_tx_control
*ctl
)
1376 const struct b43legacy_dma_ops
*ops
= ring
->ops
;
1378 int slot
, old_top_slot
, old_used_slots
;
1380 struct b43legacy_dmadesc_generic
*desc
;
1381 struct b43legacy_dmadesc_meta
*meta
;
1382 struct b43legacy_dmadesc_meta
*meta_hdr
;
1383 struct sk_buff
*bounce_skb
;
1385 #define SLOTS_PER_PACKET 2
1386 B43legacy_WARN_ON(skb_shinfo(skb
)->nr_frags
!= 0);
1388 old_top_slot
= ring
->current_slot
;
1389 old_used_slots
= ring
->used_slots
;
1391 /* Get a slot for the header. */
1392 slot
= request_slot(ring
);
1393 desc
= ops
->idx2desc(ring
, slot
, &meta_hdr
);
1394 memset(meta_hdr
, 0, sizeof(*meta_hdr
));
1396 header
= &(ring
->txhdr_cache
[slot
* sizeof(
1397 struct b43legacy_txhdr_fw3
)]);
1398 err
= b43legacy_generate_txhdr(ring
->dev
, header
,
1399 skb
->data
, skb
->len
, ctl
,
1400 generate_cookie(ring
, slot
));
1401 if (unlikely(err
)) {
1402 ring
->current_slot
= old_top_slot
;
1403 ring
->used_slots
= old_used_slots
;
1407 meta_hdr
->dmaaddr
= map_descbuffer(ring
, (unsigned char *)header
,
1408 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
1409 sizeof(struct b43legacy_txhdr_fw3
), 1);
1410 if (dma_mapping_error(meta_hdr
->dmaaddr
))
1412 sizeof(struct b43legacy_txhdr_fw3
), 1);
1413 if (b43legacy_dma_mapping_error(ring
, meta_hdr
->dmaaddr
,
1414 sizeof(struct b43legacy_txhdr_fw3
))) {
1415 ring
->current_slot
= old_top_slot
;
1416 ring
->used_slots
= old_used_slots
;
1417 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
1419 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
1422 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
1423 ops
->fill_descriptor(ring
, desc
, meta_hdr
->dmaaddr
,
1424 sizeof(struct b43legacy_txhdr_fw3
), 1, 0, 0);
1426 /* Get a slot for the payload. */
1427 slot
= request_slot(ring
);
1428 desc
= ops
->idx2desc(ring
, slot
, &meta
);
1429 memset(meta
, 0, sizeof(*meta
));
1431 memcpy(&meta
->txstat
.control
, ctl
, sizeof(*ctl
));
1433 meta
->is_last_fragment
= 1;
1435 meta
->dmaaddr
= map_descbuffer(ring
, skb
->data
, skb
->len
, 1);
1436 /* create a bounce buffer in zone_dma on mapping failure. */
1437 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
1438 if (dma_mapping_error(meta
->dmaaddr
)) {
1440 if (b43legacy_dma_mapping_error(ring
, meta
->dmaaddr
, skb
->len
)) {
1441 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
1442 bounce_skb
= __dev_alloc_skb(skb
->len
, GFP_ATOMIC
| GFP_DMA
);
1444 ring
->current_slot
= old_top_slot
;
1445 ring
->used_slots
= old_used_slots
;
1450 memcpy(skb_put(bounce_skb
, skb
->len
), skb
->data
, skb
->len
);
1451 dev_kfree_skb_any(skb
);
1454 meta
->dmaaddr
= map_descbuffer(ring
, skb
->data
, skb
->len
, 1);
1455 <<<<<<< HEAD
:drivers
/net
/wireless
/b43legacy
/dma
.c
1456 if (dma_mapping_error(meta
->dmaaddr
)) {
1458 if (b43legacy_dma_mapping_error(ring
, meta
->dmaaddr
, skb
->len
)) {
1459 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/b43legacy
/dma
.c
1460 ring
->current_slot
= old_top_slot
;
1461 ring
->used_slots
= old_used_slots
;
1463 goto out_free_bounce
;
1467 ops
->fill_descriptor(ring
, desc
, meta
->dmaaddr
,
1470 wmb(); /* previous stuff MUST be done */
1471 /* Now transfer the whole frame. */
1472 ops
->poke_tx(ring
, next_slot(ring
, slot
));
1476 dev_kfree_skb_any(skb
);
1478 unmap_descbuffer(ring
, meta_hdr
->dmaaddr
,
1479 sizeof(struct b43legacy_txhdr_fw3
), 1);
1484 int should_inject_overflow(struct b43legacy_dmaring
*ring
)
1486 #ifdef CONFIG_B43LEGACY_DEBUG
1487 if (unlikely(b43legacy_debug(ring
->dev
,
1488 B43legacy_DBG_DMAOVERFLOW
))) {
1489 /* Check if we should inject another ringbuffer overflow
1490 * to test handling of this situation in the stack. */
1491 unsigned long next_overflow
;
1493 next_overflow
= ring
->last_injected_overflow
+ HZ
;
1494 if (time_after(jiffies
, next_overflow
)) {
1495 ring
->last_injected_overflow
= jiffies
;
1496 b43legacydbg(ring
->dev
->wl
,
1497 "Injecting TX ring overflow on "
1498 "DMA controller %d\n", ring
->index
);
1502 #endif /* CONFIG_B43LEGACY_DEBUG */
1506 int b43legacy_dma_tx(struct b43legacy_wldev
*dev
,
1507 struct sk_buff
*skb
,
1508 struct ieee80211_tx_control
*ctl
)
1510 struct b43legacy_dmaring
*ring
;
1512 unsigned long flags
;
1514 ring
= priority_to_txring(dev
, ctl
->queue
);
1515 spin_lock_irqsave(&ring
->lock
, flags
);
1516 B43legacy_WARN_ON(!ring
->tx
);
1517 if (unlikely(free_slots(ring
) < SLOTS_PER_PACKET
)) {
1518 b43legacywarn(dev
->wl
, "DMA queue overflow\n");
1522 /* Check if the queue was stopped in mac80211,
1523 * but we got called nevertheless.
1524 * That would be a mac80211 bug. */
1525 B43legacy_BUG_ON(ring
->stopped
);
1527 err
= dma_tx_fragment(ring
, skb
, ctl
);
1528 if (unlikely(err
== -ENOKEY
)) {
1529 /* Drop this packet, as we don't have the encryption key
1530 * anymore and must not transmit it unencrypted. */
1531 dev_kfree_skb_any(skb
);
1535 if (unlikely(err
)) {
1536 b43legacyerr(dev
->wl
, "DMA tx mapping failure\n");
1539 ring
->nr_tx_packets
++;
1540 if ((free_slots(ring
) < SLOTS_PER_PACKET
) ||
1541 should_inject_overflow(ring
)) {
1542 /* This TX ring is full. */
1543 ieee80211_stop_queue(dev
->wl
->hw
, txring_to_priority(ring
));
1545 if (b43legacy_debug(dev
, B43legacy_DBG_DMAVERBOSE
))
1546 b43legacydbg(dev
->wl
, "Stopped TX ring %d\n",
1550 spin_unlock_irqrestore(&ring
->lock
, flags
);
1555 void b43legacy_dma_handle_txstatus(struct b43legacy_wldev
*dev
,
1556 const struct b43legacy_txstatus
*status
)
1558 const struct b43legacy_dma_ops
*ops
;
1559 struct b43legacy_dmaring
*ring
;
1560 struct b43legacy_dmadesc_generic
*desc
;
1561 struct b43legacy_dmadesc_meta
*meta
;
1564 ring
= parse_cookie(dev
, status
->cookie
, &slot
);
1565 if (unlikely(!ring
))
1567 B43legacy_WARN_ON(!irqs_disabled());
1568 spin_lock(&ring
->lock
);
1570 B43legacy_WARN_ON(!ring
->tx
);
1573 B43legacy_WARN_ON(!(slot
>= 0 && slot
< ring
->nr_slots
));
1574 desc
= ops
->idx2desc(ring
, slot
, &meta
);
1577 unmap_descbuffer(ring
, meta
->dmaaddr
,
1580 unmap_descbuffer(ring
, meta
->dmaaddr
,
1581 sizeof(struct b43legacy_txhdr_fw3
),
1584 if (meta
->is_last_fragment
) {
1585 B43legacy_WARN_ON(!meta
->skb
);
1586 /* Call back to inform the ieee80211 subsystem about the
1587 * status of the transmission.
1588 * Some fields of txstat are already filled in dma_tx().
1590 if (status
->acked
) {
1591 meta
->txstat
.flags
|= IEEE80211_TX_STATUS_ACK
;
1593 if (!(meta
->txstat
.control
.flags
1594 & IEEE80211_TXCTL_NO_ACK
))
1595 meta
->txstat
.excessive_retries
= 1;
1597 if (status
->frame_count
== 0) {
1598 /* The frame was not transmitted at all. */
1599 meta
->txstat
.retry_count
= 0;
1601 meta
->txstat
.retry_count
= status
->frame_count
1603 ieee80211_tx_status_irqsafe(dev
->wl
->hw
, meta
->skb
,
1605 /* skb is freed by ieee80211_tx_status_irqsafe() */
1608 /* No need to call free_descriptor_buffer here, as
1609 * this is only the txhdr, which is not allocated.
1611 B43legacy_WARN_ON(meta
->skb
!= NULL
);
1614 /* Everything unmapped and free'd. So it's not used anymore. */
1617 if (meta
->is_last_fragment
)
1619 slot
= next_slot(ring
, slot
);
1621 dev
->stats
.last_tx
= jiffies
;
1622 if (ring
->stopped
) {
1623 B43legacy_WARN_ON(free_slots(ring
) < SLOTS_PER_PACKET
);
1624 ieee80211_wake_queue(dev
->wl
->hw
, txring_to_priority(ring
));
1626 if (b43legacy_debug(dev
, B43legacy_DBG_DMAVERBOSE
))
1627 b43legacydbg(dev
->wl
, "Woke up TX ring %d\n",
1631 spin_unlock(&ring
->lock
);
1634 void b43legacy_dma_get_tx_stats(struct b43legacy_wldev
*dev
,
1635 struct ieee80211_tx_queue_stats
*stats
)
1637 const int nr_queues
= dev
->wl
->hw
->queues
;
1638 struct b43legacy_dmaring
*ring
;
1639 struct ieee80211_tx_queue_stats_data
*data
;
1640 unsigned long flags
;
1643 for (i
= 0; i
< nr_queues
; i
++) {
1644 data
= &(stats
->data
[i
]);
1645 ring
= priority_to_txring(dev
, i
);
1647 spin_lock_irqsave(&ring
->lock
, flags
);
1648 data
->len
= ring
->used_slots
/ SLOTS_PER_PACKET
;
1649 data
->limit
= ring
->nr_slots
/ SLOTS_PER_PACKET
;
1650 data
->count
= ring
->nr_tx_packets
;
1651 spin_unlock_irqrestore(&ring
->lock
, flags
);
1655 static void dma_rx(struct b43legacy_dmaring
*ring
,
1658 const struct b43legacy_dma_ops
*ops
= ring
->ops
;
1659 struct b43legacy_dmadesc_generic
*desc
;
1660 struct b43legacy_dmadesc_meta
*meta
;
1661 struct b43legacy_rxhdr_fw3
*rxhdr
;
1662 struct sk_buff
*skb
;
1667 desc
= ops
->idx2desc(ring
, *slot
, &meta
);
1669 sync_descbuffer_for_cpu(ring
, meta
->dmaaddr
, ring
->rx_buffersize
);
1672 if (ring
->index
== 3) {
1673 /* We received an xmit status. */
1674 struct b43legacy_hwtxstatus
*hw
=
1675 (struct b43legacy_hwtxstatus
*)skb
->data
;
1678 while (hw
->cookie
== 0) {
1685 b43legacy_handle_hwtxstatus(ring
->dev
, hw
);
1686 /* recycle the descriptor buffer. */
1687 sync_descbuffer_for_device(ring
, meta
->dmaaddr
,
1688 ring
->rx_buffersize
);
1692 rxhdr
= (struct b43legacy_rxhdr_fw3
*)skb
->data
;
1693 len
= le16_to_cpu(rxhdr
->frame_len
);
1700 len
= le16_to_cpu(rxhdr
->frame_len
);
1701 } while (len
== 0 && i
++ < 5);
1702 if (unlikely(len
== 0)) {
1703 /* recycle the descriptor buffer. */
1704 sync_descbuffer_for_device(ring
, meta
->dmaaddr
,
1705 ring
->rx_buffersize
);
1709 if (unlikely(len
> ring
->rx_buffersize
)) {
1710 /* The data did not fit into one descriptor buffer
1711 * and is split over multiple buffers.
1712 * This should never happen, as we try to allocate buffers
1713 * big enough. So simply ignore this packet.
1719 desc
= ops
->idx2desc(ring
, *slot
, &meta
);
1720 /* recycle the descriptor buffer. */
1721 sync_descbuffer_for_device(ring
, meta
->dmaaddr
,
1722 ring
->rx_buffersize
);
1723 *slot
= next_slot(ring
, *slot
);
1725 tmp
-= ring
->rx_buffersize
;
1729 b43legacyerr(ring
->dev
->wl
, "DMA RX buffer too small "
1730 "(len: %u, buffer: %u, nr-dropped: %d)\n",
1731 len
, ring
->rx_buffersize
, cnt
);
1735 dmaaddr
= meta
->dmaaddr
;
1736 err
= setup_rx_descbuffer(ring
, desc
, meta
, GFP_ATOMIC
);
1737 if (unlikely(err
)) {
1738 b43legacydbg(ring
->dev
->wl
, "DMA RX: setup_rx_descbuffer()"
1740 sync_descbuffer_for_device(ring
, dmaaddr
,
1741 ring
->rx_buffersize
);
1745 unmap_descbuffer(ring
, dmaaddr
, ring
->rx_buffersize
, 0);
1746 skb_put(skb
, len
+ ring
->frameoffset
);
1747 skb_pull(skb
, ring
->frameoffset
);
1749 b43legacy_rx(ring
->dev
, skb
, rxhdr
);
1754 void b43legacy_dma_rx(struct b43legacy_dmaring
*ring
)
1756 const struct b43legacy_dma_ops
*ops
= ring
->ops
;
1761 B43legacy_WARN_ON(ring
->tx
);
1762 current_slot
= ops
->get_current_rxslot(ring
);
1763 B43legacy_WARN_ON(!(current_slot
>= 0 && current_slot
<
1766 slot
= ring
->current_slot
;
1767 for (; slot
!= current_slot
; slot
= next_slot(ring
, slot
)) {
1768 dma_rx(ring
, &slot
);
1769 update_max_used_slots(ring
, ++used_slots
);
1771 ops
->set_current_rxslot(ring
, slot
);
1772 ring
->current_slot
= slot
;
1775 static void b43legacy_dma_tx_suspend_ring(struct b43legacy_dmaring
*ring
)
1777 unsigned long flags
;
1779 spin_lock_irqsave(&ring
->lock
, flags
);
1780 B43legacy_WARN_ON(!ring
->tx
);
1781 ring
->ops
->tx_suspend(ring
);
1782 spin_unlock_irqrestore(&ring
->lock
, flags
);
1785 static void b43legacy_dma_tx_resume_ring(struct b43legacy_dmaring
*ring
)
1787 unsigned long flags
;
1789 spin_lock_irqsave(&ring
->lock
, flags
);
1790 B43legacy_WARN_ON(!ring
->tx
);
1791 ring
->ops
->tx_resume(ring
);
1792 spin_unlock_irqrestore(&ring
->lock
, flags
);
1795 void b43legacy_dma_tx_suspend(struct b43legacy_wldev
*dev
)
1797 b43legacy_power_saving_ctl_bits(dev
, -1, 1);
1798 b43legacy_dma_tx_suspend_ring(dev
->dma
.tx_ring0
);
1799 b43legacy_dma_tx_suspend_ring(dev
->dma
.tx_ring1
);
1800 b43legacy_dma_tx_suspend_ring(dev
->dma
.tx_ring2
);
1801 b43legacy_dma_tx_suspend_ring(dev
->dma
.tx_ring3
);
1802 b43legacy_dma_tx_suspend_ring(dev
->dma
.tx_ring4
);
1803 b43legacy_dma_tx_suspend_ring(dev
->dma
.tx_ring5
);
1806 void b43legacy_dma_tx_resume(struct b43legacy_wldev
*dev
)
1808 b43legacy_dma_tx_resume_ring(dev
->dma
.tx_ring5
);
1809 b43legacy_dma_tx_resume_ring(dev
->dma
.tx_ring4
);
1810 b43legacy_dma_tx_resume_ring(dev
->dma
.tx_ring3
);
1811 b43legacy_dma_tx_resume_ring(dev
->dma
.tx_ring2
);
1812 b43legacy_dma_tx_resume_ring(dev
->dma
.tx_ring1
);
1813 b43legacy_dma_tx_resume_ring(dev
->dma
.tx_ring0
);
1814 b43legacy_power_saving_ctl_bits(dev
, -1, -1);