include/asm-cris/arch-v32/mach-fs/hwregs/marb_bp_defs.h

   1 #ifndef __marb_bp_defs_h
   2 #define __marb_bp_defs_h
   3
   4 /*
   5  * This file is autogenerated from
   6  *   file:           ../../inst/memarb/rtl/guinness/marb_top.r
   7  *     id:           <not found>
   8  *     last modfied: Fri Nov  7 15:36:04 2003
   9  *
  10  *   by /n/asic/projects/guinness/design/top/inst/rdesc/rdes2c ../../rtl/global.rmap ../../mod/modreg.rmap -base 0xb0000000 ../../inst/memarb/rtl/guinness/marb_top.r
  11  *      id: $Id: marb_bp_defs.h,v 1.1 2007/02/13 11:55:30 starvik Exp $
  12  * Any changes here will be lost.
  13  *
  14  * -*- buffer-read-only: t -*-
  15  */
  16 /* Main access macros */
  17 #ifndef REG_RD
  18 #define REG_RD( scope, inst, reg ) \
  19   REG_READ( reg_##scope##_##reg, \
  20             (inst) + REG_RD_ADDR_##scope##_##reg )
  21 #endif
  22
  23 #ifndef REG_WR
  24 #define REG_WR( scope, inst, reg, val ) \
  25   REG_WRITE( reg_##scope##_##reg, \
  26              (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
  27 #endif
  28
  29 #ifndef REG_RD_VECT
  30 #define REG_RD_VECT( scope, inst, reg, index ) \
  31   REG_READ( reg_##scope##_##reg, \
  32             (inst) + REG_RD_ADDR_##scope##_##reg + \
  33             (index) * STRIDE_##scope##_##reg )
  34 #endif
  35
  36 #ifndef REG_WR_VECT
  37 #define REG_WR_VECT( scope, inst, reg, index, val ) \
  38   REG_WRITE( reg_##scope##_##reg, \
  39              (inst) + REG_WR_ADDR_##scope##_##reg + \
  40              (index) * STRIDE_##scope##_##reg, (val) )
  41 #endif
  42
  43 #ifndef REG_RD_INT
  44 #define REG_RD_INT( scope, inst, reg ) \
  45   REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
  46 #endif
  47
  48 #ifndef REG_WR_INT
  49 #define REG_WR_INT( scope, inst, reg, val ) \
  50   REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
  51 #endif
  52
  53 #ifndef REG_RD_INT_VECT
  54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \
  55   REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
  56             (index) * STRIDE_##scope##_##reg )
  57 #endif
  58
  59 #ifndef REG_WR_INT_VECT
  60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
  61   REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
  62              (index) * STRIDE_##scope##_##reg, (val) )
  63 #endif
  64
  65 #ifndef REG_TYPE_CONV
  66 #define REG_TYPE_CONV( type, orgtype, val ) \
  67   ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
  68 #endif
  69
  70 #ifndef reg_page_size
  71 #define reg_page_size 8192
  72 #endif
  73
  74 /* C-code for register scope marb_bp */
  75
  76 /* Register rw_first_addr, scope marb_bp, type rw */
  77 typedef unsigned int reg_marb_bp_rw_first_addr;
  78 #define REG_RD_ADDR_marb_bp_rw_first_addr 0
  79 #define REG_WR_ADDR_marb_bp_rw_first_addr 0
  80
  81 /* Register rw_last_addr, scope marb_bp, type rw */
  82 typedef unsigned int reg_marb_bp_rw_last_addr;
  83 #define REG_RD_ADDR_marb_bp_rw_last_addr 4
  84 #define REG_WR_ADDR_marb_bp_rw_last_addr 4
  85
  86 /* Register rw_op, scope marb_bp, type rw */
  87 typedef struct {
  88   unsigned int read         : 1;
  89   unsigned int write        : 1;
  90   unsigned int read_excl    : 1;
  91   unsigned int pri_write    : 1;
  92   unsigned int us_read      : 1;
  93   unsigned int us_write     : 1;
  94   unsigned int us_read_excl : 1;
  95   unsigned int us_pri_write : 1;
  96   unsigned int dummy1       : 24;
  97 } reg_marb_bp_rw_op;
  98 #define REG_RD_ADDR_marb_bp_rw_op 8
  99 #define REG_WR_ADDR_marb_bp_rw_op 8
 100
 101 /* Register rw_clients, scope marb_bp, type rw */
 102 typedef struct {
 103   unsigned int dma0  : 1;
 104   unsigned int dma1  : 1;
 105   unsigned int dma2  : 1;
 106   unsigned int dma3  : 1;
 107   unsigned int dma4  : 1;
 108   unsigned int dma5  : 1;
 109   unsigned int dma6  : 1;
 110   unsigned int dma7  : 1;
 111   unsigned int dma8  : 1;
 112   unsigned int dma9  : 1;
 113   unsigned int cpui  : 1;
 114   unsigned int cpud  : 1;
 115   unsigned int iop   : 1;
 116   unsigned int slave : 1;
 117   unsigned int dummy1 : 18;
 118 } reg_marb_bp_rw_clients;
 119 #define REG_RD_ADDR_marb_bp_rw_clients 12
 120 #define REG_WR_ADDR_marb_bp_rw_clients 12
 121
 122 /* Register rw_options, scope marb_bp, type rw */
 123 typedef struct {
 124   unsigned int wrap : 1;
 125   unsigned int dummy1 : 31;
 126 } reg_marb_bp_rw_options;
 127 #define REG_RD_ADDR_marb_bp_rw_options 16
 128 #define REG_WR_ADDR_marb_bp_rw_options 16
 129
 130 /* Register r_break_addr, scope marb_bp, type r */
 131 typedef unsigned int reg_marb_bp_r_break_addr;
 132 #define REG_RD_ADDR_marb_bp_r_break_addr 20
 133
 134 /* Register r_break_op, scope marb_bp, type r */
 135 typedef struct {
 136   unsigned int read         : 1;
 137   unsigned int write        : 1;
 138   unsigned int read_excl    : 1;
 139   unsigned int pri_write    : 1;
 140   unsigned int us_read      : 1;
 141   unsigned int us_write     : 1;
 142   unsigned int us_read_excl : 1;
 143   unsigned int us_pri_write : 1;
 144   unsigned int dummy1       : 24;
 145 } reg_marb_bp_r_break_op;
 146 #define REG_RD_ADDR_marb_bp_r_break_op 24
 147
 148 /* Register r_break_clients, scope marb_bp, type r */
 149 typedef struct {
 150   unsigned int dma0  : 1;
 151   unsigned int dma1  : 1;
 152   unsigned int dma2  : 1;
 153   unsigned int dma3  : 1;
 154   unsigned int dma4  : 1;
 155   unsigned int dma5  : 1;
 156   unsigned int dma6  : 1;
 157   unsigned int dma7  : 1;
 158   unsigned int dma8  : 1;
 159   unsigned int dma9  : 1;
 160   unsigned int cpui  : 1;
 161   unsigned int cpud  : 1;
 162   unsigned int iop   : 1;
 163   unsigned int slave : 1;
 164   unsigned int dummy1 : 18;
 165 } reg_marb_bp_r_break_clients;
 166 #define REG_RD_ADDR_marb_bp_r_break_clients 28
 167
 168 /* Register r_break_first_client, scope marb_bp, type r */
 169 typedef struct {
 170   unsigned int dma0  : 1;
 171   unsigned int dma1  : 1;
 172   unsigned int dma2  : 1;
 173   unsigned int dma3  : 1;
 174   unsigned int dma4  : 1;
 175   unsigned int dma5  : 1;
 176   unsigned int dma6  : 1;
 177   unsigned int dma7  : 1;
 178   unsigned int dma8  : 1;
 179   unsigned int dma9  : 1;
 180   unsigned int cpui  : 1;
 181   unsigned int cpud  : 1;
 182   unsigned int iop   : 1;
 183   unsigned int slave : 1;
 184   unsigned int dummy1 : 18;
 185 } reg_marb_bp_r_break_first_client;
 186 #define REG_RD_ADDR_marb_bp_r_break_first_client 32
 187
 188 /* Register r_break_size, scope marb_bp, type r */
 189 typedef unsigned int reg_marb_bp_r_break_size;
 190 #define REG_RD_ADDR_marb_bp_r_break_size 36
 191
 192 /* Register rw_ack, scope marb_bp, type rw */
 193 typedef unsigned int reg_marb_bp_rw_ack;
 194 #define REG_RD_ADDR_marb_bp_rw_ack 40
 195 #define REG_WR_ADDR_marb_bp_rw_ack 40
 196
 197
 198 /* Constants */
 199 enum {
 200   regk_marb_bp_no                          = 0x00000000,
 201   regk_marb_bp_rw_op_default               = 0x00000000,
 202   regk_marb_bp_rw_options_default          = 0x00000000,
 203   regk_marb_bp_yes                         = 0x00000001
 204 };
 205 #endif /* __marb_bp_defs_h */