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x86: support gbpages in pagetable dump
[wrt350n-kernel.git] / sound / i2c / l3 / uda1341.c
blobbfa5d2c3608bfed3d412165357a3889b4205d24e
1 /*
2 * Philips UDA1341 mixer device driver
3 * Copyright (c) 2002 Tomas Kasparek <tomas.kasparek@seznam.cz>
4 *
5 * Portions are Copyright (C) 2000 Lernout & Hauspie Speech Products, N.V.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License.
9 *
10 * History:
11 *
12 * 2002-03-13 Tomas Kasparek initial release - based on uda1341.c from OSS
13 * 2002-03-28 Tomas Kasparek basic mixer is working (volume, bass, treble)
14 * 2002-03-30 Tomas Kasparek proc filesystem support, complete mixer and DSP
15 * features support
16 * 2002-04-12 Tomas Kasparek proc interface update, code cleanup
17 * 2002-05-12 Tomas Kasparek another code cleanup
18 */
19
20 /* $Id: uda1341.c,v 1.18 2005/11/17 14:17:21 tiwai Exp $ */
21
22 #include <linux/module.h>
23 #include <linux/init.h>
24 #include <linux/types.h>
25 #include <linux/slab.h>
26 #include <linux/errno.h>
27 #include <linux/ioctl.h>
28
29 #include <asm/uaccess.h>
30
31 #include <sound/core.h>
32 #include <sound/control.h>
33 #include <sound/initval.h>
34 #include <sound/info.h>
35
36 #include <linux/l3/l3.h>
37
38 #include <sound/uda1341.h>
39
40 /* {{{ HW regs definition */
41
42 #define STAT0 0x00
43 #define STAT1 0x80
44 #define STAT_MASK 0x80
45
46 #define DATA0_0 0x00
47 #define DATA0_1 0x40
48 #define DATA0_2 0x80
49 #define DATA_MASK 0xc0
50
51 #define IS_DATA0(x) ((x) >= data0_0 && (x) <= data0_2)
52 #define IS_DATA1(x) ((x) == data1)
53 #define IS_STATUS(x) ((x) == stat0 || (x) == stat1)
54 #define IS_EXTEND(x) ((x) >= ext0 && (x) <= ext6)
55
56 /* }}} */
57
58
59 static const char *peak_names[] = {
60 "before",
61 "after",
62 };
63
64 static const char *filter_names[] = {
65 "flat",
66 "min",
67 "min",
68 "max",
69 };
70
71 static const char *mixer_names[] = {
72 "double differential",
73 "input channel 1 (line in)",
74 "input channel 2 (microphone)",
75 "digital mixer",
76 };
77
78 static const char *deemp_names[] = {
79 "none",
80 "32 kHz",
81 "44.1 kHz",
82 "48 kHz",
83 };
84
85 enum uda1341_regs_names {
86 stat0,
87 stat1,
88 data0_0,
89 data0_1,
90 data0_2,
91 data1,
92 ext0,
93 ext1,
94 ext2,
95 empty,
96 ext4,
97 ext5,
98 ext6,
99 uda1341_reg_last,
100 };
101
102 static const char *uda1341_reg_names[] = {
103 "stat 0 ",
104 "stat 1 ",
105 "data 00",
106 "data 01",
107 "data 02",
108 "data 1 ",
109 "ext 0",
110 "ext 1",
111 "ext 2",
112 "empty",
113 "ext 4",
114 "ext 5",
115 "ext 6",
116 };
117
118 static const int uda1341_enum_items[] = {
119 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
120 2, //peak - before/after
121 4, //deemp - none/32/44.1/48
122 0,
123 4, //filter - flat/min/min/max
124 0, 0, 0,
125 4, //mixer - differ/line/mic/mixer
126 0, 0, 0, 0, 0,
127 };
128
129 static const char ** uda1341_enum_names[] = {
130 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
131 peak_names, //peak - before/after
132 deemp_names, //deemp - none/32/44.1/48
133 NULL,
134 filter_names, //filter - flat/min/min/max
135 NULL, NULL, NULL,
136 mixer_names, //mixer - differ/line/mic/mixer
137 NULL, NULL, NULL, NULL, NULL,
138 };
139
140 typedef int uda1341_cfg[CMD_LAST];
141
142 struct uda1341 {
143 int (*write) (struct l3_client *uda1341, unsigned short reg, unsigned short val);
144 int (*read) (struct l3_client *uda1341, unsigned short reg);
145 unsigned char regs[uda1341_reg_last];
146 int active;
147 spinlock_t reg_lock;
148 struct snd_card *card;
149 uda1341_cfg cfg;
150 #ifdef CONFIG_PM
151 unsigned char suspend_regs[uda1341_reg_last];
152 uda1341_cfg suspend_cfg;
153 #endif
154 };
155
156 /* transfer 8bit integer into string with binary representation */
157 static void int2str_bin8(uint8_t val, char *buf)
158 {
159 const int size = sizeof(val) * 8;
160 int i;
161
162 for (i= 0; i < size; i++){
163 *(buf++) = (val >> (size - 1)) ? '1' : '0';
164 val <<= 1;
165 }
166 *buf = '\0'; //end the string with zero
167 }
168
169 /* {{{ HW manipulation routines */
170
171 static int snd_uda1341_codec_write(struct l3_client *clnt, unsigned short reg, unsigned short val)
172 {
173 struct uda1341 *uda = clnt->driver_data;
174 unsigned char buf[2] = { 0xc0, 0xe0 }; // for EXT addressing
175 int err = 0;
176
177 uda->regs[reg] = val;
178
179 if (uda->active) {
180 if (IS_DATA0(reg)) {
181 err = l3_write(clnt, UDA1341_DATA0, (const unsigned char *)&val, 1);
182 } else if (IS_DATA1(reg)) {
183 err = l3_write(clnt, UDA1341_DATA1, (const unsigned char *)&val, 1);
184 } else if (IS_STATUS(reg)) {
185 err = l3_write(clnt, UDA1341_STATUS, (const unsigned char *)&val, 1);
186 } else if (IS_EXTEND(reg)) {
187 buf[0] |= (reg - ext0) & 0x7; //EXT address
188 buf[1] |= val; //EXT data
189 err = l3_write(clnt, UDA1341_DATA0, (const unsigned char *)buf, 2);
190 }
191 } else
192 printk(KERN_ERR "UDA1341 codec not active!\n");
193 return err;
194 }
195
196 static int snd_uda1341_codec_read(struct l3_client *clnt, unsigned short reg)
197 {
198 unsigned char val;
199 int err;
200
201 err = l3_read(clnt, reg, &val, 1);
202 if (err == 1)
203 // use just 6bits - the rest is address of the reg
204 return val & 63;
205 return err < 0 ? err : -EIO;
206 }
207
208 static inline int snd_uda1341_valid_reg(struct l3_client *clnt, unsigned short reg)
209 {
210 return reg < uda1341_reg_last;
211 }
212
213 static int snd_uda1341_update_bits(struct l3_client *clnt, unsigned short reg,
214 unsigned short mask, unsigned short shift,
215 unsigned short value, int flush)
216 {
217 int change;
218 unsigned short old, new;
219 struct uda1341 *uda = clnt->driver_data;
220
221 #if 0
222 printk(KERN_DEBUG "update_bits: reg: %s mask: %d shift: %d val: %d\n",
223 uda1341_reg_names[reg], mask, shift, value);
224 #endif
225
226 if (!snd_uda1341_valid_reg(clnt, reg))
227 return -EINVAL;
228 spin_lock(&uda->reg_lock);
229 old = uda->regs[reg];
230 new = (old & ~(mask << shift)) | (value << shift);
231 change = old != new;
232 if (change) {
233 if (flush) uda->write(clnt, reg, new);
234 uda->regs[reg] = new;
235 }
236 spin_unlock(&uda->reg_lock);
237 return change;
238 }
239
240 static int snd_uda1341_cfg_write(struct l3_client *clnt, unsigned short what,
241 unsigned short value, int flush)
242 {
243 struct uda1341 *uda = clnt->driver_data;
244 int ret = 0;
245 #ifdef CONFIG_PM
246 int reg;
247 #endif
248
249 #if 0
250 printk(KERN_DEBUG "cfg_write what: %d value: %d\n", what, value);
251 #endif
252
253 uda->cfg[what] = value;
254
255 switch(what) {
256 case CMD_RESET:
257 ret = snd_uda1341_update_bits(clnt, data0_2, 1, 2, 1, flush); // MUTE
258 ret = snd_uda1341_update_bits(clnt, stat0, 1, 6, 1, flush); // RESET
259 ret = snd_uda1341_update_bits(clnt, stat0, 1, 6, 0, flush); // RESTORE
260 uda->cfg[CMD_RESET]=0;
261 break;
262 case CMD_FS:
263 ret = snd_uda1341_update_bits(clnt, stat0, 3, 4, value, flush);
264 break;
265 case CMD_FORMAT:
266 ret = snd_uda1341_update_bits(clnt, stat0, 7, 1, value, flush);
267 break;
268 case CMD_OGAIN:
269 ret = snd_uda1341_update_bits(clnt, stat1, 1, 6, value, flush);
270 break;
271 case CMD_IGAIN:
272 ret = snd_uda1341_update_bits(clnt, stat1, 1, 5, value, flush);
273 break;
274 case CMD_DAC:
275 ret = snd_uda1341_update_bits(clnt, stat1, 1, 0, value, flush);
276 break;
277 case CMD_ADC:
278 ret = snd_uda1341_update_bits(clnt, stat1, 1, 1, value, flush);
279 break;
280 case CMD_VOLUME:
281 ret = snd_uda1341_update_bits(clnt, data0_0, 63, 0, value, flush);
282 break;
283 case CMD_BASS:
284 ret = snd_uda1341_update_bits(clnt, data0_1, 15, 2, value, flush);
285 break;
286 case CMD_TREBBLE:
287 ret = snd_uda1341_update_bits(clnt, data0_1, 3, 0, value, flush);
288 break;
289 case CMD_PEAK:
290 ret = snd_uda1341_update_bits(clnt, data0_2, 1, 5, value, flush);
291 break;
292 case CMD_DEEMP:
293 ret = snd_uda1341_update_bits(clnt, data0_2, 3, 3, value, flush);
294 break;
295 case CMD_MUTE:
296 ret = snd_uda1341_update_bits(clnt, data0_2, 1, 2, value, flush);
297 break;
298 case CMD_FILTER:
299 ret = snd_uda1341_update_bits(clnt, data0_2, 3, 0, value, flush);
300 break;
301 case CMD_CH1:
302 ret = snd_uda1341_update_bits(clnt, ext0, 31, 0, value, flush);
303 break;
304 case CMD_CH2:
305 ret = snd_uda1341_update_bits(clnt, ext1, 31, 0, value, flush);
306 break;
307 case CMD_MIC:
308 ret = snd_uda1341_update_bits(clnt, ext2, 7, 2, value, flush);
309 break;
310 case CMD_MIXER:
311 ret = snd_uda1341_update_bits(clnt, ext2, 3, 0, value, flush);
312 break;
313 case CMD_AGC:
314 ret = snd_uda1341_update_bits(clnt, ext4, 1, 4, value, flush);
315 break;
316 case CMD_IG:
317 ret = snd_uda1341_update_bits(clnt, ext4, 3, 0, value & 0x3, flush);
318 ret = snd_uda1341_update_bits(clnt, ext5, 31, 0, value >> 2, flush);
319 break;
320 case CMD_AGC_TIME:
321 ret = snd_uda1341_update_bits(clnt, ext6, 7, 2, value, flush);
322 break;
323 case CMD_AGC_LEVEL:
324 ret = snd_uda1341_update_bits(clnt, ext6, 3, 0, value, flush);
325 break;
326 #ifdef CONFIG_PM
327 case CMD_SUSPEND:
328 for (reg = stat0; reg < uda1341_reg_last; reg++)
329 uda->suspend_regs[reg] = uda->regs[reg];
330 for (reg = 0; reg < CMD_LAST; reg++)
331 uda->suspend_cfg[reg] = uda->cfg[reg];
332 break;
333 case CMD_RESUME:
334 for (reg = stat0; reg < uda1341_reg_last; reg++)
335 snd_uda1341_codec_write(clnt, reg, uda->suspend_regs[reg]);
336 for (reg = 0; reg < CMD_LAST; reg++)
337 uda->cfg[reg] = uda->suspend_cfg[reg];
338 break;
339 #endif
340 default:
341 ret = -EINVAL;
342 break;
343 }
344
345 if (!uda->active)
346 printk(KERN_ERR "UDA1341 codec not active!\n");
347 return ret;
348 }
349
350 /* }}} */
351
352 /* {{{ Proc interface */
353 #ifdef CONFIG_PROC_FS
354
355 static const char *format_names[] = {
356 "I2S-bus",
357 "LSB 16bits",
358 "LSB 18bits",
359 "LSB 20bits",
360 "MSB",
361 "in LSB 16bits/out MSB",
362 "in LSB 18bits/out MSB",
363 "in LSB 20bits/out MSB",
364 };
365
366 static const char *fs_names[] = {
367 "512*fs",
368 "384*fs",
369 "256*fs",
370 "Unused - bad value!",
371 };
372
373 static const char* bass_values[][16] = {
374 {"0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB",
375 "0 dB", "0 dB", "0 dB", "0 dB", "undefined", }, //flat
376 {"0 dB", "2 dB", "4 dB", "6 dB", "8 dB", "10 dB", "12 dB", "14 dB", "16 dB", "18 dB", "18 dB",
377 "18 dB", "18 dB", "18 dB", "18 dB", "undefined",}, // min
378 {"0 dB", "2 dB", "4 dB", "6 dB", "8 dB", "10 dB", "12 dB", "14 dB", "16 dB", "18 dB", "18 dB",
379 "18 dB", "18 dB", "18 dB", "18 dB", "undefined",}, // min
380 {"0 dB", "2 dB", "4 dB", "6 dB", "8 dB", "10 dB", "12 dB", "14 dB", "16 dB", "18 dB", "20 dB",
381 "22 dB", "24 dB", "24 dB", "24 dB", "undefined",}, // max
382 };
383
384 static const char *mic_sens_value[] = {
385 "-3 dB", "0 dB", "3 dB", "9 dB", "15 dB", "21 dB", "27 dB", "not used",
386 };
387
388 static const unsigned short AGC_atime[] = {
389 11, 16, 11, 16, 21, 11, 16, 21,
390 };
391
392 static const unsigned short AGC_dtime[] = {
393 100, 100, 200, 200, 200, 400, 400, 400,
394 };
395
396 static const char *AGC_level[] = {
397 "-9.0", "-11.5", "-15.0", "-17.5",
398 };
399
400 static const char *ig_small_value[] = {
401 "-3.0", "-2.5", "-2.0", "-1.5", "-1.0", "-0.5",
402 };
403
404 /*
405 * this was computed as peak_value[i] = pow((63-i)*1.42,1.013)
406 *
407 * UDA1341 datasheet on page 21: Peak value (dB) = (Peak level - 63.5)*5*log2
408 * There is an table with these values [level]=value: [3]=-90.31, [7]=-84.29
409 * [61]=-2.78, [62] = -1.48, [63] = 0.0
410 * I tried to compute it, but using but even using logarithm with base either 10 or 2
411 * i was'n able to get values in the table from the formula. So I constructed another
412 * formula (see above) to interpolate the values as good as possible. If there is some
413 * mistake, please contact me on tomas.kasparek@seznam.cz. Thanks.
414 * UDA1341TS datasheet is available at:
415 * http://www-us9.semiconductors.com/acrobat/datasheets/UDA1341TS_3.pdf
416 */
417 static const char *peak_value[] = {
418 "-INF dB", "N.A.", "N.A", "90.31 dB", "N.A.", "N.A.", "N.A.", "-84.29 dB",
419 "-82.65 dB", "-81.13 dB", "-79.61 dB", "-78.09 dB", "-76.57 dB", "-75.05 dB", "-73.53 dB",
420 "-72.01 dB", "-70.49 dB", "-68.97 dB", "-67.45 dB", "-65.93 dB", "-64.41 dB", "-62.90 dB",
421 "-61.38 dB", "-59.86 dB", "-58.35 dB", "-56.83 dB", "-55.32 dB", "-53.80 dB", "-52.29 dB",
422 "-50.78 dB", "-49.26 dB", "-47.75 dB", "-46.24 dB", "-44.73 dB", "-43.22 dB", "-41.71 dB",
423 "-40.20 dB", "-38.69 dB", "-37.19 dB", "-35.68 dB", "-34.17 dB", "-32.67 dB", "-31.17 dB",
424 "-29.66 dB", "-28.16 dB", "-26.66 dB", "-25.16 dB", "-23.66 dB", "-22.16 dB", "-20.67 dB",
425 "-19.17 dB", "-17.68 dB", "-16.19 dB", "-14.70 dB", "-13.21 dB", "-11.72 dB", "-10.24 dB",
426 "-8.76 dB", "-7.28 dB", "-5.81 dB", "-4.34 dB", "-2.88 dB", "-1.43 dB", "0.00 dB",
427 };
428
429 static void snd_uda1341_proc_read(struct snd_info_entry *entry,
430 struct snd_info_buffer *buffer)
431 {
432 struct l3_client *clnt = entry->private_data;
433 struct uda1341 *uda = clnt->driver_data;
434 int peak;
435
436 peak = snd_uda1341_codec_read(clnt, UDA1341_DATA1);
437 if (peak < 0)
438 peak = 0;
439
440 snd_iprintf(buffer, "%s\n\n", uda->card->longname);
441
442 // for information about computed values see UDA1341TS datasheet pages 15 - 21
443 snd_iprintf(buffer, "DAC power : %s\n", uda->cfg[CMD_DAC] ? "on" : "off");
444 snd_iprintf(buffer, "ADC power : %s\n", uda->cfg[CMD_ADC] ? "on" : "off");
445 snd_iprintf(buffer, "Clock frequency : %s\n", fs_names[uda->cfg[CMD_FS]]);
446 snd_iprintf(buffer, "Data format : %s\n\n", format_names[uda->cfg[CMD_FORMAT]]);
447
448 snd_iprintf(buffer, "Filter mode : %s\n", filter_names[uda->cfg[CMD_FILTER]]);
449 snd_iprintf(buffer, "Mixer mode : %s\n", mixer_names[uda->cfg[CMD_MIXER]]);
450 snd_iprintf(buffer, "De-emphasis : %s\n", deemp_names[uda->cfg[CMD_DEEMP]]);
451 snd_iprintf(buffer, "Peak detection pos. : %s\n", uda->cfg[CMD_PEAK] ? "after" : "before");
452 snd_iprintf(buffer, "Peak value : %s\n\n", peak_value[peak]);
453
454 snd_iprintf(buffer, "Automatic Gain Ctrl : %s\n", uda->cfg[CMD_AGC] ? "on" : "off");
455 snd_iprintf(buffer, "AGC attack time : %d ms\n", AGC_atime[uda->cfg[CMD_AGC_TIME]]);
456 snd_iprintf(buffer, "AGC decay time : %d ms\n", AGC_dtime[uda->cfg[CMD_AGC_TIME]]);
457 snd_iprintf(buffer, "AGC output level : %s dB\n\n", AGC_level[uda->cfg[CMD_AGC_LEVEL]]);
458
459 snd_iprintf(buffer, "Mute : %s\n", uda->cfg[CMD_MUTE] ? "on" : "off");
460
461 if (uda->cfg[CMD_VOLUME] == 0)
462 snd_iprintf(buffer, "Volume : 0 dB\n");
463 else if (uda->cfg[CMD_VOLUME] < 62)
464 snd_iprintf(buffer, "Volume : %d dB\n", -1*uda->cfg[CMD_VOLUME] +1);
465 else
466 snd_iprintf(buffer, "Volume : -INF dB\n");
467 snd_iprintf(buffer, "Bass : %s\n", bass_values[uda->cfg[CMD_FILTER]][uda->cfg[CMD_BASS]]);
468 snd_iprintf(buffer, "Trebble : %d dB\n", uda->cfg[CMD_FILTER] ? 2*uda->cfg[CMD_TREBBLE] : 0);
469 snd_iprintf(buffer, "Input Gain (6dB) : %s\n", uda->cfg[CMD_IGAIN] ? "on" : "off");
470 snd_iprintf(buffer, "Output Gain (6dB) : %s\n", uda->cfg[CMD_OGAIN] ? "on" : "off");
471 snd_iprintf(buffer, "Mic sensitivity : %s\n", mic_sens_value[uda->cfg[CMD_MIC]]);
472
473
474 if(uda->cfg[CMD_CH1] < 31)
475 snd_iprintf(buffer, "Mixer gain channel 1: -%d.%c dB\n",
476 ((uda->cfg[CMD_CH1] >> 1) * 3) + (uda->cfg[CMD_CH1] & 1),
477 uda->cfg[CMD_CH1] & 1 ? '5' : '0');
478 else
479 snd_iprintf(buffer, "Mixer gain channel 1: -INF dB\n");
480 if(uda->cfg[CMD_CH2] < 31)
481 snd_iprintf(buffer, "Mixer gain channel 2: -%d.%c dB\n",
482 ((uda->cfg[CMD_CH2] >> 1) * 3) + (uda->cfg[CMD_CH2] & 1),
483 uda->cfg[CMD_CH2] & 1 ? '5' : '0');
484 else
485 snd_iprintf(buffer, "Mixer gain channel 2: -INF dB\n");
486
487 if(uda->cfg[CMD_IG] > 5)
488 snd_iprintf(buffer, "Input Amp. Gain ch 2: %d.%c dB\n",
489 (uda->cfg[CMD_IG] >> 1) -3, uda->cfg[CMD_IG] & 1 ? '5' : '0');
490 else
491 snd_iprintf(buffer, "Input Amp. Gain ch 2: %s dB\n", ig_small_value[uda->cfg[CMD_IG]]);
492 }
493
494 static void snd_uda1341_proc_regs_read(struct snd_info_entry *entry,
495 struct snd_info_buffer *buffer)
496 {
497 struct l3_client *clnt = entry->private_data;
498 struct uda1341 *uda = clnt->driver_data;
499 int reg;
500 char buf[12];
501
502 for (reg = 0; reg < uda1341_reg_last; reg ++) {
503 if (reg == empty)
504 continue;
505 int2str_bin8(uda->regs[reg], buf);
506 snd_iprintf(buffer, "%s = %s\n", uda1341_reg_names[reg], buf);
507 }
508
509 int2str_bin8(snd_uda1341_codec_read(clnt, UDA1341_DATA1), buf);
510 snd_iprintf(buffer, "DATA1 = %s\n", buf);
511 }
512 #endif /* CONFIG_PROC_FS */
513
514 static void __devinit snd_uda1341_proc_init(struct snd_card *card, struct l3_client *clnt)
515 {
516 struct snd_info_entry *entry;
517
518 if (! snd_card_proc_new(card, "uda1341", &entry))
519 snd_info_set_text_ops(entry, clnt, snd_uda1341_proc_read);
520 if (! snd_card_proc_new(card, "uda1341-regs", &entry))
521 snd_info_set_text_ops(entry, clnt, snd_uda1341_proc_regs_read);
522 }
523
524 /* }}} */
525
526 /* {{{ Mixer controls setting */
527
528 /* {{{ UDA1341 single functions */
529
530 #define UDA1341_SINGLE(xname, where, reg, shift, mask, invert) \
531 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_uda1341_info_single, \
532 .get = snd_uda1341_get_single, .put = snd_uda1341_put_single, \
533 .private_value = where | (reg << 5) | (shift << 9) | (mask << 12) | (invert << 18) \
534 }
535
536 static int snd_uda1341_info_single(struct snd_kcontrol *kcontrol,
537 struct snd_ctl_elem_info *uinfo)
538 {
539 int mask = (kcontrol->private_value >> 12) & 63;
540
541 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
542 uinfo->count = 1;
543 uinfo->value.integer.min = 0;
544 uinfo->value.integer.max = mask;
545 return 0;
546 }
547
548 static int snd_uda1341_get_single(struct snd_kcontrol *kcontrol,
549 struct snd_ctl_elem_value *ucontrol)
550 {
551 struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
552 struct uda1341 *uda = clnt->driver_data;
553 int where = kcontrol->private_value & 31;
554 int mask = (kcontrol->private_value >> 12) & 63;
555 int invert = (kcontrol->private_value >> 18) & 1;
556
557 ucontrol->value.integer.value[0] = uda->cfg[where];
558 if (invert)
559 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
560
561 return 0;
562 }
563
564 static int snd_uda1341_put_single(struct snd_kcontrol *kcontrol,
565 struct snd_ctl_elem_value *ucontrol)
566 {
567 struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
568 struct uda1341 *uda = clnt->driver_data;
569 int where = kcontrol->private_value & 31;
570 int reg = (kcontrol->private_value >> 5) & 15;
571 int shift = (kcontrol->private_value >> 9) & 7;
572 int mask = (kcontrol->private_value >> 12) & 63;
573 int invert = (kcontrol->private_value >> 18) & 1;
574 unsigned short val;
575
576 val = (ucontrol->value.integer.value[0] & mask);
577 if (invert)
578 val = mask - val;
579
580 uda->cfg[where] = val;
581 return snd_uda1341_update_bits(clnt, reg, mask, shift, val, FLUSH);
582 }
583
584 /* }}} */
585
586 /* {{{ UDA1341 enum functions */
587
588 #define UDA1341_ENUM(xname, where, reg, shift, mask, invert) \
589 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_uda1341_info_enum, \
590 .get = snd_uda1341_get_enum, .put = snd_uda1341_put_enum, \
591 .private_value = where | (reg << 5) | (shift << 9) | (mask << 12) | (invert << 18) \
592 }
593
594 static int snd_uda1341_info_enum(struct snd_kcontrol *kcontrol,
595 struct snd_ctl_elem_info *uinfo)
596 {
597 int where = kcontrol->private_value & 31;
598 const char **texts;
599
600 // this register we don't handle this way
601 if (!uda1341_enum_items[where])
602 return -EINVAL;
603
604 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
605 uinfo->count = 1;
606 uinfo->value.enumerated.items = uda1341_enum_items[where];
607
608 if (uinfo->value.enumerated.item >= uda1341_enum_items[where])
609 uinfo->value.enumerated.item = uda1341_enum_items[where] - 1;
610
611 texts = uda1341_enum_names[where];
612 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
613 return 0;
614 }
615
616 static int snd_uda1341_get_enum(struct snd_kcontrol *kcontrol,
617 struct snd_ctl_elem_value *ucontrol)
618 {
619 struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
620 struct uda1341 *uda = clnt->driver_data;
621 int where = kcontrol->private_value & 31;
622
623 ucontrol->value.enumerated.item[0] = uda->cfg[where];
624 return 0;
625 }
626
627 static int snd_uda1341_put_enum(struct snd_kcontrol *kcontrol,
628 struct snd_ctl_elem_value *ucontrol)
629 {
630 struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
631 struct uda1341 *uda = clnt->driver_data;
632 int where = kcontrol->private_value & 31;
633 int reg = (kcontrol->private_value >> 5) & 15;
634 int shift = (kcontrol->private_value >> 9) & 7;
635 int mask = (kcontrol->private_value >> 12) & 63;
636
637 uda->cfg[where] = (ucontrol->value.enumerated.item[0] & mask);
638
639 return snd_uda1341_update_bits(clnt, reg, mask, shift, uda->cfg[where], FLUSH);
640 }
641
642 /* }}} */
643
644 /* {{{ UDA1341 2regs functions */
645
646 #define UDA1341_2REGS(xname, where, reg_1, reg_2, shift_1, shift_2, mask_1, mask_2, invert) \
647 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .info = snd_uda1341_info_2regs, \
648 .get = snd_uda1341_get_2regs, .put = snd_uda1341_put_2regs, \
649 .private_value = where | (reg_1 << 5) | (reg_2 << 9) | (shift_1 << 13) | (shift_2 << 16) | \
650 (mask_1 << 19) | (mask_2 << 25) | (invert << 31) \
651 }
652
653
654 static int snd_uda1341_info_2regs(struct snd_kcontrol *kcontrol,
655 struct snd_ctl_elem_info *uinfo)
656 {
657 int mask_1 = (kcontrol->private_value >> 19) & 63;
658 int mask_2 = (kcontrol->private_value >> 25) & 63;
659 int mask;
660
661 mask = (mask_2 + 1) * (mask_1 + 1) - 1;
662 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
663 uinfo->count = 1;
664 uinfo->value.integer.min = 0;
665 uinfo->value.integer.max = mask;
666 return 0;
667 }
668
669 static int snd_uda1341_get_2regs(struct snd_kcontrol *kcontrol,
670 struct snd_ctl_elem_value *ucontrol)
671 {
672 struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
673 struct uda1341 *uda = clnt->driver_data;
674 int where = kcontrol->private_value & 31;
675 int mask_1 = (kcontrol->private_value >> 19) & 63;
676 int mask_2 = (kcontrol->private_value >> 25) & 63;
677 int invert = (kcontrol->private_value >> 31) & 1;
678 int mask;
679
680 mask = (mask_2 + 1) * (mask_1 + 1) - 1;
681
682 ucontrol->value.integer.value[0] = uda->cfg[where];
683 if (invert)
684 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
685 return 0;
686 }
687
688 static int snd_uda1341_put_2regs(struct snd_kcontrol *kcontrol,
689 struct snd_ctl_elem_value *ucontrol)
690 {
691 struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
692 struct uda1341 *uda = clnt->driver_data;
693 int where = kcontrol->private_value & 31;
694 int reg_1 = (kcontrol->private_value >> 5) & 15;
695 int reg_2 = (kcontrol->private_value >> 9) & 15;
696 int shift_1 = (kcontrol->private_value >> 13) & 7;
697 int shift_2 = (kcontrol->private_value >> 16) & 7;
698 int mask_1 = (kcontrol->private_value >> 19) & 63;
699 int mask_2 = (kcontrol->private_value >> 25) & 63;
700 int invert = (kcontrol->private_value >> 31) & 1;
701 int mask;
702 unsigned short val1, val2, val;
703
704 val = ucontrol->value.integer.value[0];
705
706 mask = (mask_2 + 1) * (mask_1 + 1) - 1;
707
708 val1 = val & mask_1;
709 val2 = (val / (mask_1 + 1)) & mask_2;
710
711 if (invert) {
712 val1 = mask_1 - val1;
713 val2 = mask_2 - val2;
714 }
715
716 uda->cfg[where] = invert ? mask - val : val;
717
718 //FIXME - return value
719 snd_uda1341_update_bits(clnt, reg_1, mask_1, shift_1, val1, FLUSH);
720 return snd_uda1341_update_bits(clnt, reg_2, mask_2, shift_2, val2, FLUSH);
721 }
722
723 /* }}} */
724
725 static struct snd_kcontrol_new snd_uda1341_controls[] = {
726 UDA1341_SINGLE("Master Playback Switch", CMD_MUTE, data0_2, 2, 1, 1),
727 UDA1341_SINGLE("Master Playback Volume", CMD_VOLUME, data0_0, 0, 63, 1),
728
729 UDA1341_SINGLE("Bass Playback Volume", CMD_BASS, data0_1, 2, 15, 0),
730 UDA1341_SINGLE("Treble Playback Volume", CMD_TREBBLE, data0_1, 0, 3, 0),
731
732 UDA1341_SINGLE("Input Gain Switch", CMD_IGAIN, stat1, 5, 1, 0),
733 UDA1341_SINGLE("Output Gain Switch", CMD_OGAIN, stat1, 6, 1, 0),
734
735 UDA1341_SINGLE("Mixer Gain Channel 1 Volume", CMD_CH1, ext0, 0, 31, 1),
736 UDA1341_SINGLE("Mixer Gain Channel 2 Volume", CMD_CH2, ext1, 0, 31, 1),
737
738 UDA1341_SINGLE("Mic Sensitivity Volume", CMD_MIC, ext2, 2, 7, 0),
739
740 UDA1341_SINGLE("AGC Output Level", CMD_AGC_LEVEL, ext6, 0, 3, 0),
741 UDA1341_SINGLE("AGC Time Constant", CMD_AGC_TIME, ext6, 2, 7, 0),
742 UDA1341_SINGLE("AGC Time Constant Switch", CMD_AGC, ext4, 4, 1, 0),
743
744 UDA1341_SINGLE("DAC Power", CMD_DAC, stat1, 0, 1, 0),
745 UDA1341_SINGLE("ADC Power", CMD_ADC, stat1, 1, 1, 0),
746
747 UDA1341_ENUM("Peak detection", CMD_PEAK, data0_2, 5, 1, 0),
748 UDA1341_ENUM("De-emphasis", CMD_DEEMP, data0_2, 3, 3, 0),
749 UDA1341_ENUM("Mixer mode", CMD_MIXER, ext2, 0, 3, 0),
750 UDA1341_ENUM("Filter mode", CMD_FILTER, data0_2, 0, 3, 0),
751
752 UDA1341_2REGS("Gain Input Amplifier Gain (channel 2)", CMD_IG, ext4, ext5, 0, 0, 3, 31, 0),
753 };
754
755 static void uda1341_free(struct l3_client *clnt)
756 {
757 l3_detach_client(clnt); // calls kfree for driver_data (struct uda1341)
758 kfree(clnt);
759 }
760
761 static int uda1341_dev_free(struct snd_device *device)
762 {
763 struct l3_client *clnt = device->device_data;
764 uda1341_free(clnt);
765 return 0;
766 }
767
768 int __init snd_chip_uda1341_mixer_new(struct snd_card *card, struct l3_client **clntp)
769 {
770 static struct snd_device_ops ops = {
771 .dev_free = uda1341_dev_free,
772 };
773 struct l3_client *clnt;
774 int idx, err;
775
776 snd_assert(card != NULL, return -EINVAL);
777
778 clnt = kzalloc(sizeof(*clnt), GFP_KERNEL);
779 if (clnt == NULL)
780 return -ENOMEM;
781
782 if ((err = l3_attach_client(clnt, "l3-bit-sa1100-gpio", UDA1341_ALSA_NAME))) {
783 kfree(clnt);
784 return err;
785 }
786
787 for (idx = 0; idx < ARRAY_SIZE(snd_uda1341_controls); idx++) {
788 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_uda1341_controls[idx], clnt))) < 0) {
789 uda1341_free(clnt);
790 return err;
791 }
792 }
793
794 if ((err = snd_device_new(card, SNDRV_DEV_CODEC, clnt, &ops)) < 0) {
795 uda1341_free(clnt);
796 return err;
797 }
798
799 *clntp = clnt;
800 strcpy(card->mixername, "UDA1341TS Mixer");
801 ((struct uda1341 *)clnt->driver_data)->card = card;
802
803 snd_uda1341_proc_init(card, clnt);
804
805 return 0;
806 }
807
808 /* }}} */
809
810 /* {{{ L3 operations */
811
812 static int uda1341_attach(struct l3_client *clnt)
813 {
814 struct uda1341 *uda;
815
816 uda = kzalloc(sizeof(*uda), 0, GFP_KERNEL);
817 if (!uda)
818 return -ENOMEM;
819
820 /* init fixed parts of my copy of registers */
821 uda->regs[stat0] = STAT0;
822 uda->regs[stat1] = STAT1;
823
824 uda->regs[data0_0] = DATA0_0;
825 uda->regs[data0_1] = DATA0_1;
826 uda->regs[data0_2] = DATA0_2;
827
828 uda->write = snd_uda1341_codec_write;
829 uda->read = snd_uda1341_codec_read;
830
831 spin_lock_init(&uda->reg_lock);
832
833 clnt->driver_data = uda;
834 return 0;
835 }
836
837 static void uda1341_detach(struct l3_client *clnt)
838 {
839 kfree(clnt->driver_data);
840 }
841
842 static int
843 uda1341_command(struct l3_client *clnt, int cmd, void *arg)
844 {
845 if (cmd != CMD_READ_REG)
846 return snd_uda1341_cfg_write(clnt, cmd, (int) arg, FLUSH);
847
848 return snd_uda1341_codec_read(clnt, (int) arg);
849 }
850
851 static int uda1341_open(struct l3_client *clnt)
852 {
853 struct uda1341 *uda = clnt->driver_data;
854
855 uda->active = 1;
856
857 /* init default configuration */
858 snd_uda1341_cfg_write(clnt, CMD_RESET, 0, REGS_ONLY);
859 snd_uda1341_cfg_write(clnt, CMD_FS, F256, FLUSH); // unknown state after reset
860 snd_uda1341_cfg_write(clnt, CMD_FORMAT, LSB16, FLUSH); // unknown state after reset
861 snd_uda1341_cfg_write(clnt, CMD_OGAIN, ON, FLUSH); // default off after reset
862 snd_uda1341_cfg_write(clnt, CMD_IGAIN, ON, FLUSH); // default off after reset
863 snd_uda1341_cfg_write(clnt, CMD_DAC, ON, FLUSH); // ??? default value after reset
864 snd_uda1341_cfg_write(clnt, CMD_ADC, ON, FLUSH); // ??? default value after reset
865 snd_uda1341_cfg_write(clnt, CMD_VOLUME, 20, FLUSH); // default 0dB after reset
866 snd_uda1341_cfg_write(clnt, CMD_BASS, 0, REGS_ONLY); // default value after reset
867 snd_uda1341_cfg_write(clnt, CMD_TREBBLE, 0, REGS_ONLY); // default value after reset
868 snd_uda1341_cfg_write(clnt, CMD_PEAK, AFTER, REGS_ONLY);// default value after reset
869 snd_uda1341_cfg_write(clnt, CMD_DEEMP, NONE, REGS_ONLY);// default value after reset
870 //at this moment should be QMUTED by h3600_audio_init
871 snd_uda1341_cfg_write(clnt, CMD_MUTE, OFF, REGS_ONLY); // default value after reset
872 snd_uda1341_cfg_write(clnt, CMD_FILTER, MAX, FLUSH); // defaul flat after reset
873 snd_uda1341_cfg_write(clnt, CMD_CH1, 31, FLUSH); // default value after reset
874 snd_uda1341_cfg_write(clnt, CMD_CH2, 4, FLUSH); // default value after reset
875 snd_uda1341_cfg_write(clnt, CMD_MIC, 4, FLUSH); // default 0dB after reset
876 snd_uda1341_cfg_write(clnt, CMD_MIXER, MIXER, FLUSH); // default doub.dif.mode
877 snd_uda1341_cfg_write(clnt, CMD_AGC, OFF, FLUSH); // default value after reset
878 snd_uda1341_cfg_write(clnt, CMD_IG, 0, FLUSH); // unknown state after reset
879 snd_uda1341_cfg_write(clnt, CMD_AGC_TIME, 0, FLUSH); // default value after reset
880 snd_uda1341_cfg_write(clnt, CMD_AGC_LEVEL, 0, FLUSH); // default value after reset
881
882 return 0;
883 }
884
885 static void uda1341_close(struct l3_client *clnt)
886 {
887 struct uda1341 *uda = clnt->driver_data;
888
889 uda->active = 0;
890 }
891
892 /* }}} */
893
894 /* {{{ Module and L3 initialization */
895
896 static struct l3_ops uda1341_ops = {
897 .open = uda1341_open,
898 .command = uda1341_command,
899 .close = uda1341_close,
900 };
901
902 static struct l3_driver uda1341_driver = {
903 .name = UDA1341_ALSA_NAME,
904 .attach_client = uda1341_attach,
905 .detach_client = uda1341_detach,
906 .ops = &uda1341_ops,
907 .owner = THIS_MODULE,
908 };
909
910 static int __init uda1341_init(void)
911 {
912 return l3_add_driver(&uda1341_driver);
913 }
914
915 static void __exit uda1341_exit(void)
916 {
917 l3_del_driver(&uda1341_driver);
918 }
919
920 module_init(uda1341_init);
921 module_exit(uda1341_exit);
922
923 MODULE_AUTHOR("Tomas Kasparek <tomas.kasparek@seznam.cz>");
924 MODULE_LICENSE("GPL");
925 MODULE_DESCRIPTION("Philips UDA1341 CODEC driver for ALSA");
926 MODULE_SUPPORTED_DEVICE("{{UDA1341,UDA1341TS}}");
927
928 EXPORT_SYMBOL(snd_chip_uda1341_mixer_new);
929
930 /* }}} */
931
932 /*
933 * Local variables:
934 * indent-tabs-mode: t
935 * End:
936 */
WRT350N Kernel Patches