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Blackfin serial driver: pending a unique anomaly id, tie the break flood issue to...
[wrt350n-kernel.git] / drivers / net / ewrk3.c
blobcb0792c187bab45fd2a3b5df9e571f04a37e6cac
1 /* ewrk3.c: A DIGITAL EtherWORKS 3 ethernet driver for Linux.
2
3 Written 1994 by David C. Davies.
4
5 Copyright 1994 Digital Equipment Corporation.
6
7 This software may be used and distributed according to the terms of
8 the GNU General Public License, incorporated herein by reference.
9
10 This driver is written for the Digital Equipment Corporation series
11 of EtherWORKS ethernet cards:
12
13 DE203 Turbo (BNC)
14 DE204 Turbo (TP)
15 DE205 Turbo (TP BNC)
16
17 The driver has been tested on a relatively busy network using the DE205
18 card and benchmarked with 'ttcp': it transferred 16M of data at 975kB/s
19 (7.8Mb/s) to a DECstation 5000/200.
20
21 The author may be reached at davies@maniac.ultranet.com.
22
23 =========================================================================
24 This driver has been written substantially from scratch, although its
25 inheritance of style and stack interface from 'depca.c' and in turn from
26 Donald Becker's 'lance.c' should be obvious.
27
28 The DE203/4/5 boards all use a new proprietary chip in place of the
29 LANCE chip used in prior cards (DEPCA, DE100, DE200/1/2, DE210, DE422).
30 Use the depca.c driver in the standard distribution for the LANCE based
31 cards from DIGITAL; this driver will not work with them.
32
33 The DE203/4/5 cards have 2 main modes: shared memory and I/O only. I/O
34 only makes all the card accesses through I/O transactions and no high
35 (shared) memory is used. This mode provides a >48% performance penalty
36 and is deprecated in this driver, although allowed to provide initial
37 setup when hardstrapped.
38
39 The shared memory mode comes in 3 flavours: 2kB, 32kB and 64kB. There is
40 no point in using any mode other than the 2kB mode - their performances
41 are virtually identical, although the driver has been tested in the 2kB
42 and 32kB modes. I would suggest you uncomment the line:
43
44 FORCE_2K_MODE;
45
46 to allow the driver to configure the card as a 2kB card at your current
47 base address, thus leaving more room to clutter your system box with
48 other memory hungry boards.
49
50 As many ISA and EISA cards can be supported under this driver as you
51 wish, limited primarily by the available IRQ lines, rather than by the
52 available I/O addresses (24 ISA, 16 EISA). I have checked different
53 configurations of multiple depca cards and ewrk3 cards and have not
54 found a problem yet (provided you have at least depca.c v0.38) ...
55
56 The board IRQ setting must be at an unused IRQ which is auto-probed
57 using Donald Becker's autoprobe routines. All these cards are at
58 {5,10,11,15}.
59
60 No 16MB memory limitation should exist with this driver as DMA is not
61 used and the common memory area is in low memory on the network card (my
62 current system has 20MB and I've not had problems yet).
63
64 The ability to load this driver as a loadable module has been included
65 and used extensively during the driver development (to save those long
66 reboot sequences). To utilise this ability, you have to do 8 things:
67
68 0) have a copy of the loadable modules code installed on your system.
69 1) copy ewrk3.c from the /linux/drivers/net directory to your favourite
70 temporary directory.
71 2) edit the source code near line 1898 to reflect the I/O address and
72 IRQ you're using.
73 3) compile ewrk3.c, but include -DMODULE in the command line to ensure
74 that the correct bits are compiled (see end of source code).
75 4) if you are wanting to add a new card, goto 5. Otherwise, recompile a
76 kernel with the ewrk3 configuration turned off and reboot.
77 5) insmod ewrk3.o
78 [Alan Cox: Changed this so you can insmod ewrk3.o irq=x io=y]
79 [Adam Kropelin: now accepts irq=x1,x2 io=y1,y2 for multiple cards]
80 6) run the net startup bits for your new eth?? interface manually
81 (usually /etc/rc.inet[12] at boot time).
82 7) enjoy!
83
84 Note that autoprobing is not allowed in loadable modules - the system is
85 already up and running and you're messing with interrupts.
86
87 To unload a module, turn off the associated interface
88 'ifconfig eth?? down' then 'rmmod ewrk3'.
89
90 Promiscuous mode has been turned off in this driver, but all the
91 multicast address bits have been turned on. This improved the send
92 performance on a busy network by about 13%.
93
94 Ioctl's have now been provided (primarily because I wanted to grab some
95 packet size statistics). They are patterned after 'plipconfig.c' from a
96 suggestion by Alan Cox. Using these ioctls, you can enable promiscuous
97 mode, add/delete multicast addresses, change the hardware address, get
98 packet size distribution statistics and muck around with the control and
99 status register. I'll add others if and when the need arises.
100
101 TO DO:
102 ------
103
104
105 Revision History
106 ----------------
107
108 Version Date Description
109
110 0.1 26-aug-94 Initial writing. ALPHA code release.
111 0.11 31-aug-94 Fixed: 2k mode memory base calc.,
112 LeMAC version calc.,
113 IRQ vector assignments during autoprobe.
114 0.12 31-aug-94 Tested working on LeMAC2 (DE20[345]-AC) card.
115 Fixed up MCA hash table algorithm.
116 0.20 4-sep-94 Added IOCTL functionality.
117 0.21 14-sep-94 Added I/O mode.
118 0.21axp 15-sep-94 Special version for ALPHA AXP Linux V1.0.
119 0.22 16-sep-94 Added more IOCTLs & tidied up.
120 0.23 21-sep-94 Added transmit cut through.
121 0.24 31-oct-94 Added uid checks in some ioctls.
122 0.30 1-nov-94 BETA code release.
123 0.31 5-dec-94 Added check/allocate region code.
124 0.32 16-jan-95 Broadcast packet fix.
125 0.33 10-Feb-95 Fix recognition bug reported by <bkm@star.rl.ac.uk>.
126 0.40 27-Dec-95 Rationalise MODULE and autoprobe code.
127 Rewrite for portability & updated.
128 ALPHA support from <jestabro@amt.tay1.dec.com>
129 Added verify_area() calls in ewrk3_ioctl() from
130 suggestion by <heiko@colossus.escape.de>.
131 Add new multicasting code.
132 0.41 20-Jan-96 Fix IRQ set up problem reported by
133 <kenneth@bbs.sas.ntu.ac.sg>.
134 0.42 22-Apr-96 Fix alloc_device() bug <jari@markkus2.fimr.fi>
135 0.43 16-Aug-96 Update alloc_device() to conform to de4x5.c
136 0.44 08-Nov-01 use library crc32 functions <Matt_Domsch@dell.com>
137 0.45 19-Jul-02 fix unaligned access on alpha <martin@bruli.net>
138 0.46 10-Oct-02 Multiple NIC support when module <akropel1@rochester.rr.com>
139 0.47 18-Oct-02 ethtool support <akropel1@rochester.rr.com>
140 0.48 18-Oct-02 cli/sti removal for 2.5 <vda@port.imtp.ilyichevsk.odessa.ua>
141 ioctl locking, signature search cleanup <akropel1@rochester.rr.com>
142
143 =========================================================================
144 */
145
146 #include <linux/module.h>
147 #include <linux/kernel.h>
148 #include <linux/string.h>
149 #include <linux/errno.h>
150 #include <linux/ioport.h>
151 #include <linux/slab.h>
152 #include <linux/interrupt.h>
153 #include <linux/delay.h>
154 #include <linux/init.h>
155 #include <linux/crc32.h>
156 #include <linux/netdevice.h>
157 #include <linux/etherdevice.h>
158 #include <linux/skbuff.h>
159 #include <linux/ethtool.h>
160 #include <linux/time.h>
161 #include <linux/types.h>
162 #include <linux/unistd.h>
163 #include <linux/ctype.h>
164 #include <linux/bitops.h>
165
166 #include <asm/io.h>
167 #include <asm/dma.h>
168 #include <asm/uaccess.h>
169
170 #include "ewrk3.h"
171
172 #define DRV_NAME "ewrk3"
173 #define DRV_VERSION "0.48"
174
175 static char version[] __initdata =
176 DRV_NAME ":v" DRV_VERSION " 2002/10/18 davies@maniac.ultranet.com\n";
177
178 #ifdef EWRK3_DEBUG
179 static int ewrk3_debug = EWRK3_DEBUG;
180 #else
181 static int ewrk3_debug = 1;
182 #endif
183
184 #define EWRK3_NDA 0xffe0 /* No Device Address */
185
186 #define PROBE_LENGTH 32
187 #define ETH_PROM_SIG 0xAA5500FFUL
188
189 #ifndef EWRK3_SIGNATURE
190 #define EWRK3_SIGNATURE {"DE203","DE204","DE205",""}
191 #define EWRK3_STRLEN 8
192 #endif
193
194 #ifndef EWRK3_RAM_BASE_ADDRESSES
195 #define EWRK3_RAM_BASE_ADDRESSES {0xc0000,0xd0000,0x00000}
196 #endif
197
198 /*
199 ** Sets up the I/O area for the autoprobe.
200 */
201 #define EWRK3_IO_BASE 0x100 /* Start address for probe search */
202 #define EWRK3_IOP_INC 0x20 /* I/O address increment */
203 #define EWRK3_TOTAL_SIZE 0x20 /* required I/O address length */
204
205 #ifndef MAX_NUM_EWRK3S
206 #define MAX_NUM_EWRK3S 21
207 #endif
208
209 #ifndef EWRK3_EISA_IO_PORTS
210 #define EWRK3_EISA_IO_PORTS 0x0c00 /* I/O port base address, slot 0 */
211 #endif
212
213 #ifndef MAX_EISA_SLOTS
214 #define MAX_EISA_SLOTS 16
215 #define EISA_SLOT_INC 0x1000
216 #endif
217
218 #define QUEUE_PKT_TIMEOUT (1*HZ) /* Jiffies */
219
220 /*
221 ** EtherWORKS 3 shared memory window sizes
222 */
223 #define IO_ONLY 0x00
224 #define SHMEM_2K 0x800
225 #define SHMEM_32K 0x8000
226 #define SHMEM_64K 0x10000
227
228 /*
229 ** EtherWORKS 3 IRQ ENABLE/DISABLE
230 */
231 #define ENABLE_IRQs { \
232 icr |= lp->irq_mask;\
233 outb(icr, EWRK3_ICR); /* Enable the IRQs */\
234 }
235
236 #define DISABLE_IRQs { \
237 icr = inb(EWRK3_ICR);\
238 icr &= ~lp->irq_mask;\
239 outb(icr, EWRK3_ICR); /* Disable the IRQs */\
240 }
241
242 /*
243 ** EtherWORKS 3 START/STOP
244 */
245 #define START_EWRK3 { \
246 csr = inb(EWRK3_CSR);\
247 csr &= ~(CSR_TXD|CSR_RXD);\
248 outb(csr, EWRK3_CSR); /* Enable the TX and/or RX */\
249 }
250
251 #define STOP_EWRK3 { \
252 csr = (CSR_TXD|CSR_RXD);\
253 outb(csr, EWRK3_CSR); /* Disable the TX and/or RX */\
254 }
255
256 /*
257 ** The EtherWORKS 3 private structure
258 */
259 #define EWRK3_PKT_STAT_SZ 16
260 #define EWRK3_PKT_BIN_SZ 128 /* Should be >=100 unless you
261 increase EWRK3_PKT_STAT_SZ */
262
263 struct ewrk3_stats {
264 u32 bins[EWRK3_PKT_STAT_SZ];
265 u32 unicast;
266 u32 multicast;
267 u32 broadcast;
268 u32 excessive_collisions;
269 u32 tx_underruns;
270 u32 excessive_underruns;
271 };
272
273 struct ewrk3_private {
274 char adapter_name[80]; /* Name exported to /proc/ioports */
275 u_long shmem_base; /* Shared memory start address */
276 void __iomem *shmem;
277 u_long shmem_length; /* Shared memory window length */
278 struct net_device_stats stats; /* Public stats */
279 struct ewrk3_stats pktStats; /* Private stats counters */
280 u_char irq_mask; /* Adapter IRQ mask bits */
281 u_char mPage; /* Maximum 2kB Page number */
282 u_char lemac; /* Chip rev. level */
283 u_char hard_strapped; /* Don't allow a full open */
284 u_char txc; /* Transmit cut through */
285 void __iomem *mctbl; /* Pointer to the multicast table */
286 u_char led_mask; /* Used to reserve LED access for ethtool */
287 spinlock_t hw_lock;
288 };
289
290 /*
291 ** Force the EtherWORKS 3 card to be in 2kB MODE
292 */
293 #define FORCE_2K_MODE { \
294 shmem_length = SHMEM_2K;\
295 outb(((mem_start - 0x80000) >> 11), EWRK3_MBR);\
296 }
297
298 /*
299 ** Public Functions
300 */
301 static int ewrk3_open(struct net_device *dev);
302 static int ewrk3_queue_pkt(struct sk_buff *skb, struct net_device *dev);
303 static irqreturn_t ewrk3_interrupt(int irq, void *dev_id);
304 static int ewrk3_close(struct net_device *dev);
305 static struct net_device_stats *ewrk3_get_stats(struct net_device *dev);
306 static void set_multicast_list(struct net_device *dev);
307 static int ewrk3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
308 static const struct ethtool_ops ethtool_ops_203;
309 static const struct ethtool_ops ethtool_ops;
310
311 /*
312 ** Private functions
313 */
314 static int ewrk3_hw_init(struct net_device *dev, u_long iobase);
315 static void ewrk3_init(struct net_device *dev);
316 static int ewrk3_rx(struct net_device *dev);
317 static int ewrk3_tx(struct net_device *dev);
318 static void ewrk3_timeout(struct net_device *dev);
319
320 static void EthwrkSignature(char *name, char *eeprom_image);
321 static int DevicePresent(u_long iobase);
322 static void SetMulticastFilter(struct net_device *dev);
323 static int EISA_signature(char *name, s32 eisa_id);
324
325 static int Read_EEPROM(u_long iobase, u_char eaddr);
326 static int Write_EEPROM(short data, u_long iobase, u_char eaddr);
327 static u_char get_hw_addr(struct net_device *dev, u_char * eeprom_image, char chipType);
328
329 static int ewrk3_probe1(struct net_device *dev, u_long iobase, int irq);
330 static int isa_probe(struct net_device *dev, u_long iobase);
331 static int eisa_probe(struct net_device *dev, u_long iobase);
332
333 static u_char irq[MAX_NUM_EWRK3S+1] = {5, 0, 10, 3, 11, 9, 15, 12};
334
335 static char name[EWRK3_STRLEN + 1];
336 static int num_ewrks3s;
337
338 /*
339 ** Miscellaneous defines...
340 */
341 #define INIT_EWRK3 {\
342 outb(EEPROM_INIT, EWRK3_IOPR);\
343 mdelay(1);\
344 }
345
346 #ifndef MODULE
347 struct net_device * __init ewrk3_probe(int unit)
348 {
349 struct net_device *dev = alloc_etherdev(sizeof(struct ewrk3_private));
350 int err;
351
352 if (!dev)
353 return ERR_PTR(-ENOMEM);
354
355 if (unit >= 0) {
356 sprintf(dev->name, "eth%d", unit);
357 netdev_boot_setup_check(dev);
358 }
359 SET_MODULE_OWNER(dev);
360
361 err = ewrk3_probe1(dev, dev->base_addr, dev->irq);
362 if (err)
363 goto out;
364 return dev;
365 out:
366 free_netdev(dev);
367 return ERR_PTR(err);
368
369 }
370 #endif
371
372 static int __init ewrk3_probe1(struct net_device *dev, u_long iobase, int irq)
373 {
374 int err;
375
376 dev->base_addr = iobase;
377 dev->irq = irq;
378
379 /* Address PROM pattern */
380 err = isa_probe(dev, iobase);
381 if (err != 0)
382 err = eisa_probe(dev, iobase);
383
384 if (err)
385 return err;
386
387 err = register_netdev(dev);
388 if (err)
389 release_region(dev->base_addr, EWRK3_TOTAL_SIZE);
390
391 return err;
392 }
393
394 static int __init
395 ewrk3_hw_init(struct net_device *dev, u_long iobase)
396 {
397 struct ewrk3_private *lp;
398 int i, status = 0;
399 u_long mem_start, shmem_length;
400 u_char cr, cmr, icr, nicsr, lemac, hard_strapped = 0;
401 u_char eeprom_image[EEPROM_MAX], chksum, eisa_cr = 0;
402
403 /*
404 ** Stop the EWRK3. Enable the DBR ROM. Disable interrupts and remote boot.
405 ** This also disables the EISA_ENABLE bit in the EISA Control Register.
406 */
407 if (iobase > 0x400)
408 eisa_cr = inb(EISA_CR);
409 INIT_EWRK3;
410
411 nicsr = inb(EWRK3_CSR);
412
413 icr = inb(EWRK3_ICR);
414 icr &= 0x70;
415 outb(icr, EWRK3_ICR); /* Disable all the IRQs */
416
417 if (nicsr != (CSR_TXD | CSR_RXD))
418 return -ENXIO;
419
420 /* Check that the EEPROM is alive and well and not living on Pluto... */
421 for (chksum = 0, i = 0; i < EEPROM_MAX; i += 2) {
422 union {
423 short val;
424 char c[2];
425 } tmp;
426
427 tmp.val = (short) Read_EEPROM(iobase, (i >> 1));
428 eeprom_image[i] = tmp.c[0];
429 eeprom_image[i + 1] = tmp.c[1];
430 chksum += eeprom_image[i] + eeprom_image[i + 1];
431 }
432
433 if (chksum != 0) { /* Bad EEPROM Data! */
434 printk("%s: Device has a bad on-board EEPROM.\n", dev->name);
435 return -ENXIO;
436 }
437
438 EthwrkSignature(name, eeprom_image);
439 if (*name == '\0')
440 return -ENXIO;
441
442 dev->base_addr = iobase;
443
444 if (iobase > 0x400) {
445 outb(eisa_cr, EISA_CR); /* Rewrite the EISA CR */
446 }
447 lemac = eeprom_image[EEPROM_CHIPVER];
448 cmr = inb(EWRK3_CMR);
449
450 if (((lemac == LeMAC) && ((cmr & CMR_NO_EEPROM) != CMR_NO_EEPROM)) ||
451 ((lemac == LeMAC2) && !(cmr & CMR_HS))) {
452 printk("%s: %s at %#4lx", dev->name, name, iobase);
453 hard_strapped = 1;
454 } else if ((iobase & 0x0fff) == EWRK3_EISA_IO_PORTS) {
455 /* EISA slot address */
456 printk("%s: %s at %#4lx (EISA slot %ld)",
457 dev->name, name, iobase, ((iobase >> 12) & 0x0f));
458 } else { /* ISA port address */
459 printk("%s: %s at %#4lx", dev->name, name, iobase);
460 }
461
462 printk(", h/w address ");
463 if (lemac != LeMAC2)
464 DevicePresent(iobase); /* need after EWRK3_INIT */
465 status = get_hw_addr(dev, eeprom_image, lemac);
466 for (i = 0; i < ETH_ALEN - 1; i++) { /* get the ethernet addr. */
467 printk("%2.2x:", dev->dev_addr[i]);
468 }
469 printk("%2.2x,\n", dev->dev_addr[i]);
470
471 if (status) {
472 printk(" which has an EEPROM CRC error.\n");
473 return -ENXIO;
474 }
475
476 if (lemac == LeMAC2) { /* Special LeMAC2 CMR things */
477 cmr &= ~(CMR_RA | CMR_WB | CMR_LINK | CMR_POLARITY | CMR_0WS);
478 if (eeprom_image[EEPROM_MISC0] & READ_AHEAD)
479 cmr |= CMR_RA;
480 if (eeprom_image[EEPROM_MISC0] & WRITE_BEHIND)
481 cmr |= CMR_WB;
482 if (eeprom_image[EEPROM_NETMAN0] & NETMAN_POL)
483 cmr |= CMR_POLARITY;
484 if (eeprom_image[EEPROM_NETMAN0] & NETMAN_LINK)
485 cmr |= CMR_LINK;
486 if (eeprom_image[EEPROM_MISC0] & _0WS_ENA)
487 cmr |= CMR_0WS;
488 }
489 if (eeprom_image[EEPROM_SETUP] & SETUP_DRAM)
490 cmr |= CMR_DRAM;
491 outb(cmr, EWRK3_CMR);
492
493 cr = inb(EWRK3_CR); /* Set up the Control Register */
494 cr |= eeprom_image[EEPROM_SETUP] & SETUP_APD;
495 if (cr & SETUP_APD)
496 cr |= eeprom_image[EEPROM_SETUP] & SETUP_PS;
497 cr |= eeprom_image[EEPROM_MISC0] & FAST_BUS;
498 cr |= eeprom_image[EEPROM_MISC0] & ENA_16;
499 outb(cr, EWRK3_CR);
500
501 /*
502 ** Determine the base address and window length for the EWRK3
503 ** RAM from the memory base register.
504 */
505 mem_start = inb(EWRK3_MBR);
506 shmem_length = 0;
507 if (mem_start != 0) {
508 if ((mem_start >= 0x0a) && (mem_start <= 0x0f)) {
509 mem_start *= SHMEM_64K;
510 shmem_length = SHMEM_64K;
511 } else if ((mem_start >= 0x14) && (mem_start <= 0x1f)) {
512 mem_start *= SHMEM_32K;
513 shmem_length = SHMEM_32K;
514 } else if ((mem_start >= 0x40) && (mem_start <= 0xff)) {
515 mem_start = mem_start * SHMEM_2K + 0x80000;
516 shmem_length = SHMEM_2K;
517 } else {
518 return -ENXIO;
519 }
520 }
521 /*
522 ** See the top of this source code for comments about
523 ** uncommenting this line.
524 */
525 /* FORCE_2K_MODE; */
526
527 if (hard_strapped) {
528 printk(" is hard strapped.\n");
529 } else if (mem_start) {
530 printk(" has a %dk RAM window", (int) (shmem_length >> 10));
531 printk(" at 0x%.5lx", mem_start);
532 } else {
533 printk(" is in I/O only mode");
534 }
535
536 lp = netdev_priv(dev);
537 lp->shmem_base = mem_start;
538 lp->shmem = ioremap(mem_start, shmem_length);
539 if (!lp->shmem)
540 return -ENOMEM;
541 lp->shmem_length = shmem_length;
542 lp->lemac = lemac;
543 lp->hard_strapped = hard_strapped;
544 lp->led_mask = CR_LED;
545 spin_lock_init(&lp->hw_lock);
546
547 lp->mPage = 64;
548 if (cmr & CMR_DRAM)
549 lp->mPage <<= 1; /* 2 DRAMS on module */
550
551 sprintf(lp->adapter_name, "%s (%s)", name, dev->name);
552
553 lp->irq_mask = ICR_TNEM | ICR_TXDM | ICR_RNEM | ICR_RXDM;
554
555 if (!hard_strapped) {
556 /*
557 ** Enable EWRK3 board interrupts for autoprobing
558 */
559 icr |= ICR_IE; /* Enable interrupts */
560 outb(icr, EWRK3_ICR);
561
562 /* The DMA channel may be passed in on this parameter. */
563 dev->dma = 0;
564
565 /* To auto-IRQ we enable the initialization-done and DMA err,
566 interrupts. For now we will always get a DMA error. */
567 if (dev->irq < 2) {
568 #ifndef MODULE
569 u_char irqnum;
570 unsigned long irq_mask;
571
572
573 irq_mask = probe_irq_on();
574
575 /*
576 ** Trigger a TNE interrupt.
577 */
578 icr |= ICR_TNEM;
579 outb(1, EWRK3_TDQ); /* Write to the TX done queue */
580 outb(icr, EWRK3_ICR); /* Unmask the TXD interrupt */
581
582 irqnum = irq[((icr & IRQ_SEL) >> 4)];
583
584 mdelay(20);
585 dev->irq = probe_irq_off(irq_mask);
586 if ((dev->irq) && (irqnum == dev->irq)) {
587 printk(" and uses IRQ%d.\n", dev->irq);
588 } else {
589 if (!dev->irq) {
590 printk(" and failed to detect IRQ line.\n");
591 } else if ((irqnum == 1) && (lemac == LeMAC2)) {
592 printk(" and an illegal IRQ line detected.\n");
593 } else {
594 printk(", but incorrect IRQ line detected.\n");
595 }
596 iounmap(lp->shmem);
597 return -ENXIO;
598 }
599
600 DISABLE_IRQs; /* Mask all interrupts */
601
602 #endif /* MODULE */
603 } else {
604 printk(" and requires IRQ%d.\n", dev->irq);
605 }
606 }
607
608 if (ewrk3_debug > 1) {
609 printk(version);
610 }
611 /* The EWRK3-specific entries in the device structure. */
612 dev->open = ewrk3_open;
613 dev->hard_start_xmit = ewrk3_queue_pkt;
614 dev->stop = ewrk3_close;
615 dev->get_stats = ewrk3_get_stats;
616 dev->set_multicast_list = set_multicast_list;
617 dev->do_ioctl = ewrk3_ioctl;
618 if (lp->adapter_name[4] == '3')
619 SET_ETHTOOL_OPS(dev, &ethtool_ops_203);
620 else
621 SET_ETHTOOL_OPS(dev, &ethtool_ops);
622 dev->tx_timeout = ewrk3_timeout;
623 dev->watchdog_timeo = QUEUE_PKT_TIMEOUT;
624
625 dev->mem_start = 0;
626
627 return 0;
628 }
629
630
631 static int ewrk3_open(struct net_device *dev)
632 {
633 struct ewrk3_private *lp = netdev_priv(dev);
634 u_long iobase = dev->base_addr;
635 int i, status = 0;
636 u_char icr, csr;
637
638 /*
639 ** Stop the TX and RX...
640 */
641 STOP_EWRK3;
642
643 if (!lp->hard_strapped) {
644 if (request_irq(dev->irq, (void *) ewrk3_interrupt, 0, "ewrk3", dev)) {
645 printk("ewrk3_open(): Requested IRQ%d is busy\n", dev->irq);
646 status = -EAGAIN;
647 } else {
648
649 /*
650 ** Re-initialize the EWRK3...
651 */
652 ewrk3_init(dev);
653
654 if (ewrk3_debug > 1) {
655 printk("%s: ewrk3 open with irq %d\n", dev->name, dev->irq);
656 printk(" physical address: ");
657 for (i = 0; i < 5; i++) {
658 printk("%2.2x:", (u_char) dev->dev_addr[i]);
659 }
660 printk("%2.2x\n", (u_char) dev->dev_addr[i]);
661 if (lp->shmem_length == 0) {
662 printk(" no shared memory, I/O only mode\n");
663 } else {
664 printk(" start of shared memory: 0x%08lx\n", lp->shmem_base);
665 printk(" window length: 0x%04lx\n", lp->shmem_length);
666 }
667 printk(" # of DRAMS: %d\n", ((inb(EWRK3_CMR) & 0x02) ? 2 : 1));
668 printk(" csr: 0x%02x\n", inb(EWRK3_CSR));
669 printk(" cr: 0x%02x\n", inb(EWRK3_CR));
670 printk(" icr: 0x%02x\n", inb(EWRK3_ICR));
671 printk(" cmr: 0x%02x\n", inb(EWRK3_CMR));
672 printk(" fmqc: 0x%02x\n", inb(EWRK3_FMQC));
673 }
674 netif_start_queue(dev);
675 /*
676 ** Unmask EWRK3 board interrupts
677 */
678 icr = inb(EWRK3_ICR);
679 ENABLE_IRQs;
680
681 }
682 } else {
683 printk(KERN_ERR "%s: ewrk3 available for hard strapped set up only.\n", dev->name);
684 printk(KERN_ERR " Run the 'ewrk3setup' utility or remove the hard straps.\n");
685 return -EINVAL;
686 }
687
688 return status;
689 }
690
691 /*
692 ** Initialize the EtherWORKS 3 operating conditions
693 */
694 static void ewrk3_init(struct net_device *dev)
695 {
696 struct ewrk3_private *lp = netdev_priv(dev);
697 u_char csr, page;
698 u_long iobase = dev->base_addr;
699 int i;
700
701 /*
702 ** Enable any multicasts
703 */
704 set_multicast_list(dev);
705
706 /*
707 ** Set hardware MAC address. Address is initialized from the EEPROM
708 ** during startup but may have since been changed by the user.
709 */
710 for (i=0; i<ETH_ALEN; i++)
711 outb(dev->dev_addr[i], EWRK3_PAR0 + i);
712
713 /*
714 ** Clean out any remaining entries in all the queues here
715 */
716 while (inb(EWRK3_TQ));
717 while (inb(EWRK3_TDQ));
718 while (inb(EWRK3_RQ));
719 while (inb(EWRK3_FMQ));
720
721 /*
722 ** Write a clean free memory queue
723 */
724 for (page = 1; page < lp->mPage; page++) { /* Write the free page numbers */
725 outb(page, EWRK3_FMQ); /* to the Free Memory Queue */
726 }
727
728 START_EWRK3; /* Enable the TX and/or RX */
729 }
730
731 /*
732 * Transmit timeout
733 */
734
735 static void ewrk3_timeout(struct net_device *dev)
736 {
737 struct ewrk3_private *lp = netdev_priv(dev);
738 u_char icr, csr;
739 u_long iobase = dev->base_addr;
740
741 if (!lp->hard_strapped)
742 {
743 printk(KERN_WARNING"%s: transmit timed/locked out, status %04x, resetting.\n",
744 dev->name, inb(EWRK3_CSR));
745
746 /*
747 ** Mask all board interrupts
748 */
749 DISABLE_IRQs;
750
751 /*
752 ** Stop the TX and RX...
753 */
754 STOP_EWRK3;
755
756 ewrk3_init(dev);
757
758 /*
759 ** Unmask EWRK3 board interrupts
760 */
761 ENABLE_IRQs;
762
763 dev->trans_start = jiffies;
764 netif_wake_queue(dev);
765 }
766 }
767
768 /*
769 ** Writes a socket buffer to the free page queue
770 */
771 static int ewrk3_queue_pkt (struct sk_buff *skb, struct net_device *dev)
772 {
773 struct ewrk3_private *lp = netdev_priv(dev);
774 u_long iobase = dev->base_addr;
775 void __iomem *buf = NULL;
776 u_char icr;
777 u_char page;
778
779 spin_lock_irq (&lp->hw_lock);
780 DISABLE_IRQs;
781
782 /* if no resources available, exit, request packet be queued */
783 if (inb (EWRK3_FMQC) == 0) {
784 printk (KERN_WARNING "%s: ewrk3_queue_pkt(): No free resources...\n",
785 dev->name);
786 printk (KERN_WARNING "%s: ewrk3_queue_pkt(): CSR: %02x ICR: %02x FMQC: %02x\n",
787 dev->name, inb (EWRK3_CSR), inb (EWRK3_ICR),
788 inb (EWRK3_FMQC));
789 goto err_out;
790 }
791
792 /*
793 ** Get a free page from the FMQ
794 */
795 if ((page = inb (EWRK3_FMQ)) >= lp->mPage) {
796 printk ("ewrk3_queue_pkt(): Invalid free memory page (%d).\n",
797 (u_char) page);
798 goto err_out;
799 }
800
801
802 /*
803 ** Set up shared memory window and pointer into the window
804 */
805 if (lp->shmem_length == IO_ONLY) {
806 outb (page, EWRK3_IOPR);
807 } else if (lp->shmem_length == SHMEM_2K) {
808 buf = lp->shmem;
809 outb (page, EWRK3_MPR);
810 } else if (lp->shmem_length == SHMEM_32K) {
811 buf = (((short) page << 11) & 0x7800) + lp->shmem;
812 outb ((page >> 4), EWRK3_MPR);
813 } else if (lp->shmem_length == SHMEM_64K) {
814 buf = (((short) page << 11) & 0xf800) + lp->shmem;
815 outb ((page >> 5), EWRK3_MPR);
816 } else {
817 printk (KERN_ERR "%s: Oops - your private data area is hosed!\n",
818 dev->name);
819 BUG ();
820 }
821
822 /*
823 ** Set up the buffer control structures and copy the data from
824 ** the socket buffer to the shared memory .
825 */
826 if (lp->shmem_length == IO_ONLY) {
827 int i;
828 u_char *p = skb->data;
829 outb ((char) (TCR_QMODE | TCR_PAD | TCR_IFC), EWRK3_DATA);
830 outb ((char) (skb->len & 0xff), EWRK3_DATA);
831 outb ((char) ((skb->len >> 8) & 0xff), EWRK3_DATA);
832 outb ((char) 0x04, EWRK3_DATA);
833 for (i = 0; i < skb->len; i++) {
834 outb (*p++, EWRK3_DATA);
835 }
836 outb (page, EWRK3_TQ); /* Start sending pkt */
837 } else {
838 writeb ((char) (TCR_QMODE | TCR_PAD | TCR_IFC), buf); /* ctrl byte */
839 buf += 1;
840 writeb ((char) (skb->len & 0xff), buf); /* length (16 bit xfer) */
841 buf += 1;
842 if (lp->txc) {
843 writeb(((skb->len >> 8) & 0xff) | XCT, buf);
844 buf += 1;
845 writeb (0x04, buf); /* index byte */
846 buf += 1;
847 writeb (0x00, (buf + skb->len)); /* Write the XCT flag */
848 memcpy_toio (buf, skb->data, PRELOAD); /* Write PRELOAD bytes */
849 outb (page, EWRK3_TQ); /* Start sending pkt */
850 memcpy_toio (buf + PRELOAD,
851 skb->data + PRELOAD,
852 skb->len - PRELOAD);
853 writeb (0xff, (buf + skb->len)); /* Write the XCT flag */
854 } else {
855 writeb ((skb->len >> 8) & 0xff, buf);
856 buf += 1;
857 writeb (0x04, buf); /* index byte */
858 buf += 1;
859 memcpy_toio (buf, skb->data, skb->len); /* Write data bytes */
860 outb (page, EWRK3_TQ); /* Start sending pkt */
861 }
862 }
863
864 ENABLE_IRQs;
865 spin_unlock_irq (&lp->hw_lock);
866
867 lp->stats.tx_bytes += skb->len;
868 dev->trans_start = jiffies;
869 dev_kfree_skb (skb);
870
871 /* Check for free resources: stop Tx queue if there are none */
872 if (inb (EWRK3_FMQC) == 0)
873 netif_stop_queue (dev);
874
875 return 0;
876
877 err_out:
878 ENABLE_IRQs;
879 spin_unlock_irq (&lp->hw_lock);
880 return 1;
881 }
882
883 /*
884 ** The EWRK3 interrupt handler.
885 */
886 static irqreturn_t ewrk3_interrupt(int irq, void *dev_id)
887 {
888 struct net_device *dev = dev_id;
889 struct ewrk3_private *lp;
890 u_long iobase;
891 u_char icr, cr, csr;
892
893 lp = netdev_priv(dev);
894 iobase = dev->base_addr;
895
896 /* get the interrupt information */
897 csr = inb(EWRK3_CSR);
898
899 /*
900 ** Mask the EWRK3 board interrupts and turn on the LED
901 */
902 spin_lock(&lp->hw_lock);
903 DISABLE_IRQs;
904
905 cr = inb(EWRK3_CR);
906 cr |= lp->led_mask;
907 outb(cr, EWRK3_CR);
908
909 if (csr & CSR_RNE) /* Rx interrupt (packet[s] arrived) */
910 ewrk3_rx(dev);
911
912 if (csr & CSR_TNE) /* Tx interrupt (packet sent) */
913 ewrk3_tx(dev);
914
915 /*
916 ** Now deal with the TX/RX disable flags. These are set when there
917 ** are no more resources. If resources free up then enable these
918 ** interrupts, otherwise mask them - failure to do this will result
919 ** in the system hanging in an interrupt loop.
920 */
921 if (inb(EWRK3_FMQC)) { /* any resources available? */
922 lp->irq_mask |= ICR_TXDM | ICR_RXDM; /* enable the interrupt source */
923 csr &= ~(CSR_TXD | CSR_RXD); /* ensure restart of a stalled TX or RX */
924 outb(csr, EWRK3_CSR);
925 netif_wake_queue(dev);
926 } else {
927 lp->irq_mask &= ~(ICR_TXDM | ICR_RXDM); /* disable the interrupt source */
928 }
929
930 /* Unmask the EWRK3 board interrupts and turn off the LED */
931 cr &= ~(lp->led_mask);
932 outb(cr, EWRK3_CR);
933 ENABLE_IRQs;
934 spin_unlock(&lp->hw_lock);
935 return IRQ_HANDLED;
936 }
937
938 /* Called with lp->hw_lock held */
939 static int ewrk3_rx(struct net_device *dev)
940 {
941 struct ewrk3_private *lp = netdev_priv(dev);
942 u_long iobase = dev->base_addr;
943 int i, status = 0;
944 u_char page;
945 void __iomem *buf = NULL;
946
947 while (inb(EWRK3_RQC) && !status) { /* Whilst there's incoming data */
948 if ((page = inb(EWRK3_RQ)) < lp->mPage) { /* Get next entry's buffer page */
949 /*
950 ** Set up shared memory window and pointer into the window
951 */
952 if (lp->shmem_length == IO_ONLY) {
953 outb(page, EWRK3_IOPR);
954 } else if (lp->shmem_length == SHMEM_2K) {
955 buf = lp->shmem;
956 outb(page, EWRK3_MPR);
957 } else if (lp->shmem_length == SHMEM_32K) {
958 buf = (((short) page << 11) & 0x7800) + lp->shmem;
959 outb((page >> 4), EWRK3_MPR);
960 } else if (lp->shmem_length == SHMEM_64K) {
961 buf = (((short) page << 11) & 0xf800) + lp->shmem;
962 outb((page >> 5), EWRK3_MPR);
963 } else {
964 status = -1;
965 printk("%s: Oops - your private data area is hosed!\n", dev->name);
966 }
967
968 if (!status) {
969 char rx_status;
970 int pkt_len;
971
972 if (lp->shmem_length == IO_ONLY) {
973 rx_status = inb(EWRK3_DATA);
974 pkt_len = inb(EWRK3_DATA);
975 pkt_len |= ((u_short) inb(EWRK3_DATA) << 8);
976 } else {
977 rx_status = readb(buf);
978 buf += 1;
979 pkt_len = readw(buf);
980 buf += 3;
981 }
982
983 if (!(rx_status & R_ROK)) { /* There was an error. */
984 lp->stats.rx_errors++; /* Update the error stats. */
985 if (rx_status & R_DBE)
986 lp->stats.rx_frame_errors++;
987 if (rx_status & R_CRC)
988 lp->stats.rx_crc_errors++;
989 if (rx_status & R_PLL)
990 lp->stats.rx_fifo_errors++;
991 } else {
992 struct sk_buff *skb;
993
994 if ((skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
995 unsigned char *p;
996 skb_reserve(skb, 2); /* Align to 16 bytes */
997 p = skb_put(skb, pkt_len);
998
999 if (lp->shmem_length == IO_ONLY) {
1000 *p = inb(EWRK3_DATA); /* dummy read */
1001 for (i = 0; i < pkt_len; i++) {
1002 *p++ = inb(EWRK3_DATA);
1003 }
1004 } else {
1005 memcpy_fromio(p, buf, pkt_len);
1006 }
1007
1008 for (i = 1; i < EWRK3_PKT_STAT_SZ - 1; i++) {
1009 if (pkt_len < i * EWRK3_PKT_BIN_SZ) {
1010 lp->pktStats.bins[i]++;
1011 i = EWRK3_PKT_STAT_SZ;
1012 }
1013 }
1014 p = skb->data; /* Look at the dest addr */
1015 if (p[0] & 0x01) { /* Multicast/Broadcast */
1016 if ((*(s16 *) & p[0] == -1) && (*(s16 *) & p[2] == -1) && (*(s16 *) & p[4] == -1)) {
1017 lp->pktStats.broadcast++;
1018 } else {
1019 lp->pktStats.multicast++;
1020 }
1021 } else if ((*(s16 *) & p[0] == *(s16 *) & dev->dev_addr[0]) &&
1022 (*(s16 *) & p[2] == *(s16 *) & dev->dev_addr[2]) &&
1023 (*(s16 *) & p[4] == *(s16 *) & dev->dev_addr[4])) {
1024 lp->pktStats.unicast++;
1025 }
1026 lp->pktStats.bins[0]++; /* Duplicates stats.rx_packets */
1027 if (lp->pktStats.bins[0] == 0) { /* Reset counters */
1028 memset(&lp->pktStats, 0, sizeof(lp->pktStats));
1029 }
1030 /*
1031 ** Notify the upper protocol layers that there is another
1032 ** packet to handle
1033 */
1034 skb->protocol = eth_type_trans(skb, dev);
1035 netif_rx(skb);
1036
1037 /*
1038 ** Update stats
1039 */
1040 dev->last_rx = jiffies;
1041 lp->stats.rx_packets++;
1042 lp->stats.rx_bytes += pkt_len;
1043 } else {
1044 printk("%s: Insufficient memory; nuking packet.\n", dev->name);
1045 lp->stats.rx_dropped++; /* Really, deferred. */
1046 break;
1047 }
1048 }
1049 }
1050 /*
1051 ** Return the received buffer to the free memory queue
1052 */
1053 outb(page, EWRK3_FMQ);
1054 } else {
1055 printk("ewrk3_rx(): Illegal page number, page %d\n", page);
1056 printk("ewrk3_rx(): CSR: %02x ICR: %02x FMQC: %02x\n", inb(EWRK3_CSR), inb(EWRK3_ICR), inb(EWRK3_FMQC));
1057 }
1058 }
1059 return status;
1060 }
1061
1062 /*
1063 ** Buffer sent - check for TX buffer errors.
1064 ** Called with lp->hw_lock held
1065 */
1066 static int ewrk3_tx(struct net_device *dev)
1067 {
1068 struct ewrk3_private *lp = netdev_priv(dev);
1069 u_long iobase = dev->base_addr;
1070 u_char tx_status;
1071
1072 while ((tx_status = inb(EWRK3_TDQ)) > 0) { /* Whilst there's old buffers */
1073 if (tx_status & T_VSTS) { /* The status is valid */
1074 if (tx_status & T_TXE) {
1075 lp->stats.tx_errors++;
1076 if (tx_status & T_NCL)
1077 lp->stats.tx_carrier_errors++;
1078 if (tx_status & T_LCL)
1079 lp->stats.tx_window_errors++;
1080 if (tx_status & T_CTU) {
1081 if ((tx_status & T_COLL) ^ T_XUR) {
1082 lp->pktStats.tx_underruns++;
1083 } else {
1084 lp->pktStats.excessive_underruns++;
1085 }
1086 } else if (tx_status & T_COLL) {
1087 if ((tx_status & T_COLL) ^ T_XCOLL) {
1088 lp->stats.collisions++;
1089 } else {
1090 lp->pktStats.excessive_collisions++;
1091 }
1092 }
1093 } else {
1094 lp->stats.tx_packets++;
1095 }
1096 }
1097 }
1098
1099 return 0;
1100 }
1101
1102 static int ewrk3_close(struct net_device *dev)
1103 {
1104 struct ewrk3_private *lp = netdev_priv(dev);
1105 u_long iobase = dev->base_addr;
1106 u_char icr, csr;
1107
1108 netif_stop_queue(dev);
1109
1110 if (ewrk3_debug > 1) {
1111 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1112 dev->name, inb(EWRK3_CSR));
1113 }
1114 /*
1115 ** We stop the EWRK3 here... mask interrupts and stop TX & RX
1116 */
1117 DISABLE_IRQs;
1118
1119 STOP_EWRK3;
1120
1121 /*
1122 ** Clean out the TX and RX queues here (note that one entry
1123 ** may get added to either the TXD or RX queues if the TX or RX
1124 ** just starts processing a packet before the STOP_EWRK3 command
1125 ** is received. This will be flushed in the ewrk3_open() call).
1126 */
1127 while (inb(EWRK3_TQ));
1128 while (inb(EWRK3_TDQ));
1129 while (inb(EWRK3_RQ));
1130
1131 if (!lp->hard_strapped) {
1132 free_irq(dev->irq, dev);
1133 }
1134 return 0;
1135 }
1136
1137 static struct net_device_stats *ewrk3_get_stats(struct net_device *dev)
1138 {
1139 struct ewrk3_private *lp = netdev_priv(dev);
1140
1141 /* Null body since there is no framing error counter */
1142 return &lp->stats;
1143 }
1144
1145 /*
1146 ** Set or clear the multicast filter for this adapter.
1147 */
1148 static void set_multicast_list(struct net_device *dev)
1149 {
1150 struct ewrk3_private *lp = netdev_priv(dev);
1151 u_long iobase = dev->base_addr;
1152 u_char csr;
1153
1154 csr = inb(EWRK3_CSR);
1155
1156 if (lp->shmem_length == IO_ONLY) {
1157 lp->mctbl = NULL;
1158 } else {
1159 lp->mctbl = lp->shmem + PAGE0_HTE;
1160 }
1161
1162 csr &= ~(CSR_PME | CSR_MCE);
1163 if (dev->flags & IFF_PROMISC) { /* set promiscuous mode */
1164 csr |= CSR_PME;
1165 outb(csr, EWRK3_CSR);
1166 } else {
1167 SetMulticastFilter(dev);
1168 csr |= CSR_MCE;
1169 outb(csr, EWRK3_CSR);
1170 }
1171 }
1172
1173 /*
1174 ** Calculate the hash code and update the logical address filter
1175 ** from a list of ethernet multicast addresses.
1176 ** Little endian crc one liner from Matt Thomas, DEC.
1177 **
1178 ** Note that when clearing the table, the broadcast bit must remain asserted
1179 ** to receive broadcast messages.
1180 */
1181 static void SetMulticastFilter(struct net_device *dev)
1182 {
1183 struct ewrk3_private *lp = netdev_priv(dev);
1184 struct dev_mc_list *dmi = dev->mc_list;
1185 u_long iobase = dev->base_addr;
1186 int i;
1187 char *addrs, bit, byte;
1188 short __iomem *p = lp->mctbl;
1189 u16 hashcode;
1190 u32 crc;
1191
1192 spin_lock_irq(&lp->hw_lock);
1193
1194 if (lp->shmem_length == IO_ONLY) {
1195 outb(0, EWRK3_IOPR);
1196 outw(PAGE0_HTE, EWRK3_PIR1);
1197 } else {
1198 outb(0, EWRK3_MPR);
1199 }
1200
1201 if (dev->flags & IFF_ALLMULTI) {
1202 for (i = 0; i < (HASH_TABLE_LEN >> 3); i++) {
1203 if (lp->shmem_length == IO_ONLY) {
1204 outb(0xff, EWRK3_DATA);
1205 } else { /* memset didn't work here */
1206 writew(0xffff, p);
1207 p++;
1208 i++;
1209 }
1210 }
1211 } else {
1212 /* Clear table except for broadcast bit */
1213 if (lp->shmem_length == IO_ONLY) {
1214 for (i = 0; i < (HASH_TABLE_LEN >> 4) - 1; i++) {
1215 outb(0x00, EWRK3_DATA);
1216 }
1217 outb(0x80, EWRK3_DATA);
1218 i++; /* insert the broadcast bit */
1219 for (; i < (HASH_TABLE_LEN >> 3); i++) {
1220 outb(0x00, EWRK3_DATA);
1221 }
1222 } else {
1223 memset_io(lp->mctbl, 0, HASH_TABLE_LEN >> 3);
1224 writeb(0x80, lp->mctbl + (HASH_TABLE_LEN >> 4) - 1);
1225 }
1226
1227 /* Update table */
1228 for (i = 0; i < dev->mc_count; i++) { /* for each address in the list */
1229 addrs = dmi->dmi_addr;
1230 dmi = dmi->next;
1231 if ((*addrs & 0x01) == 1) { /* multicast address? */
1232 crc = ether_crc_le(ETH_ALEN, addrs);
1233 hashcode = crc & ((1 << 9) - 1); /* hashcode is 9 LSb of CRC */
1234
1235 byte = hashcode >> 3; /* bit[3-8] -> byte in filter */
1236 bit = 1 << (hashcode & 0x07); /* bit[0-2] -> bit in byte */
1237
1238 if (lp->shmem_length == IO_ONLY) {
1239 u_char tmp;
1240
1241 outw(PAGE0_HTE + byte, EWRK3_PIR1);
1242 tmp = inb(EWRK3_DATA);
1243 tmp |= bit;
1244 outw(PAGE0_HTE + byte, EWRK3_PIR1);
1245 outb(tmp, EWRK3_DATA);
1246 } else {
1247 writeb(readb(lp->mctbl + byte) | bit, lp->mctbl + byte);
1248 }
1249 }
1250 }
1251 }
1252
1253 spin_unlock_irq(&lp->hw_lock);
1254 }
1255
1256 /*
1257 ** ISA bus I/O device probe
1258 */
1259 static int __init isa_probe(struct net_device *dev, u_long ioaddr)
1260 {
1261 int i = num_ewrks3s, maxSlots;
1262 int ret = -ENODEV;
1263
1264 u_long iobase;
1265
1266 if (ioaddr >= 0x400)
1267 goto out;
1268
1269 if (ioaddr == 0) { /* Autoprobing */
1270 iobase = EWRK3_IO_BASE; /* Get the first slot address */
1271 maxSlots = 24;
1272 } else { /* Probe a specific location */
1273 iobase = ioaddr;
1274 maxSlots = i + 1;
1275 }
1276
1277 for (; (i < maxSlots) && (dev != NULL);
1278 iobase += EWRK3_IOP_INC, i++)
1279 {
1280 if (request_region(iobase, EWRK3_TOTAL_SIZE, DRV_NAME)) {
1281 if (DevicePresent(iobase) == 0) {
1282 int irq = dev->irq;
1283 ret = ewrk3_hw_init(dev, iobase);
1284 if (!ret)
1285 break;
1286 dev->irq = irq;
1287 }
1288 release_region(iobase, EWRK3_TOTAL_SIZE);
1289 }
1290 }
1291 out:
1292
1293 return ret;
1294 }
1295
1296 /*
1297 ** EISA bus I/O device probe. Probe from slot 1 since slot 0 is usually
1298 ** the motherboard.
1299 */
1300 static int __init eisa_probe(struct net_device *dev, u_long ioaddr)
1301 {
1302 int i, maxSlots;
1303 u_long iobase;
1304 int ret = -ENODEV;
1305
1306 if (ioaddr < 0x1000)
1307 goto out;
1308
1309 iobase = ioaddr;
1310 i = (ioaddr >> 12);
1311 maxSlots = i + 1;
1312
1313 for (i = 1; (i < maxSlots) && (dev != NULL); i++, iobase += EISA_SLOT_INC) {
1314 if (EISA_signature(name, EISA_ID) == 0) {
1315 if (request_region(iobase, EWRK3_TOTAL_SIZE, DRV_NAME) &&
1316 DevicePresent(iobase) == 0) {
1317 int irq = dev->irq;
1318 ret = ewrk3_hw_init(dev, iobase);
1319 if (!ret)
1320 break;
1321 dev->irq = irq;
1322 }
1323 release_region(iobase, EWRK3_TOTAL_SIZE);
1324 }
1325 }
1326
1327 out:
1328 return ret;
1329 }
1330
1331
1332 /*
1333 ** Read the EWRK3 EEPROM using this routine
1334 */
1335 static int Read_EEPROM(u_long iobase, u_char eaddr)
1336 {
1337 int i;
1338
1339 outb((eaddr & 0x3f), EWRK3_PIR1); /* set up 6 bits of address info */
1340 outb(EEPROM_RD, EWRK3_IOPR); /* issue read command */
1341 for (i = 0; i < 5000; i++)
1342 inb(EWRK3_CSR); /* wait 1msec */
1343
1344 return inw(EWRK3_EPROM1); /* 16 bits data return */
1345 }
1346
1347 /*
1348 ** Write the EWRK3 EEPROM using this routine
1349 */
1350 static int Write_EEPROM(short data, u_long iobase, u_char eaddr)
1351 {
1352 int i;
1353
1354 outb(EEPROM_WR_EN, EWRK3_IOPR); /* issue write enable command */
1355 for (i = 0; i < 5000; i++)
1356 inb(EWRK3_CSR); /* wait 1msec */
1357 outw(data, EWRK3_EPROM1); /* write data to register */
1358 outb((eaddr & 0x3f), EWRK3_PIR1); /* set up 6 bits of address info */
1359 outb(EEPROM_WR, EWRK3_IOPR); /* issue write command */
1360 for (i = 0; i < 75000; i++)
1361 inb(EWRK3_CSR); /* wait 15msec */
1362 outb(EEPROM_WR_DIS, EWRK3_IOPR); /* issue write disable command */
1363 for (i = 0; i < 5000; i++)
1364 inb(EWRK3_CSR); /* wait 1msec */
1365
1366 return 0;
1367 }
1368
1369 /*
1370 ** Look for a particular board name in the on-board EEPROM.
1371 */
1372 static void __init EthwrkSignature(char *name, char *eeprom_image)
1373 {
1374 int i;
1375 char *signatures[] = EWRK3_SIGNATURE;
1376
1377 for (i=0; *signatures[i] != '\0'; i++)
1378 if( !strncmp(eeprom_image+EEPROM_PNAME7, signatures[i], strlen(signatures[i])) )
1379 break;
1380
1381 if (*signatures[i] != '\0') {
1382 memcpy(name, eeprom_image+EEPROM_PNAME7, EWRK3_STRLEN);
1383 name[EWRK3_STRLEN] = '\0';
1384 } else
1385 name[0] = '\0';
1386
1387 return;
1388 }
1389
1390 /*
1391 ** Look for a special sequence in the Ethernet station address PROM that
1392 ** is common across all EWRK3 products.
1393 **
1394 ** Search the Ethernet address ROM for the signature. Since the ROM address
1395 ** counter can start at an arbitrary point, the search must include the entire
1396 ** probe sequence length plus the (length_of_the_signature - 1).
1397 ** Stop the search IMMEDIATELY after the signature is found so that the
1398 ** PROM address counter is correctly positioned at the start of the
1399 ** ethernet address for later read out.
1400 */
1401
1402 static int __init DevicePresent(u_long iobase)
1403 {
1404 union {
1405 struct {
1406 u32 a;
1407 u32 b;
1408 } llsig;
1409 char Sig[sizeof(u32) << 1];
1410 }
1411 dev;
1412 short sigLength;
1413 char data;
1414 int i, j, status = 0;
1415
1416 dev.llsig.a = ETH_PROM_SIG;
1417 dev.llsig.b = ETH_PROM_SIG;
1418 sigLength = sizeof(u32) << 1;
1419
1420 for (i = 0, j = 0; j < sigLength && i < PROBE_LENGTH + sigLength - 1; i++) {
1421 data = inb(EWRK3_APROM);
1422 if (dev.Sig[j] == data) { /* track signature */
1423 j++;
1424 } else { /* lost signature; begin search again */
1425 if (data == dev.Sig[0]) {
1426 j = 1;
1427 } else {
1428 j = 0;
1429 }
1430 }
1431 }
1432
1433 if (j != sigLength) {
1434 status = -ENODEV; /* search failed */
1435 }
1436 return status;
1437 }
1438
1439 static u_char __init get_hw_addr(struct net_device *dev, u_char * eeprom_image, char chipType)
1440 {
1441 int i, j, k;
1442 u_short chksum;
1443 u_char crc, lfsr, sd, status = 0;
1444 u_long iobase = dev->base_addr;
1445 u16 tmp;
1446
1447 if (chipType == LeMAC2) {
1448 for (crc = 0x6a, j = 0; j < ETH_ALEN; j++) {
1449 sd = dev->dev_addr[j] = eeprom_image[EEPROM_PADDR0 + j];
1450 outb(dev->dev_addr[j], EWRK3_PAR0 + j);
1451 for (k = 0; k < 8; k++, sd >>= 1) {
1452 lfsr = ((((crc & 0x02) >> 1) ^ (crc & 0x01)) ^ (sd & 0x01)) << 7;
1453 crc = (crc >> 1) + lfsr;
1454 }
1455 }
1456 if (crc != eeprom_image[EEPROM_PA_CRC])
1457 status = -1;
1458 } else {
1459 for (i = 0, k = 0; i < ETH_ALEN;) {
1460 k <<= 1;
1461 if (k > 0xffff)
1462 k -= 0xffff;
1463
1464 k += (u_char) (tmp = inb(EWRK3_APROM));
1465 dev->dev_addr[i] = (u_char) tmp;
1466 outb(dev->dev_addr[i], EWRK3_PAR0 + i);
1467 i++;
1468 k += (u_short) ((tmp = inb(EWRK3_APROM)) << 8);
1469 dev->dev_addr[i] = (u_char) tmp;
1470 outb(dev->dev_addr[i], EWRK3_PAR0 + i);
1471 i++;
1472
1473 if (k > 0xffff)
1474 k -= 0xffff;
1475 }
1476 if (k == 0xffff)
1477 k = 0;
1478 chksum = inb(EWRK3_APROM);
1479 chksum |= (inb(EWRK3_APROM) << 8);
1480 if (k != chksum)
1481 status = -1;
1482 }
1483
1484 return status;
1485 }
1486
1487 /*
1488 ** Look for a particular board name in the EISA configuration space
1489 */
1490 static int __init EISA_signature(char *name, s32 eisa_id)
1491 {
1492 u_long i;
1493 char *signatures[] = EWRK3_SIGNATURE;
1494 char ManCode[EWRK3_STRLEN];
1495 union {
1496 s32 ID;
1497 char Id[4];
1498 } Eisa;
1499 int status = 0;
1500
1501 *name = '\0';
1502 for (i = 0; i < 4; i++) {
1503 Eisa.Id[i] = inb(eisa_id + i);
1504 }
1505
1506 ManCode[0] = (((Eisa.Id[0] >> 2) & 0x1f) + 0x40);
1507 ManCode[1] = (((Eisa.Id[1] & 0xe0) >> 5) + ((Eisa.Id[0] & 0x03) << 3) + 0x40);
1508 ManCode[2] = (((Eisa.Id[2] >> 4) & 0x0f) + 0x30);
1509 ManCode[3] = ((Eisa.Id[2] & 0x0f) + 0x30);
1510 ManCode[4] = (((Eisa.Id[3] >> 4) & 0x0f) + 0x30);
1511 ManCode[5] = '\0';
1512
1513 for (i = 0; (*signatures[i] != '\0') && (*name == '\0'); i++) {
1514 if (strstr(ManCode, signatures[i]) != NULL) {
1515 strcpy(name, ManCode);
1516 status = 1;
1517 }
1518 }
1519
1520 return status; /* return the device name string */
1521 }
1522
1523 static void ewrk3_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1524 {
1525 int fwrev = Read_EEPROM(dev->base_addr, EEPROM_REVLVL);
1526
1527 strcpy(info->driver, DRV_NAME);
1528 strcpy(info->version, DRV_VERSION);
1529 sprintf(info->fw_version, "%d", fwrev);
1530 strcpy(info->bus_info, "N/A");
1531 info->eedump_len = EEPROM_MAX;
1532 }
1533
1534 static int ewrk3_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1535 {
1536 struct ewrk3_private *lp = netdev_priv(dev);
1537 unsigned long iobase = dev->base_addr;
1538 u8 cr = inb(EWRK3_CR);
1539
1540 switch (lp->adapter_name[4]) {
1541 case '3': /* DE203 */
1542 ecmd->supported = SUPPORTED_BNC;
1543 ecmd->port = PORT_BNC;
1544 break;
1545
1546 case '4': /* DE204 */
1547 ecmd->supported = SUPPORTED_TP;
1548 ecmd->port = PORT_TP;
1549 break;
1550
1551 case '5': /* DE205 */
1552 ecmd->supported = SUPPORTED_TP | SUPPORTED_BNC | SUPPORTED_AUI;
1553 ecmd->autoneg = !(cr & CR_APD);
1554 /*
1555 ** Port is only valid if autoneg is disabled
1556 ** and even then we don't know if AUI is jumpered.
1557 */
1558 if (!ecmd->autoneg)
1559 ecmd->port = (cr & CR_PSEL) ? PORT_BNC : PORT_TP;
1560 break;
1561 }
1562
1563 ecmd->supported |= SUPPORTED_10baseT_Half;
1564 ecmd->speed = SPEED_10;
1565 ecmd->duplex = DUPLEX_HALF;
1566 return 0;
1567 }
1568
1569 static int ewrk3_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1570 {
1571 struct ewrk3_private *lp = netdev_priv(dev);
1572 unsigned long iobase = dev->base_addr;
1573 unsigned long flags;
1574 u8 cr;
1575
1576 /* DE205 is the only card with anything to set */
1577 if (lp->adapter_name[4] != '5')
1578 return -EOPNOTSUPP;
1579
1580 /* Sanity-check parameters */
1581 if (ecmd->speed != SPEED_10)
1582 return -EINVAL;
1583 if (ecmd->port != PORT_TP && ecmd->port != PORT_BNC)
1584 return -EINVAL; /* AUI is not software-selectable */
1585 if (ecmd->transceiver != XCVR_INTERNAL)
1586 return -EINVAL;
1587 if (ecmd->duplex != DUPLEX_HALF)
1588 return -EINVAL;
1589 if (ecmd->phy_address != 0)
1590 return -EINVAL;
1591
1592 spin_lock_irqsave(&lp->hw_lock, flags);
1593 cr = inb(EWRK3_CR);
1594
1595 /* If Autoneg is set, change to Auto Port mode */
1596 /* Otherwise, disable Auto Port and set port explicitly */
1597 if (ecmd->autoneg) {
1598 cr &= ~CR_APD;
1599 } else {
1600 cr |= CR_APD;
1601 if (ecmd->port == PORT_TP)
1602 cr &= ~CR_PSEL; /* Force TP */
1603 else
1604 cr |= CR_PSEL; /* Force BNC */
1605 }
1606
1607 /* Commit the changes */
1608 outb(cr, EWRK3_CR);
1609 spin_unlock_irqrestore(&lp->hw_lock, flags);
1610 return 0;
1611 }
1612
1613 static u32 ewrk3_get_link(struct net_device *dev)
1614 {
1615 unsigned long iobase = dev->base_addr;
1616 u8 cmr = inb(EWRK3_CMR);
1617 /* DE203 has BNC only and link status does not apply */
1618 /* On DE204 this is always valid since TP is the only port. */
1619 /* On DE205 this reflects TP status even if BNC or AUI is selected. */
1620 return !(cmr & CMR_LINK);
1621 }
1622
1623 static int ewrk3_phys_id(struct net_device *dev, u32 data)
1624 {
1625 struct ewrk3_private *lp = netdev_priv(dev);
1626 unsigned long iobase = dev->base_addr;
1627 unsigned long flags;
1628 u8 cr;
1629 int count;
1630
1631 /* Toggle LED 4x per second */
1632 count = data << 2;
1633
1634 spin_lock_irqsave(&lp->hw_lock, flags);
1635
1636 /* Bail if a PHYS_ID is already in progress */
1637 if (lp->led_mask == 0) {
1638 spin_unlock_irqrestore(&lp->hw_lock, flags);
1639 return -EBUSY;
1640 }
1641
1642 /* Prevent ISR from twiddling the LED */
1643 lp->led_mask = 0;
1644
1645 while (count--) {
1646 /* Toggle the LED */
1647 cr = inb(EWRK3_CR);
1648 outb(cr ^ CR_LED, EWRK3_CR);
1649
1650 /* Wait a little while */
1651 spin_unlock_irqrestore(&lp->hw_lock, flags);
1652 msleep(250);
1653 spin_lock_irqsave(&lp->hw_lock, flags);
1654
1655 /* Exit if we got a signal */
1656 if (signal_pending(current))
1657 break;
1658 }
1659
1660 lp->led_mask = CR_LED;
1661 cr = inb(EWRK3_CR);
1662 outb(cr & ~CR_LED, EWRK3_CR);
1663 spin_unlock_irqrestore(&lp->hw_lock, flags);
1664 return signal_pending(current) ? -ERESTARTSYS : 0;
1665 }
1666
1667 static const struct ethtool_ops ethtool_ops_203 = {
1668 .get_drvinfo = ewrk3_get_drvinfo,
1669 .get_settings = ewrk3_get_settings,
1670 .set_settings = ewrk3_set_settings,
1671 .phys_id = ewrk3_phys_id,
1672 };
1673
1674 static const struct ethtool_ops ethtool_ops = {
1675 .get_drvinfo = ewrk3_get_drvinfo,
1676 .get_settings = ewrk3_get_settings,
1677 .set_settings = ewrk3_set_settings,
1678 .get_link = ewrk3_get_link,
1679 .phys_id = ewrk3_phys_id,
1680 };
1681
1682 /*
1683 ** Perform IOCTL call functions here. Some are privileged operations and the
1684 ** effective uid is checked in those cases.
1685 */
1686 static int ewrk3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1687 {
1688 struct ewrk3_private *lp = netdev_priv(dev);
1689 struct ewrk3_ioctl *ioc = (struct ewrk3_ioctl *) &rq->ifr_ifru;
1690 u_long iobase = dev->base_addr;
1691 int i, j, status = 0;
1692 u_char csr;
1693 unsigned long flags;
1694 union ewrk3_addr {
1695 u_char addr[HASH_TABLE_LEN * ETH_ALEN];
1696 u_short val[(HASH_TABLE_LEN * ETH_ALEN) >> 1];
1697 };
1698
1699 union ewrk3_addr *tmp;
1700
1701 /* All we handle are private IOCTLs */
1702 if (cmd != EWRK3IOCTL)
1703 return -EOPNOTSUPP;
1704
1705 tmp = kmalloc(sizeof(union ewrk3_addr), GFP_KERNEL);
1706 if(tmp==NULL)
1707 return -ENOMEM;
1708
1709 switch (ioc->cmd) {
1710 case EWRK3_GET_HWADDR: /* Get the hardware address */
1711 for (i = 0; i < ETH_ALEN; i++) {
1712 tmp->addr[i] = dev->dev_addr[i];
1713 }
1714 ioc->len = ETH_ALEN;
1715 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1716 status = -EFAULT;
1717 break;
1718
1719 case EWRK3_SET_HWADDR: /* Set the hardware address */
1720 if (capable(CAP_NET_ADMIN)) {
1721 spin_lock_irqsave(&lp->hw_lock, flags);
1722 csr = inb(EWRK3_CSR);
1723 csr |= (CSR_TXD | CSR_RXD);
1724 outb(csr, EWRK3_CSR); /* Disable the TX and RX */
1725 spin_unlock_irqrestore(&lp->hw_lock, flags);
1726
1727 if (copy_from_user(tmp->addr, ioc->data, ETH_ALEN)) {
1728 status = -EFAULT;
1729 break;
1730 }
1731 spin_lock_irqsave(&lp->hw_lock, flags);
1732 for (i = 0; i < ETH_ALEN; i++) {
1733 dev->dev_addr[i] = tmp->addr[i];
1734 outb(tmp->addr[i], EWRK3_PAR0 + i);
1735 }
1736
1737 csr = inb(EWRK3_CSR);
1738 csr &= ~(CSR_TXD | CSR_RXD); /* Enable the TX and RX */
1739 outb(csr, EWRK3_CSR);
1740 spin_unlock_irqrestore(&lp->hw_lock, flags);
1741 } else {
1742 status = -EPERM;
1743 }
1744
1745 break;
1746 case EWRK3_SET_PROM: /* Set Promiscuous Mode */
1747 if (capable(CAP_NET_ADMIN)) {
1748 spin_lock_irqsave(&lp->hw_lock, flags);
1749 csr = inb(EWRK3_CSR);
1750 csr |= CSR_PME;
1751 csr &= ~CSR_MCE;
1752 outb(csr, EWRK3_CSR);
1753 spin_unlock_irqrestore(&lp->hw_lock, flags);
1754 } else {
1755 status = -EPERM;
1756 }
1757
1758 break;
1759 case EWRK3_CLR_PROM: /* Clear Promiscuous Mode */
1760 if (capable(CAP_NET_ADMIN)) {
1761 spin_lock_irqsave(&lp->hw_lock, flags);
1762 csr = inb(EWRK3_CSR);
1763 csr &= ~CSR_PME;
1764 outb(csr, EWRK3_CSR);
1765 spin_unlock_irqrestore(&lp->hw_lock, flags);
1766 } else {
1767 status = -EPERM;
1768 }
1769
1770 break;
1771 case EWRK3_GET_MCA: /* Get the multicast address table */
1772 spin_lock_irqsave(&lp->hw_lock, flags);
1773 if (lp->shmem_length == IO_ONLY) {
1774 outb(0, EWRK3_IOPR);
1775 outw(PAGE0_HTE, EWRK3_PIR1);
1776 for (i = 0; i < (HASH_TABLE_LEN >> 3); i++) {
1777 tmp->addr[i] = inb(EWRK3_DATA);
1778 }
1779 } else {
1780 outb(0, EWRK3_MPR);
1781 memcpy_fromio(tmp->addr, lp->shmem + PAGE0_HTE, (HASH_TABLE_LEN >> 3));
1782 }
1783 spin_unlock_irqrestore(&lp->hw_lock, flags);
1784
1785 ioc->len = (HASH_TABLE_LEN >> 3);
1786 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1787 status = -EFAULT;
1788
1789 break;
1790 case EWRK3_SET_MCA: /* Set a multicast address */
1791 if (capable(CAP_NET_ADMIN)) {
1792 if (ioc->len > 1024)
1793 {
1794 status = -EINVAL;
1795 break;
1796 }
1797 if (copy_from_user(tmp->addr, ioc->data, ETH_ALEN * ioc->len)) {
1798 status = -EFAULT;
1799 break;
1800 }
1801 set_multicast_list(dev);
1802 } else {
1803 status = -EPERM;
1804 }
1805
1806 break;
1807 case EWRK3_CLR_MCA: /* Clear all multicast addresses */
1808 if (capable(CAP_NET_ADMIN)) {
1809 set_multicast_list(dev);
1810 } else {
1811 status = -EPERM;
1812 }
1813
1814 break;
1815 case EWRK3_MCA_EN: /* Enable multicast addressing */
1816 if (capable(CAP_NET_ADMIN)) {
1817 spin_lock_irqsave(&lp->hw_lock, flags);
1818 csr = inb(EWRK3_CSR);
1819 csr |= CSR_MCE;
1820 csr &= ~CSR_PME;
1821 outb(csr, EWRK3_CSR);
1822 spin_unlock_irqrestore(&lp->hw_lock, flags);
1823 } else {
1824 status = -EPERM;
1825 }
1826
1827 break;
1828 case EWRK3_GET_STATS: { /* Get the driver statistics */
1829 struct ewrk3_stats *tmp_stats =
1830 kmalloc(sizeof(lp->pktStats), GFP_KERNEL);
1831 if (!tmp_stats) {
1832 status = -ENOMEM;
1833 break;
1834 }
1835
1836 spin_lock_irqsave(&lp->hw_lock, flags);
1837 memcpy(tmp_stats, &lp->pktStats, sizeof(lp->pktStats));
1838 spin_unlock_irqrestore(&lp->hw_lock, flags);
1839
1840 ioc->len = sizeof(lp->pktStats);
1841 if (copy_to_user(ioc->data, tmp_stats, sizeof(lp->pktStats)))
1842 status = -EFAULT;
1843 kfree(tmp_stats);
1844 break;
1845 }
1846 case EWRK3_CLR_STATS: /* Zero out the driver statistics */
1847 if (capable(CAP_NET_ADMIN)) {
1848 spin_lock_irqsave(&lp->hw_lock, flags);
1849 memset(&lp->pktStats, 0, sizeof(lp->pktStats));
1850 spin_unlock_irqrestore(&lp->hw_lock,flags);
1851 } else {
1852 status = -EPERM;
1853 }
1854
1855 break;
1856 case EWRK3_GET_CSR: /* Get the CSR Register contents */
1857 tmp->addr[0] = inb(EWRK3_CSR);
1858 ioc->len = 1;
1859 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1860 status = -EFAULT;
1861 break;
1862 case EWRK3_SET_CSR: /* Set the CSR Register contents */
1863 if (capable(CAP_NET_ADMIN)) {
1864 if (copy_from_user(tmp->addr, ioc->data, 1)) {
1865 status = -EFAULT;
1866 break;
1867 }
1868 outb(tmp->addr[0], EWRK3_CSR);
1869 } else {
1870 status = -EPERM;
1871 }
1872
1873 break;
1874 case EWRK3_GET_EEPROM: /* Get the EEPROM contents */
1875 if (capable(CAP_NET_ADMIN)) {
1876 for (i = 0; i < (EEPROM_MAX >> 1); i++) {
1877 tmp->val[i] = (short) Read_EEPROM(iobase, i);
1878 }
1879 i = EEPROM_MAX;
1880 tmp->addr[i++] = inb(EWRK3_CMR); /* Config/Management Reg. */
1881 for (j = 0; j < ETH_ALEN; j++) {
1882 tmp->addr[i++] = inb(EWRK3_PAR0 + j);
1883 }
1884 ioc->len = EEPROM_MAX + 1 + ETH_ALEN;
1885 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1886 status = -EFAULT;
1887 } else {
1888 status = -EPERM;
1889 }
1890
1891 break;
1892 case EWRK3_SET_EEPROM: /* Set the EEPROM contents */
1893 if (capable(CAP_NET_ADMIN)) {
1894 if (copy_from_user(tmp->addr, ioc->data, EEPROM_MAX)) {
1895 status = -EFAULT;
1896 break;
1897 }
1898 for (i = 0; i < (EEPROM_MAX >> 1); i++) {
1899 Write_EEPROM(tmp->val[i], iobase, i);
1900 }
1901 } else {
1902 status = -EPERM;
1903 }
1904
1905 break;
1906 case EWRK3_GET_CMR: /* Get the CMR Register contents */
1907 tmp->addr[0] = inb(EWRK3_CMR);
1908 ioc->len = 1;
1909 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1910 status = -EFAULT;
1911 break;
1912 case EWRK3_SET_TX_CUT_THRU: /* Set TX cut through mode */
1913 if (capable(CAP_NET_ADMIN)) {
1914 lp->txc = 1;
1915 } else {
1916 status = -EPERM;
1917 }
1918
1919 break;
1920 case EWRK3_CLR_TX_CUT_THRU: /* Clear TX cut through mode */
1921 if (capable(CAP_NET_ADMIN)) {
1922 lp->txc = 0;
1923 } else {
1924 status = -EPERM;
1925 }
1926
1927 break;
1928 default:
1929 status = -EOPNOTSUPP;
1930 }
1931 kfree(tmp);
1932 return status;
1933 }
1934
1935 #ifdef MODULE
1936 static struct net_device *ewrk3_devs[MAX_NUM_EWRK3S];
1937 static int ndevs;
1938 static int io[MAX_NUM_EWRK3S+1] = { 0x300, 0, };
1939
1940 /* '21' below should really be 'MAX_NUM_EWRK3S' */
1941 module_param_array(io, int, NULL, 0);
1942 module_param_array(irq, int, NULL, 0);
1943 MODULE_PARM_DESC(io, "EtherWORKS 3 I/O base address(es)");
1944 MODULE_PARM_DESC(irq, "EtherWORKS 3 IRQ number(s)");
1945
1946 static __exit void ewrk3_exit_module(void)
1947 {
1948 int i;
1949
1950 for( i=0; i<ndevs; i++ ) {
1951 struct net_device *dev = ewrk3_devs[i];
1952 struct ewrk3_private *lp = netdev_priv(dev);
1953 ewrk3_devs[i] = NULL;
1954 unregister_netdev(dev);
1955 release_region(dev->base_addr, EWRK3_TOTAL_SIZE);
1956 iounmap(lp->shmem);
1957 free_netdev(dev);
1958 }
1959 }
1960
1961 static __init int ewrk3_init_module(void)
1962 {
1963 int i=0;
1964
1965 while( io[i] && irq[i] ) {
1966 struct net_device *dev
1967 = alloc_etherdev(sizeof(struct ewrk3_private));
1968
1969 if (!dev)
1970 break;
1971
1972 if (ewrk3_probe1(dev, io[i], irq[i]) != 0) {
1973 free_netdev(dev);
1974 break;
1975 }
1976
1977 ewrk3_devs[ndevs++] = dev;
1978 i++;
1979 }
1980
1981 return ndevs ? 0 : -EIO;
1982 }
1983
1984
1985 /* Hack for breakage in new module stuff */
1986 module_exit(ewrk3_exit_module);
1987 module_init(ewrk3_init_module);
1988 #endif /* MODULE */
1989 MODULE_LICENSE("GPL");
1990
1991
1992
1993 /*
1994 * Local variables:
1995 * compile-command: "gcc -D__KERNEL__ -I/linux/include -Wall -Wstrict-prototypes -fomit-frame-pointer -fno-strength-reduce -malign-loops=2 -malign-jumps=2 -malign-functions=2 -O2 -m486 -c ewrk3.c"
1996 *
1997 * compile-command: "gcc -D__KERNEL__ -DMODULE -I/linux/include -Wall -Wstrict-prototypes -fomit-frame-pointer -fno-strength-reduce -malign-loops=2 -malign-jumps=2 -malign-functions=2 -O2 -m486 -c ewrk3.c"
1998 * End:
1999 */
WRT350N Kernel Patches