sched: clean up overlong line in kernel/sched_debug.c
[wrt350n-kernel.git] / include / asm-m68k / amipcmcia.h
blob6f1ec1887d82c3d5f66713ec15ddf363e8410cc0
1 /*
2 ** asm-m68k/pcmcia.h -- Amiga Linux PCMCIA Definitions
3 **
4 ** Copyright 1997 by Alain Malek
5 **
6 ** This file is subject to the terms and conditions of the GNU General Public
7 ** License. See the file COPYING in the main directory of this archive
8 ** for more details.
9 **
10 ** Created: 12/10/97 by Alain Malek
13 #ifndef __AMIGA_PCMCIA_H__
14 #define __AMIGA_PCMCIA_H__
16 #include <asm/amigayle.h>
18 /* prototypes */
20 void pcmcia_reset(void);
21 int pcmcia_copy_tuple(unsigned char tuple_id, void *tuple, int max_len);
22 void pcmcia_program_voltage(int voltage);
23 void pcmcia_access_speed(int speed);
24 void pcmcia_write_enable(void);
25 void pcmcia_write_disable(void);
27 static inline u_char pcmcia_read_status(void)
29 return (gayle.cardstatus & 0x7c);
32 static inline u_char pcmcia_get_intreq(void)
34 return (gayle.intreq);
37 static inline void pcmcia_ack_int(u_char intreq)
39 gayle.intreq = 0xf8;
42 static inline void pcmcia_enable_irq(void)
44 gayle.inten |= GAYLE_IRQ_IRQ;
47 static inline void pcmcia_disable_irq(void)
49 gayle.inten &= ~GAYLE_IRQ_IRQ;
52 #define PCMCIA_INSERTED (gayle.cardstatus & GAYLE_CS_CCDET)
54 /* valid voltages for pcmcia_ProgramVoltage */
56 #define PCMCIA_0V 0
57 #define PCMCIA_5V 5
58 #define PCMCIA_12V 12
60 /* valid speeds for pcmcia_AccessSpeed */
62 #define PCMCIA_SPEED_100NS 100
63 #define PCMCIA_SPEED_150NS 150
64 #define PCMCIA_SPEED_250NS 250
65 #define PCMCIA_SPEED_720NS 720
67 /* PCMCIA Tuple codes */
69 #define CISTPL_NULL 0x00
70 #define CISTPL_DEVICE 0x01
71 #define CISTPL_LONGLINK_CB 0x02
72 #define CISTPL_CONFIG_CB 0x04
73 #define CISTPL_CFTABLE_ENTRY_CB 0x05
74 #define CISTPL_LONGLINK_MFC 0x06
75 #define CISTPL_BAR 0x07
76 #define CISTPL_CHECKSUM 0x10
77 #define CISTPL_LONGLINK_A 0x11
78 #define CISTPL_LONGLINK_C 0x12
79 #define CISTPL_LINKTARGET 0x13
80 #define CISTPL_NO_LINK 0x14
81 #define CISTPL_VERS_1 0x15
82 #define CISTPL_ALTSTR 0x16
83 #define CISTPL_DEVICE_A 0x17
84 #define CISTPL_JEDEC_C 0x18
85 #define CISTPL_JEDEC_A 0x19
86 #define CISTPL_CONFIG 0x1a
87 #define CISTPL_CFTABLE_ENTRY 0x1b
88 #define CISTPL_DEVICE_OC 0x1c
89 #define CISTPL_DEVICE_OA 0x1d
90 #define CISTPL_DEVICE_GEO 0x1e
91 #define CISTPL_DEVICE_GEO_A 0x1f
92 #define CISTPL_MANFID 0x20
93 #define CISTPL_FUNCID 0x21
94 #define CISTPL_FUNCE 0x22
95 #define CISTPL_SWIL 0x23
96 #define CISTPL_END 0xff
98 /* FUNCID */
100 #define CISTPL_FUNCID_MULTI 0x00
101 #define CISTPL_FUNCID_MEMORY 0x01
102 #define CISTPL_FUNCID_SERIAL 0x02
103 #define CISTPL_FUNCID_PARALLEL 0x03
104 #define CISTPL_FUNCID_FIXED 0x04
105 #define CISTPL_FUNCID_VIDEO 0x05
106 #define CISTPL_FUNCID_NETWORK 0x06
107 #define CISTPL_FUNCID_AIMS 0x07
108 #define CISTPL_FUNCID_SCSI 0x08
110 #endif