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Remove old i386 setup code
[wrt350n-kernel.git] / sound / isa / cs423x / cs4231_lib.c
blob914d77b61b0c042d865b22cb7b78fa09e44f3b20
1 /*
2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
3 * Routines for control of CS4231(A)/CS4232/InterWave & compatible chips
4 *
5 * Bugs:
6 * - sometimes record brokes playback with WSS portion of
7 * Yamaha OPL3-SA3 chip
8 * - CS4231 (GUS MAX) - still trouble with occasional noises
9 * - broken initialization?
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 */
26
27 #include <sound/driver.h>
28 #include <linux/delay.h>
29 #include <linux/pm.h>
30 #include <linux/init.h>
31 #include <linux/interrupt.h>
32 #include <linux/slab.h>
33 #include <linux/ioport.h>
34 #include <sound/core.h>
35 #include <sound/cs4231.h>
36 #include <sound/pcm_params.h>
37
38 #include <asm/io.h>
39 #include <asm/dma.h>
40 #include <asm/irq.h>
41
42 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
43 MODULE_DESCRIPTION("Routines for control of CS4231(A)/CS4232/InterWave & compatible chips");
44 MODULE_LICENSE("GPL");
45
46 #if 0
47 #define SNDRV_DEBUG_MCE
48 #endif
49
50 /*
51 * Some variables
52 */
53
54 static unsigned char freq_bits[14] = {
55 /* 5510 */ 0x00 | CS4231_XTAL2,
56 /* 6620 */ 0x0E | CS4231_XTAL2,
57 /* 8000 */ 0x00 | CS4231_XTAL1,
58 /* 9600 */ 0x0E | CS4231_XTAL1,
59 /* 11025 */ 0x02 | CS4231_XTAL2,
60 /* 16000 */ 0x02 | CS4231_XTAL1,
61 /* 18900 */ 0x04 | CS4231_XTAL2,
62 /* 22050 */ 0x06 | CS4231_XTAL2,
63 /* 27042 */ 0x04 | CS4231_XTAL1,
64 /* 32000 */ 0x06 | CS4231_XTAL1,
65 /* 33075 */ 0x0C | CS4231_XTAL2,
66 /* 37800 */ 0x08 | CS4231_XTAL2,
67 /* 44100 */ 0x0A | CS4231_XTAL2,
68 /* 48000 */ 0x0C | CS4231_XTAL1
69 };
70
71 static unsigned int rates[14] = {
72 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
73 27042, 32000, 33075, 37800, 44100, 48000
74 };
75
76 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
77 .count = 14,
78 .list = rates,
79 .mask = 0,
80 };
81
82 static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime)
83 {
84 return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
85 }
86
87 static unsigned char snd_cs4231_original_image[32] =
88 {
89 0x00, /* 00/00 - lic */
90 0x00, /* 01/01 - ric */
91 0x9f, /* 02/02 - la1ic */
92 0x9f, /* 03/03 - ra1ic */
93 0x9f, /* 04/04 - la2ic */
94 0x9f, /* 05/05 - ra2ic */
95 0xbf, /* 06/06 - loc */
96 0xbf, /* 07/07 - roc */
97 0x20, /* 08/08 - pdfr */
98 CS4231_AUTOCALIB, /* 09/09 - ic */
99 0x00, /* 0a/10 - pc */
100 0x00, /* 0b/11 - ti */
101 CS4231_MODE2, /* 0c/12 - mi */
102 0xfc, /* 0d/13 - lbc */
103 0x00, /* 0e/14 - pbru */
104 0x00, /* 0f/15 - pbrl */
105 0x80, /* 10/16 - afei */
106 0x01, /* 11/17 - afeii */
107 0x9f, /* 12/18 - llic */
108 0x9f, /* 13/19 - rlic */
109 0x00, /* 14/20 - tlb */
110 0x00, /* 15/21 - thb */
111 0x00, /* 16/22 - la3mic/reserved */
112 0x00, /* 17/23 - ra3mic/reserved */
113 0x00, /* 18/24 - afs */
114 0x00, /* 19/25 - lamoc/version */
115 0xcf, /* 1a/26 - mioc */
116 0x00, /* 1b/27 - ramoc/reserved */
117 0x20, /* 1c/28 - cdfr */
118 0x00, /* 1d/29 - res4 */
119 0x00, /* 1e/30 - cbru */
120 0x00, /* 1f/31 - cbrl */
121 };
122
123 /*
124 * Basic I/O functions
125 */
126
127 static inline void cs4231_outb(struct snd_cs4231 *chip, u8 offset, u8 val)
128 {
129 outb(val, chip->port + offset);
130 }
131
132 static inline u8 cs4231_inb(struct snd_cs4231 *chip, u8 offset)
133 {
134 return inb(chip->port + offset);
135 }
136
137 static void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg,
138 unsigned char mask, unsigned char value)
139 {
140 int timeout;
141 unsigned char tmp;
142
143 for (timeout = 250;
144 timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
145 timeout--)
146 udelay(100);
147 #ifdef CONFIG_SND_DEBUG
148 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
149 snd_printk("outm: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
150 #endif
151 if (chip->calibrate_mute) {
152 chip->image[reg] &= mask;
153 chip->image[reg] |= value;
154 } else {
155 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
156 mb();
157 tmp = (chip->image[reg] & mask) | value;
158 cs4231_outb(chip, CS4231P(REG), tmp);
159 chip->image[reg] = tmp;
160 mb();
161 }
162 }
163
164 static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg, unsigned char value)
165 {
166 int timeout;
167
168 for (timeout = 250;
169 timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
170 timeout--)
171 udelay(10);
172 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
173 cs4231_outb(chip, CS4231P(REG), value);
174 mb();
175 }
176
177 void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg, unsigned char value)
178 {
179 int timeout;
180
181 for (timeout = 250;
182 timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
183 timeout--)
184 udelay(100);
185 #ifdef CONFIG_SND_DEBUG
186 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
187 snd_printk("out: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
188 #endif
189 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
190 cs4231_outb(chip, CS4231P(REG), value);
191 chip->image[reg] = value;
192 mb();
193 #if 0
194 printk("codec out - reg 0x%x = 0x%x\n", chip->mce_bit | reg, value);
195 #endif
196 }
197
198 unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg)
199 {
200 int timeout;
201
202 for (timeout = 250;
203 timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
204 timeout--)
205 udelay(100);
206 #ifdef CONFIG_SND_DEBUG
207 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
208 snd_printk("in: auto calibration time out - reg = 0x%x\n", reg);
209 #endif
210 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
211 mb();
212 return cs4231_inb(chip, CS4231P(REG));
213 }
214
215 void snd_cs4236_ext_out(struct snd_cs4231 *chip, unsigned char reg, unsigned char val)
216 {
217 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
218 cs4231_outb(chip, CS4231P(REG), reg | (chip->image[CS4236_EXT_REG] & 0x01));
219 cs4231_outb(chip, CS4231P(REG), val);
220 chip->eimage[CS4236_REG(reg)] = val;
221 #if 0
222 printk("ext out : reg = 0x%x, val = 0x%x\n", reg, val);
223 #endif
224 }
225
226 unsigned char snd_cs4236_ext_in(struct snd_cs4231 *chip, unsigned char reg)
227 {
228 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
229 cs4231_outb(chip, CS4231P(REG), reg | (chip->image[CS4236_EXT_REG] & 0x01));
230 #if 1
231 return cs4231_inb(chip, CS4231P(REG));
232 #else
233 {
234 unsigned char res;
235 res = cs4231_inb(chip, CS4231P(REG));
236 printk("ext in : reg = 0x%x, val = 0x%x\n", reg, res);
237 return res;
238 }
239 #endif
240 }
241
242 #if 0
243
244 static void snd_cs4231_debug(struct snd_cs4231 *chip)
245 {
246 printk("CS4231 REGS: INDEX = 0x%02x ", cs4231_inb(chip, CS4231P(REGSEL)));
247 printk(" STATUS = 0x%02x\n", cs4231_inb(chip, CS4231P(STATUS)));
248 printk(" 0x00: left input = 0x%02x ", snd_cs4231_in(chip, 0x00));
249 printk(" 0x10: alt 1 (CFIG 2) = 0x%02x\n", snd_cs4231_in(chip, 0x10));
250 printk(" 0x01: right input = 0x%02x ", snd_cs4231_in(chip, 0x01));
251 printk(" 0x11: alt 2 (CFIG 3) = 0x%02x\n", snd_cs4231_in(chip, 0x11));
252 printk(" 0x02: GF1 left input = 0x%02x ", snd_cs4231_in(chip, 0x02));
253 printk(" 0x12: left line in = 0x%02x\n", snd_cs4231_in(chip, 0x12));
254 printk(" 0x03: GF1 right input = 0x%02x ", snd_cs4231_in(chip, 0x03));
255 printk(" 0x13: right line in = 0x%02x\n", snd_cs4231_in(chip, 0x13));
256 printk(" 0x04: CD left input = 0x%02x ", snd_cs4231_in(chip, 0x04));
257 printk(" 0x14: timer low = 0x%02x\n", snd_cs4231_in(chip, 0x14));
258 printk(" 0x05: CD right input = 0x%02x ", snd_cs4231_in(chip, 0x05));
259 printk(" 0x15: timer high = 0x%02x\n", snd_cs4231_in(chip, 0x15));
260 printk(" 0x06: left output = 0x%02x ", snd_cs4231_in(chip, 0x06));
261 printk(" 0x16: left MIC (PnP) = 0x%02x\n", snd_cs4231_in(chip, 0x16));
262 printk(" 0x07: right output = 0x%02x ", snd_cs4231_in(chip, 0x07));
263 printk(" 0x17: right MIC (PnP) = 0x%02x\n", snd_cs4231_in(chip, 0x17));
264 printk(" 0x08: playback format = 0x%02x ", snd_cs4231_in(chip, 0x08));
265 printk(" 0x18: IRQ status = 0x%02x\n", snd_cs4231_in(chip, 0x18));
266 printk(" 0x09: iface (CFIG 1) = 0x%02x ", snd_cs4231_in(chip, 0x09));
267 printk(" 0x19: left line out = 0x%02x\n", snd_cs4231_in(chip, 0x19));
268 printk(" 0x0a: pin control = 0x%02x ", snd_cs4231_in(chip, 0x0a));
269 printk(" 0x1a: mono control = 0x%02x\n", snd_cs4231_in(chip, 0x1a));
270 printk(" 0x0b: init & status = 0x%02x ", snd_cs4231_in(chip, 0x0b));
271 printk(" 0x1b: right line out = 0x%02x\n", snd_cs4231_in(chip, 0x1b));
272 printk(" 0x0c: revision & mode = 0x%02x ", snd_cs4231_in(chip, 0x0c));
273 printk(" 0x1c: record format = 0x%02x\n", snd_cs4231_in(chip, 0x1c));
274 printk(" 0x0d: loopback = 0x%02x ", snd_cs4231_in(chip, 0x0d));
275 printk(" 0x1d: var freq (PnP) = 0x%02x\n", snd_cs4231_in(chip, 0x1d));
276 printk(" 0x0e: ply upr count = 0x%02x ", snd_cs4231_in(chip, 0x0e));
277 printk(" 0x1e: ply lwr count = 0x%02x\n", snd_cs4231_in(chip, 0x1e));
278 printk(" 0x0f: rec upr count = 0x%02x ", snd_cs4231_in(chip, 0x0f));
279 printk(" 0x1f: rec lwr count = 0x%02x\n", snd_cs4231_in(chip, 0x1f));
280 }
281
282 #endif
283
284 /*
285 * CS4231 detection / MCE routines
286 */
287
288 static void snd_cs4231_busy_wait(struct snd_cs4231 *chip)
289 {
290 int timeout;
291
292 /* huh.. looks like this sequence is proper for CS4231A chip (GUS MAX) */
293 for (timeout = 5; timeout > 0; timeout--)
294 cs4231_inb(chip, CS4231P(REGSEL));
295 /* end of cleanup sequence */
296 for (timeout = 250;
297 timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
298 timeout--)
299 udelay(10);
300 }
301
302 void snd_cs4231_mce_up(struct snd_cs4231 *chip)
303 {
304 unsigned long flags;
305 int timeout;
306
307 for (timeout = 250; timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT); timeout--)
308 udelay(100);
309 #ifdef CONFIG_SND_DEBUG
310 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
311 snd_printk("mce_up - auto calibration time out (0)\n");
312 #endif
313 spin_lock_irqsave(&chip->reg_lock, flags);
314 chip->mce_bit |= CS4231_MCE;
315 timeout = cs4231_inb(chip, CS4231P(REGSEL));
316 if (timeout == 0x80)
317 snd_printk("mce_up [0x%lx]: serious init problem - codec still busy\n", chip->port);
318 if (!(timeout & CS4231_MCE))
319 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
320 spin_unlock_irqrestore(&chip->reg_lock, flags);
321 }
322
323 void snd_cs4231_mce_down(struct snd_cs4231 *chip)
324 {
325 unsigned long flags;
326 int timeout;
327
328 snd_cs4231_busy_wait(chip);
329 #if 0
330 printk("(1) timeout = %i\n", timeout);
331 #endif
332 #ifdef CONFIG_SND_DEBUG
333 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
334 snd_printk("mce_down [0x%lx] - auto calibration time out (0)\n", (long)CS4231P(REGSEL));
335 #endif
336 spin_lock_irqsave(&chip->reg_lock, flags);
337 chip->mce_bit &= ~CS4231_MCE;
338 timeout = cs4231_inb(chip, CS4231P(REGSEL));
339 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
340 spin_unlock_irqrestore(&chip->reg_lock, flags);
341 if (timeout == 0x80)
342 snd_printk("mce_down [0x%lx]: serious init problem - codec still busy\n", chip->port);
343 if ((timeout & CS4231_MCE) == 0 ||
344 !(chip->hardware & (CS4231_HW_CS4231_MASK | CS4231_HW_CS4232_MASK))) {
345 return;
346 }
347 snd_cs4231_busy_wait(chip);
348
349 /* calibration process */
350
351 for (timeout = 500; timeout > 0 && (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0; timeout--)
352 udelay(10);
353 if ((snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0) {
354 snd_printd("cs4231_mce_down - auto calibration time out (1)\n");
355 return;
356 }
357 #if 0
358 printk("(2) timeout = %i, jiffies = %li\n", timeout, jiffies);
359 #endif
360 /* in 10 ms increments, check condition, up to 250 ms */
361 timeout = 25;
362 while (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) {
363 if (--timeout < 0) {
364 snd_printk("mce_down - auto calibration time out (2)\n");
365 return;
366 }
367 msleep(10);
368 }
369 #if 0
370 printk("(3) jiffies = %li\n", jiffies);
371 #endif
372 /* in 10 ms increments, check condition, up to 100 ms */
373 timeout = 10;
374 while (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) {
375 if (--timeout < 0) {
376 snd_printk(KERN_ERR "mce_down - auto calibration time out (3)\n");
377 return;
378 }
379 msleep(10);
380 }
381 #if 0
382 printk("(4) jiffies = %li\n", jiffies);
383 snd_printk("mce_down - exit = 0x%x\n", cs4231_inb(chip, CS4231P(REGSEL)));
384 #endif
385 }
386
387 static unsigned int snd_cs4231_get_count(unsigned char format, unsigned int size)
388 {
389 switch (format & 0xe0) {
390 case CS4231_LINEAR_16:
391 case CS4231_LINEAR_16_BIG:
392 size >>= 1;
393 break;
394 case CS4231_ADPCM_16:
395 return size >> 2;
396 }
397 if (format & CS4231_STEREO)
398 size >>= 1;
399 return size;
400 }
401
402 static int snd_cs4231_trigger(struct snd_pcm_substream *substream,
403 int cmd)
404 {
405 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
406 int result = 0;
407 unsigned int what;
408 struct snd_pcm_substream *s;
409 int do_start;
410
411 #if 0
412 printk("codec trigger!!! - what = %i, enable = %i, status = 0x%x\n", what, enable, cs4231_inb(chip, CS4231P(STATUS)));
413 #endif
414
415 switch (cmd) {
416 case SNDRV_PCM_TRIGGER_START:
417 case SNDRV_PCM_TRIGGER_RESUME:
418 do_start = 1; break;
419 case SNDRV_PCM_TRIGGER_STOP:
420 case SNDRV_PCM_TRIGGER_SUSPEND:
421 do_start = 0; break;
422 default:
423 return -EINVAL;
424 }
425
426 what = 0;
427 snd_pcm_group_for_each_entry(s, substream) {
428 if (s == chip->playback_substream) {
429 what |= CS4231_PLAYBACK_ENABLE;
430 snd_pcm_trigger_done(s, substream);
431 } else if (s == chip->capture_substream) {
432 what |= CS4231_RECORD_ENABLE;
433 snd_pcm_trigger_done(s, substream);
434 }
435 }
436 spin_lock(&chip->reg_lock);
437 if (do_start) {
438 chip->image[CS4231_IFACE_CTRL] |= what;
439 if (chip->trigger)
440 chip->trigger(chip, what, 1);
441 } else {
442 chip->image[CS4231_IFACE_CTRL] &= ~what;
443 if (chip->trigger)
444 chip->trigger(chip, what, 0);
445 }
446 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
447 spin_unlock(&chip->reg_lock);
448 #if 0
449 snd_cs4231_debug(chip);
450 #endif
451 return result;
452 }
453
454 /*
455 * CODEC I/O
456 */
457
458 static unsigned char snd_cs4231_get_rate(unsigned int rate)
459 {
460 int i;
461
462 for (i = 0; i < 14; i++)
463 if (rate == rates[i])
464 return freq_bits[i];
465 // snd_BUG();
466 return freq_bits[13];
467 }
468
469 static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip,
470 int format,
471 int channels)
472 {
473 unsigned char rformat;
474
475 rformat = CS4231_LINEAR_8;
476 switch (format) {
477 case SNDRV_PCM_FORMAT_MU_LAW: rformat = CS4231_ULAW_8; break;
478 case SNDRV_PCM_FORMAT_A_LAW: rformat = CS4231_ALAW_8; break;
479 case SNDRV_PCM_FORMAT_S16_LE: rformat = CS4231_LINEAR_16; break;
480 case SNDRV_PCM_FORMAT_S16_BE: rformat = CS4231_LINEAR_16_BIG; break;
481 case SNDRV_PCM_FORMAT_IMA_ADPCM: rformat = CS4231_ADPCM_16; break;
482 }
483 if (channels > 1)
484 rformat |= CS4231_STEREO;
485 #if 0
486 snd_printk("get_format: 0x%x (mode=0x%x)\n", format, mode);
487 #endif
488 return rformat;
489 }
490
491 static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute)
492 {
493 unsigned long flags;
494
495 mute = mute ? 1 : 0;
496 spin_lock_irqsave(&chip->reg_lock, flags);
497 if (chip->calibrate_mute == mute) {
498 spin_unlock_irqrestore(&chip->reg_lock, flags);
499 return;
500 }
501 if (!mute) {
502 snd_cs4231_dout(chip, CS4231_LEFT_INPUT, chip->image[CS4231_LEFT_INPUT]);
503 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT, chip->image[CS4231_RIGHT_INPUT]);
504 snd_cs4231_dout(chip, CS4231_LOOPBACK, chip->image[CS4231_LOOPBACK]);
505 }
506 snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
507 snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
508 snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
509 snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
510 snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT, mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
511 snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT, mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
512 snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN, mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
513 snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN, mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
514 snd_cs4231_dout(chip, CS4231_MONO_CTRL, mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
515 if (chip->hardware == CS4231_HW_INTERWAVE) {
516 snd_cs4231_dout(chip, CS4231_LEFT_MIC_INPUT, mute ? 0x80 : chip->image[CS4231_LEFT_MIC_INPUT]);
517 snd_cs4231_dout(chip, CS4231_RIGHT_MIC_INPUT, mute ? 0x80 : chip->image[CS4231_RIGHT_MIC_INPUT]);
518 snd_cs4231_dout(chip, CS4231_LINE_LEFT_OUTPUT, mute ? 0x80 : chip->image[CS4231_LINE_LEFT_OUTPUT]);
519 snd_cs4231_dout(chip, CS4231_LINE_RIGHT_OUTPUT, mute ? 0x80 : chip->image[CS4231_LINE_RIGHT_OUTPUT]);
520 }
521 chip->calibrate_mute = mute;
522 spin_unlock_irqrestore(&chip->reg_lock, flags);
523 }
524
525 static void snd_cs4231_playback_format(struct snd_cs4231 *chip,
526 struct snd_pcm_hw_params *params,
527 unsigned char pdfr)
528 {
529 unsigned long flags;
530 int full_calib = 1;
531
532 mutex_lock(&chip->mce_mutex);
533 snd_cs4231_calibrate_mute(chip, 1);
534 if (chip->hardware == CS4231_HW_CS4231A ||
535 (chip->hardware & CS4231_HW_CS4232_MASK)) {
536 spin_lock_irqsave(&chip->reg_lock, flags);
537 if ((chip->image[CS4231_PLAYBK_FORMAT] & 0x0f) == (pdfr & 0x0f)) { /* rate is same? */
538 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] | 0x10);
539 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT] = pdfr);
540 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] &= ~0x10);
541 udelay(100); /* Fixes audible clicks at least on GUS MAX */
542 full_calib = 0;
543 }
544 spin_unlock_irqrestore(&chip->reg_lock, flags);
545 }
546 if (full_calib) {
547 snd_cs4231_mce_up(chip);
548 spin_lock_irqsave(&chip->reg_lock, flags);
549 if (chip->hardware != CS4231_HW_INTERWAVE && !chip->single_dma) {
550 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
551 (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
552 (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
553 pdfr);
554 } else {
555 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT] = pdfr);
556 }
557 spin_unlock_irqrestore(&chip->reg_lock, flags);
558 snd_cs4231_mce_down(chip);
559 }
560 snd_cs4231_calibrate_mute(chip, 0);
561 mutex_unlock(&chip->mce_mutex);
562 }
563
564 static void snd_cs4231_capture_format(struct snd_cs4231 *chip,
565 struct snd_pcm_hw_params *params,
566 unsigned char cdfr)
567 {
568 unsigned long flags;
569 int full_calib = 1;
570
571 mutex_lock(&chip->mce_mutex);
572 snd_cs4231_calibrate_mute(chip, 1);
573 if (chip->hardware == CS4231_HW_CS4231A ||
574 (chip->hardware & CS4231_HW_CS4232_MASK)) {
575 spin_lock_irqsave(&chip->reg_lock, flags);
576 if ((chip->image[CS4231_PLAYBK_FORMAT] & 0x0f) == (cdfr & 0x0f) || /* rate is same? */
577 (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
578 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] | 0x20);
579 snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT] = cdfr);
580 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] &= ~0x20);
581 full_calib = 0;
582 }
583 spin_unlock_irqrestore(&chip->reg_lock, flags);
584 }
585 if (full_calib) {
586 snd_cs4231_mce_up(chip);
587 spin_lock_irqsave(&chip->reg_lock, flags);
588 if (chip->hardware != CS4231_HW_INTERWAVE) {
589 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
590 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
591 ((chip->single_dma ? cdfr : chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
592 (cdfr & 0x0f));
593 spin_unlock_irqrestore(&chip->reg_lock, flags);
594 snd_cs4231_mce_down(chip);
595 snd_cs4231_mce_up(chip);
596 spin_lock_irqsave(&chip->reg_lock, flags);
597 }
598 }
599 snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
600 spin_unlock_irqrestore(&chip->reg_lock, flags);
601 snd_cs4231_mce_down(chip);
602 }
603 snd_cs4231_calibrate_mute(chip, 0);
604 mutex_unlock(&chip->mce_mutex);
605 }
606
607 /*
608 * Timer interface
609 */
610
611 static unsigned long snd_cs4231_timer_resolution(struct snd_timer * timer)
612 {
613 struct snd_cs4231 *chip = snd_timer_chip(timer);
614 if (chip->hardware & CS4231_HW_CS4236B_MASK)
615 return 14467;
616 else
617 return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
618 }
619
620 static int snd_cs4231_timer_start(struct snd_timer * timer)
621 {
622 unsigned long flags;
623 unsigned int ticks;
624 struct snd_cs4231 *chip = snd_timer_chip(timer);
625 spin_lock_irqsave(&chip->reg_lock, flags);
626 ticks = timer->sticks;
627 if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
628 (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
629 (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
630 snd_cs4231_out(chip, CS4231_TIMER_HIGH, chip->image[CS4231_TIMER_HIGH] = (unsigned char) (ticks >> 8));
631 snd_cs4231_out(chip, CS4231_TIMER_LOW, chip->image[CS4231_TIMER_LOW] = (unsigned char) ticks);
632 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] | CS4231_TIMER_ENABLE);
633 }
634 spin_unlock_irqrestore(&chip->reg_lock, flags);
635 return 0;
636 }
637
638 static int snd_cs4231_timer_stop(struct snd_timer * timer)
639 {
640 unsigned long flags;
641 struct snd_cs4231 *chip = snd_timer_chip(timer);
642 spin_lock_irqsave(&chip->reg_lock, flags);
643 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE);
644 spin_unlock_irqrestore(&chip->reg_lock, flags);
645 return 0;
646 }
647
648 static void snd_cs4231_init(struct snd_cs4231 *chip)
649 {
650 unsigned long flags;
651
652 snd_cs4231_mce_down(chip);
653
654 #ifdef SNDRV_DEBUG_MCE
655 snd_printk("init: (1)\n");
656 #endif
657 snd_cs4231_mce_up(chip);
658 spin_lock_irqsave(&chip->reg_lock, flags);
659 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
660 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO |
661 CS4231_CALIB_MODE);
662 chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
663 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
664 spin_unlock_irqrestore(&chip->reg_lock, flags);
665 snd_cs4231_mce_down(chip);
666
667 #ifdef SNDRV_DEBUG_MCE
668 snd_printk("init: (2)\n");
669 #endif
670
671 snd_cs4231_mce_up(chip);
672 spin_lock_irqsave(&chip->reg_lock, flags);
673 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1]);
674 spin_unlock_irqrestore(&chip->reg_lock, flags);
675 snd_cs4231_mce_down(chip);
676
677 #ifdef SNDRV_DEBUG_MCE
678 snd_printk("init: (3) - afei = 0x%x\n", chip->image[CS4231_ALT_FEATURE_1]);
679 #endif
680
681 spin_lock_irqsave(&chip->reg_lock, flags);
682 snd_cs4231_out(chip, CS4231_ALT_FEATURE_2, chip->image[CS4231_ALT_FEATURE_2]);
683 spin_unlock_irqrestore(&chip->reg_lock, flags);
684
685 snd_cs4231_mce_up(chip);
686 spin_lock_irqsave(&chip->reg_lock, flags);
687 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT]);
688 spin_unlock_irqrestore(&chip->reg_lock, flags);
689 snd_cs4231_mce_down(chip);
690
691 #ifdef SNDRV_DEBUG_MCE
692 snd_printk("init: (4)\n");
693 #endif
694
695 snd_cs4231_mce_up(chip);
696 spin_lock_irqsave(&chip->reg_lock, flags);
697 snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
698 spin_unlock_irqrestore(&chip->reg_lock, flags);
699 snd_cs4231_mce_down(chip);
700
701 #ifdef SNDRV_DEBUG_MCE
702 snd_printk("init: (5)\n");
703 #endif
704 }
705
706 static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode)
707 {
708 unsigned long flags;
709
710 mutex_lock(&chip->open_mutex);
711 if ((chip->mode & mode) ||
712 ((chip->mode & CS4231_MODE_OPEN) && chip->single_dma)) {
713 mutex_unlock(&chip->open_mutex);
714 return -EAGAIN;
715 }
716 if (chip->mode & CS4231_MODE_OPEN) {
717 chip->mode |= mode;
718 mutex_unlock(&chip->open_mutex);
719 return 0;
720 }
721 /* ok. now enable and ack CODEC IRQ */
722 spin_lock_irqsave(&chip->reg_lock, flags);
723 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
724 CS4231_RECORD_IRQ |
725 CS4231_TIMER_IRQ);
726 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
727 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
728 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
729 chip->image[CS4231_PIN_CTRL] |= CS4231_IRQ_ENABLE;
730 snd_cs4231_out(chip, CS4231_PIN_CTRL, chip->image[CS4231_PIN_CTRL]);
731 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
732 CS4231_RECORD_IRQ |
733 CS4231_TIMER_IRQ);
734 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
735 spin_unlock_irqrestore(&chip->reg_lock, flags);
736
737 chip->mode = mode;
738 mutex_unlock(&chip->open_mutex);
739 return 0;
740 }
741
742 static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode)
743 {
744 unsigned long flags;
745
746 mutex_lock(&chip->open_mutex);
747 chip->mode &= ~mode;
748 if (chip->mode & CS4231_MODE_OPEN) {
749 mutex_unlock(&chip->open_mutex);
750 return;
751 }
752 snd_cs4231_calibrate_mute(chip, 1);
753
754 /* disable IRQ */
755 spin_lock_irqsave(&chip->reg_lock, flags);
756 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
757 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
758 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
759 chip->image[CS4231_PIN_CTRL] &= ~CS4231_IRQ_ENABLE;
760 snd_cs4231_out(chip, CS4231_PIN_CTRL, chip->image[CS4231_PIN_CTRL]);
761
762 /* now disable record & playback */
763
764 if (chip->image[CS4231_IFACE_CTRL] & (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
765 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
766 spin_unlock_irqrestore(&chip->reg_lock, flags);
767 snd_cs4231_mce_up(chip);
768 spin_lock_irqsave(&chip->reg_lock, flags);
769 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
770 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
771 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
772 spin_unlock_irqrestore(&chip->reg_lock, flags);
773 snd_cs4231_mce_down(chip);
774 spin_lock_irqsave(&chip->reg_lock, flags);
775 }
776
777 /* clear IRQ again */
778 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
779 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
780 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
781 spin_unlock_irqrestore(&chip->reg_lock, flags);
782
783 snd_cs4231_calibrate_mute(chip, 0);
784
785 chip->mode = 0;
786 mutex_unlock(&chip->open_mutex);
787 }
788
789 /*
790 * timer open/close
791 */
792
793 static int snd_cs4231_timer_open(struct snd_timer * timer)
794 {
795 struct snd_cs4231 *chip = snd_timer_chip(timer);
796 snd_cs4231_open(chip, CS4231_MODE_TIMER);
797 return 0;
798 }
799
800 static int snd_cs4231_timer_close(struct snd_timer * timer)
801 {
802 struct snd_cs4231 *chip = snd_timer_chip(timer);
803 snd_cs4231_close(chip, CS4231_MODE_TIMER);
804 return 0;
805 }
806
807 static struct snd_timer_hardware snd_cs4231_timer_table =
808 {
809 .flags = SNDRV_TIMER_HW_AUTO,
810 .resolution = 9945,
811 .ticks = 65535,
812 .open = snd_cs4231_timer_open,
813 .close = snd_cs4231_timer_close,
814 .c_resolution = snd_cs4231_timer_resolution,
815 .start = snd_cs4231_timer_start,
816 .stop = snd_cs4231_timer_stop,
817 };
818
819 /*
820 * ok.. exported functions..
821 */
822
823 static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream,
824 struct snd_pcm_hw_params *hw_params)
825 {
826 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
827 unsigned char new_pdfr;
828 int err;
829
830 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
831 return err;
832 new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params), params_channels(hw_params)) |
833 snd_cs4231_get_rate(params_rate(hw_params));
834 chip->set_playback_format(chip, hw_params, new_pdfr);
835 return 0;
836 }
837
838 static int snd_cs4231_playback_hw_free(struct snd_pcm_substream *substream)
839 {
840 return snd_pcm_lib_free_pages(substream);
841 }
842
843 static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream)
844 {
845 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
846 struct snd_pcm_runtime *runtime = substream->runtime;
847 unsigned long flags;
848 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
849 unsigned int count = snd_pcm_lib_period_bytes(substream);
850
851 spin_lock_irqsave(&chip->reg_lock, flags);
852 chip->p_dma_size = size;
853 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO);
854 snd_dma_program(chip->dma1, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
855 count = snd_cs4231_get_count(chip->image[CS4231_PLAYBK_FORMAT], count) - 1;
856 snd_cs4231_out(chip, CS4231_PLY_LWR_CNT, (unsigned char) count);
857 snd_cs4231_out(chip, CS4231_PLY_UPR_CNT, (unsigned char) (count >> 8));
858 spin_unlock_irqrestore(&chip->reg_lock, flags);
859 #if 0
860 snd_cs4231_debug(chip);
861 #endif
862 return 0;
863 }
864
865 static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream,
866 struct snd_pcm_hw_params *hw_params)
867 {
868 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
869 unsigned char new_cdfr;
870 int err;
871
872 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
873 return err;
874 new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params), params_channels(hw_params)) |
875 snd_cs4231_get_rate(params_rate(hw_params));
876 chip->set_capture_format(chip, hw_params, new_cdfr);
877 return 0;
878 }
879
880 static int snd_cs4231_capture_hw_free(struct snd_pcm_substream *substream)
881 {
882 return snd_pcm_lib_free_pages(substream);
883 }
884
885 static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream)
886 {
887 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
888 struct snd_pcm_runtime *runtime = substream->runtime;
889 unsigned long flags;
890 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
891 unsigned int count = snd_pcm_lib_period_bytes(substream);
892
893 spin_lock_irqsave(&chip->reg_lock, flags);
894 chip->c_dma_size = size;
895 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
896 snd_dma_program(chip->dma2, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
897 count = snd_cs4231_get_count(chip->image[CS4231_REC_FORMAT], count) - 1;
898 if (chip->single_dma && chip->hardware != CS4231_HW_INTERWAVE) {
899 snd_cs4231_out(chip, CS4231_PLY_LWR_CNT, (unsigned char) count);
900 snd_cs4231_out(chip, CS4231_PLY_UPR_CNT, (unsigned char) (count >> 8));
901 } else {
902 snd_cs4231_out(chip, CS4231_REC_LWR_CNT, (unsigned char) count);
903 snd_cs4231_out(chip, CS4231_REC_UPR_CNT, (unsigned char) (count >> 8));
904 }
905 spin_unlock_irqrestore(&chip->reg_lock, flags);
906 return 0;
907 }
908
909 static void snd_cs4231_overrange(struct snd_cs4231 *chip)
910 {
911 unsigned long flags;
912 unsigned char res;
913
914 spin_lock_irqsave(&chip->reg_lock, flags);
915 res = snd_cs4231_in(chip, CS4231_TEST_INIT);
916 spin_unlock_irqrestore(&chip->reg_lock, flags);
917 if (res & (0x08 | 0x02)) /* detect overrange only above 0dB; may be user selectable? */
918 chip->capture_substream->runtime->overrange++;
919 }
920
921 irqreturn_t snd_cs4231_interrupt(int irq, void *dev_id)
922 {
923 struct snd_cs4231 *chip = dev_id;
924 unsigned char status;
925
926 status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
927 if (status & CS4231_TIMER_IRQ) {
928 if (chip->timer)
929 snd_timer_interrupt(chip->timer, chip->timer->sticks);
930 }
931 if (chip->single_dma && chip->hardware != CS4231_HW_INTERWAVE) {
932 if (status & CS4231_PLAYBACK_IRQ) {
933 if (chip->mode & CS4231_MODE_PLAY) {
934 if (chip->playback_substream)
935 snd_pcm_period_elapsed(chip->playback_substream);
936 }
937 if (chip->mode & CS4231_MODE_RECORD) {
938 if (chip->capture_substream) {
939 snd_cs4231_overrange(chip);
940 snd_pcm_period_elapsed(chip->capture_substream);
941 }
942 }
943 }
944 } else {
945 if (status & CS4231_PLAYBACK_IRQ) {
946 if (chip->playback_substream)
947 snd_pcm_period_elapsed(chip->playback_substream);
948 }
949 if (status & CS4231_RECORD_IRQ) {
950 if (chip->capture_substream) {
951 snd_cs4231_overrange(chip);
952 snd_pcm_period_elapsed(chip->capture_substream);
953 }
954 }
955 }
956
957 spin_lock(&chip->reg_lock);
958 snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
959 spin_unlock(&chip->reg_lock);
960 return IRQ_HANDLED;
961 }
962
963 static snd_pcm_uframes_t snd_cs4231_playback_pointer(struct snd_pcm_substream *substream)
964 {
965 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
966 size_t ptr;
967
968 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
969 return 0;
970 ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size);
971 return bytes_to_frames(substream->runtime, ptr);
972 }
973
974 static snd_pcm_uframes_t snd_cs4231_capture_pointer(struct snd_pcm_substream *substream)
975 {
976 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
977 size_t ptr;
978
979 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
980 return 0;
981 ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size);
982 return bytes_to_frames(substream->runtime, ptr);
983 }
984
985 /*
986
987 */
988
989 static int snd_cs4231_probe(struct snd_cs4231 *chip)
990 {
991 unsigned long flags;
992 int i, id, rev;
993 unsigned char *ptr;
994 unsigned int hw;
995
996 #if 0
997 snd_cs4231_debug(chip);
998 #endif
999 id = 0;
1000 for (i = 0; i < 50; i++) {
1001 mb();
1002 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
1003 udelay(2000);
1004 else {
1005 spin_lock_irqsave(&chip->reg_lock, flags);
1006 snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1007 id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
1008 spin_unlock_irqrestore(&chip->reg_lock, flags);
1009 if (id == 0x0a)
1010 break; /* this is valid value */
1011 }
1012 }
1013 snd_printdd("cs4231: port = 0x%lx, id = 0x%x\n", chip->port, id);
1014 if (id != 0x0a)
1015 return -ENODEV; /* no valid device found */
1016
1017 if (((hw = chip->hardware) & CS4231_HW_TYPE_MASK) == CS4231_HW_DETECT) {
1018 rev = snd_cs4231_in(chip, CS4231_VERSION) & 0xe7;
1019 snd_printdd("CS4231: VERSION (I25) = 0x%x\n", rev);
1020 if (rev == 0x80) {
1021 unsigned char tmp = snd_cs4231_in(chip, 23);
1022 snd_cs4231_out(chip, 23, ~tmp);
1023 if (snd_cs4231_in(chip, 23) != tmp)
1024 chip->hardware = CS4231_HW_AD1845;
1025 else
1026 chip->hardware = CS4231_HW_CS4231;
1027 } else if (rev == 0xa0) {
1028 chip->hardware = CS4231_HW_CS4231A;
1029 } else if (rev == 0xa2) {
1030 chip->hardware = CS4231_HW_CS4232;
1031 } else if (rev == 0xb2) {
1032 chip->hardware = CS4231_HW_CS4232A;
1033 } else if (rev == 0x83) {
1034 chip->hardware = CS4231_HW_CS4236;
1035 } else if (rev == 0x03) {
1036 chip->hardware = CS4231_HW_CS4236B;
1037 } else {
1038 snd_printk("unknown CS chip with version 0x%x\n", rev);
1039 return -ENODEV; /* unknown CS4231 chip? */
1040 }
1041 }
1042 spin_lock_irqsave(&chip->reg_lock, flags);
1043 cs4231_inb(chip, CS4231P(STATUS)); /* clear any pendings IRQ */
1044 cs4231_outb(chip, CS4231P(STATUS), 0);
1045 mb();
1046 spin_unlock_irqrestore(&chip->reg_lock, flags);
1047
1048 chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1049 switch (chip->hardware) {
1050 case CS4231_HW_INTERWAVE:
1051 chip->image[CS4231_MISC_INFO] = CS4231_IW_MODE3;
1052 break;
1053 case CS4231_HW_CS4235:
1054 case CS4231_HW_CS4236B:
1055 case CS4231_HW_CS4237B:
1056 case CS4231_HW_CS4238B:
1057 case CS4231_HW_CS4239:
1058 if (hw == CS4231_HW_DETECT3)
1059 chip->image[CS4231_MISC_INFO] = CS4231_4236_MODE3;
1060 else
1061 chip->hardware = CS4231_HW_CS4236;
1062 break;
1063 }
1064
1065 chip->image[CS4231_IFACE_CTRL] =
1066 (chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA) |
1067 (chip->single_dma ? CS4231_SINGLE_DMA : 0);
1068 chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1069 chip->image[CS4231_ALT_FEATURE_2] = chip->hardware == CS4231_HW_INTERWAVE ? 0xc2 : 0x01;
1070 ptr = (unsigned char *) &chip->image;
1071 snd_cs4231_mce_down(chip);
1072 spin_lock_irqsave(&chip->reg_lock, flags);
1073 for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */
1074 snd_cs4231_out(chip, i, *ptr++);
1075 spin_unlock_irqrestore(&chip->reg_lock, flags);
1076 snd_cs4231_mce_up(chip);
1077 snd_cs4231_mce_down(chip);
1078
1079 mdelay(2);
1080
1081 /* ok.. try check hardware version for CS4236+ chips */
1082 if ((hw & CS4231_HW_TYPE_MASK) == CS4231_HW_DETECT) {
1083 if (chip->hardware == CS4231_HW_CS4236B) {
1084 rev = snd_cs4236_ext_in(chip, CS4236_VERSION);
1085 snd_cs4236_ext_out(chip, CS4236_VERSION, 0xff);
1086 id = snd_cs4236_ext_in(chip, CS4236_VERSION);
1087 snd_cs4236_ext_out(chip, CS4236_VERSION, rev);
1088 snd_printdd("CS4231: ext version; rev = 0x%x, id = 0x%x\n", rev, id);
1089 if ((id & 0x1f) == 0x1d) { /* CS4235 */
1090 chip->hardware = CS4231_HW_CS4235;
1091 switch (id >> 5) {
1092 case 4:
1093 case 5:
1094 case 6:
1095 break;
1096 default:
1097 snd_printk("unknown CS4235 chip (enhanced version = 0x%x)\n", id);
1098 }
1099 } else if ((id & 0x1f) == 0x0b) { /* CS4236/B */
1100 switch (id >> 5) {
1101 case 4:
1102 case 5:
1103 case 6:
1104 case 7:
1105 chip->hardware = CS4231_HW_CS4236B;
1106 break;
1107 default:
1108 snd_printk("unknown CS4236 chip (enhanced version = 0x%x)\n", id);
1109 }
1110 } else if ((id & 0x1f) == 0x08) { /* CS4237B */
1111 chip->hardware = CS4231_HW_CS4237B;
1112 switch (id >> 5) {
1113 case 4:
1114 case 5:
1115 case 6:
1116 case 7:
1117 break;
1118 default:
1119 snd_printk("unknown CS4237B chip (enhanced version = 0x%x)\n", id);
1120 }
1121 } else if ((id & 0x1f) == 0x09) { /* CS4238B */
1122 chip->hardware = CS4231_HW_CS4238B;
1123 switch (id >> 5) {
1124 case 5:
1125 case 6:
1126 case 7:
1127 break;
1128 default:
1129 snd_printk("unknown CS4238B chip (enhanced version = 0x%x)\n", id);
1130 }
1131 } else if ((id & 0x1f) == 0x1e) { /* CS4239 */
1132 chip->hardware = CS4231_HW_CS4239;
1133 switch (id >> 5) {
1134 case 4:
1135 case 5:
1136 case 6:
1137 break;
1138 default:
1139 snd_printk("unknown CS4239 chip (enhanced version = 0x%x)\n", id);
1140 }
1141 } else {
1142 snd_printk("unknown CS4236/CS423xB chip (enhanced version = 0x%x)\n", id);
1143 }
1144 }
1145 }
1146 return 0; /* all things are ok.. */
1147 }
1148
1149 /*
1150
1151 */
1152
1153 static struct snd_pcm_hardware snd_cs4231_playback =
1154 {
1155 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1156 SNDRV_PCM_INFO_MMAP_VALID |
1157 SNDRV_PCM_INFO_RESUME |
1158 SNDRV_PCM_INFO_SYNC_START),
1159 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW | SNDRV_PCM_FMTBIT_IMA_ADPCM |
1160 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE),
1161 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1162 .rate_min = 5510,
1163 .rate_max = 48000,
1164 .channels_min = 1,
1165 .channels_max = 2,
1166 .buffer_bytes_max = (128*1024),
1167 .period_bytes_min = 64,
1168 .period_bytes_max = (128*1024),
1169 .periods_min = 1,
1170 .periods_max = 1024,
1171 .fifo_size = 0,
1172 };
1173
1174 static struct snd_pcm_hardware snd_cs4231_capture =
1175 {
1176 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1177 SNDRV_PCM_INFO_MMAP_VALID |
1178 SNDRV_PCM_INFO_RESUME |
1179 SNDRV_PCM_INFO_SYNC_START),
1180 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW | SNDRV_PCM_FMTBIT_IMA_ADPCM |
1181 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE),
1182 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1183 .rate_min = 5510,
1184 .rate_max = 48000,
1185 .channels_min = 1,
1186 .channels_max = 2,
1187 .buffer_bytes_max = (128*1024),
1188 .period_bytes_min = 64,
1189 .period_bytes_max = (128*1024),
1190 .periods_min = 1,
1191 .periods_max = 1024,
1192 .fifo_size = 0,
1193 };
1194
1195 /*
1196
1197 */
1198
1199 static int snd_cs4231_playback_open(struct snd_pcm_substream *substream)
1200 {
1201 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1202 struct snd_pcm_runtime *runtime = substream->runtime;
1203 int err;
1204
1205 runtime->hw = snd_cs4231_playback;
1206
1207 /* hardware bug in InterWave chipset */
1208 if (chip->hardware == CS4231_HW_INTERWAVE && chip->dma1 > 3)
1209 runtime->hw.formats &= ~SNDRV_PCM_FMTBIT_MU_LAW;
1210
1211 /* hardware limitation of cheap chips */
1212 if (chip->hardware == CS4231_HW_CS4235 ||
1213 chip->hardware == CS4231_HW_CS4239)
1214 runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE;
1215
1216 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max);
1217 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max);
1218
1219 if (chip->claim_dma) {
1220 if ((err = chip->claim_dma(chip, chip->dma_private_data, chip->dma1)) < 0)
1221 return err;
1222 }
1223
1224 if ((err = snd_cs4231_open(chip, CS4231_MODE_PLAY)) < 0) {
1225 if (chip->release_dma)
1226 chip->release_dma(chip, chip->dma_private_data, chip->dma1);
1227 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1228 return err;
1229 }
1230 chip->playback_substream = substream;
1231 snd_pcm_set_sync(substream);
1232 chip->rate_constraint(runtime);
1233 return 0;
1234 }
1235
1236 static int snd_cs4231_capture_open(struct snd_pcm_substream *substream)
1237 {
1238 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1239 struct snd_pcm_runtime *runtime = substream->runtime;
1240 int err;
1241
1242 runtime->hw = snd_cs4231_capture;
1243
1244 /* hardware limitation of cheap chips */
1245 if (chip->hardware == CS4231_HW_CS4235 ||
1246 chip->hardware == CS4231_HW_CS4239)
1247 runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE;
1248
1249 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max);
1250 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max);
1251
1252 if (chip->claim_dma) {
1253 if ((err = chip->claim_dma(chip, chip->dma_private_data, chip->dma2)) < 0)
1254 return err;
1255 }
1256
1257 if ((err = snd_cs4231_open(chip, CS4231_MODE_RECORD)) < 0) {
1258 if (chip->release_dma)
1259 chip->release_dma(chip, chip->dma_private_data, chip->dma2);
1260 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1261 return err;
1262 }
1263 chip->capture_substream = substream;
1264 snd_pcm_set_sync(substream);
1265 chip->rate_constraint(runtime);
1266 return 0;
1267 }
1268
1269 static int snd_cs4231_playback_close(struct snd_pcm_substream *substream)
1270 {
1271 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1272
1273 chip->playback_substream = NULL;
1274 snd_cs4231_close(chip, CS4231_MODE_PLAY);
1275 return 0;
1276 }
1277
1278 static int snd_cs4231_capture_close(struct snd_pcm_substream *substream)
1279 {
1280 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1281
1282 chip->capture_substream = NULL;
1283 snd_cs4231_close(chip, CS4231_MODE_RECORD);
1284 return 0;
1285 }
1286
1287 #ifdef CONFIG_PM
1288
1289 /* lowlevel suspend callback for CS4231 */
1290 static void snd_cs4231_suspend(struct snd_cs4231 *chip)
1291 {
1292 int reg;
1293 unsigned long flags;
1294
1295 snd_pcm_suspend_all(chip->pcm);
1296 spin_lock_irqsave(&chip->reg_lock, flags);
1297 for (reg = 0; reg < 32; reg++)
1298 chip->image[reg] = snd_cs4231_in(chip, reg);
1299 spin_unlock_irqrestore(&chip->reg_lock, flags);
1300 }
1301
1302 /* lowlevel resume callback for CS4231 */
1303 static void snd_cs4231_resume(struct snd_cs4231 *chip)
1304 {
1305 int reg;
1306 unsigned long flags;
1307 /* int timeout; */
1308
1309 snd_cs4231_mce_up(chip);
1310 spin_lock_irqsave(&chip->reg_lock, flags);
1311 for (reg = 0; reg < 32; reg++) {
1312 switch (reg) {
1313 case CS4231_VERSION:
1314 break;
1315 default:
1316 snd_cs4231_out(chip, reg, chip->image[reg]);
1317 break;
1318 }
1319 }
1320 spin_unlock_irqrestore(&chip->reg_lock, flags);
1321 #if 1
1322 snd_cs4231_mce_down(chip);
1323 #else
1324 /* The following is a workaround to avoid freeze after resume on TP600E.
1325 This is the first half of copy of snd_cs4231_mce_down(), but doesn't
1326 include rescheduling. -- iwai
1327 */
1328 snd_cs4231_busy_wait(chip);
1329 spin_lock_irqsave(&chip->reg_lock, flags);
1330 chip->mce_bit &= ~CS4231_MCE;
1331 timeout = cs4231_inb(chip, CS4231P(REGSEL));
1332 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
1333 spin_unlock_irqrestore(&chip->reg_lock, flags);
1334 if (timeout == 0x80)
1335 snd_printk("down [0x%lx]: serious init problem - codec still busy\n", chip->port);
1336 if ((timeout & CS4231_MCE) == 0 ||
1337 !(chip->hardware & (CS4231_HW_CS4231_MASK | CS4231_HW_CS4232_MASK))) {
1338 return;
1339 }
1340 snd_cs4231_busy_wait(chip);
1341 #endif
1342 }
1343 #endif /* CONFIG_PM */
1344
1345 static int snd_cs4231_free(struct snd_cs4231 *chip)
1346 {
1347 release_and_free_resource(chip->res_port);
1348 release_and_free_resource(chip->res_cport);
1349 if (chip->irq >= 0) {
1350 disable_irq(chip->irq);
1351 if (!(chip->hwshare & CS4231_HWSHARE_IRQ))
1352 free_irq(chip->irq, (void *) chip);
1353 }
1354 if (!(chip->hwshare & CS4231_HWSHARE_DMA1) && chip->dma1 >= 0) {
1355 snd_dma_disable(chip->dma1);
1356 free_dma(chip->dma1);
1357 }
1358 if (!(chip->hwshare & CS4231_HWSHARE_DMA2) && chip->dma2 >= 0 && chip->dma2 != chip->dma1) {
1359 snd_dma_disable(chip->dma2);
1360 free_dma(chip->dma2);
1361 }
1362 if (chip->timer)
1363 snd_device_free(chip->card, chip->timer);
1364 kfree(chip);
1365 return 0;
1366 }
1367
1368 static int snd_cs4231_dev_free(struct snd_device *device)
1369 {
1370 struct snd_cs4231 *chip = device->device_data;
1371 return snd_cs4231_free(chip);
1372 }
1373
1374 const char *snd_cs4231_chip_id(struct snd_cs4231 *chip)
1375 {
1376 switch (chip->hardware) {
1377 case CS4231_HW_CS4231: return "CS4231";
1378 case CS4231_HW_CS4231A: return "CS4231A";
1379 case CS4231_HW_CS4232: return "CS4232";
1380 case CS4231_HW_CS4232A: return "CS4232A";
1381 case CS4231_HW_CS4235: return "CS4235";
1382 case CS4231_HW_CS4236: return "CS4236";
1383 case CS4231_HW_CS4236B: return "CS4236B";
1384 case CS4231_HW_CS4237B: return "CS4237B";
1385 case CS4231_HW_CS4238B: return "CS4238B";
1386 case CS4231_HW_CS4239: return "CS4239";
1387 case CS4231_HW_INTERWAVE: return "AMD InterWave";
1388 case CS4231_HW_OPL3SA2: return chip->card->shortname;
1389 case CS4231_HW_AD1845: return "AD1845";
1390 default: return "???";
1391 }
1392 }
1393
1394 static int snd_cs4231_new(struct snd_card *card,
1395 unsigned short hardware,
1396 unsigned short hwshare,
1397 struct snd_cs4231 ** rchip)
1398 {
1399 struct snd_cs4231 *chip;
1400
1401 *rchip = NULL;
1402 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1403 if (chip == NULL)
1404 return -ENOMEM;
1405 chip->hardware = hardware;
1406 chip->hwshare = hwshare;
1407
1408 spin_lock_init(&chip->reg_lock);
1409 mutex_init(&chip->mce_mutex);
1410 mutex_init(&chip->open_mutex);
1411 chip->card = card;
1412 chip->rate_constraint = snd_cs4231_xrate;
1413 chip->set_playback_format = snd_cs4231_playback_format;
1414 chip->set_capture_format = snd_cs4231_capture_format;
1415 memcpy(&chip->image, &snd_cs4231_original_image, sizeof(snd_cs4231_original_image));
1416
1417 *rchip = chip;
1418 return 0;
1419 }
1420
1421 int snd_cs4231_create(struct snd_card *card,
1422 unsigned long port,
1423 unsigned long cport,
1424 int irq, int dma1, int dma2,
1425 unsigned short hardware,
1426 unsigned short hwshare,
1427 struct snd_cs4231 ** rchip)
1428 {
1429 static struct snd_device_ops ops = {
1430 .dev_free = snd_cs4231_dev_free,
1431 };
1432 struct snd_cs4231 *chip;
1433 int err;
1434
1435 err = snd_cs4231_new(card, hardware, hwshare, &chip);
1436 if (err < 0)
1437 return err;
1438
1439 chip->irq = -1;
1440 chip->dma1 = -1;
1441 chip->dma2 = -1;
1442
1443 if ((chip->res_port = request_region(port, 4, "CS4231")) == NULL) {
1444 snd_printk(KERN_ERR "cs4231: can't grab port 0x%lx\n", port);
1445 snd_cs4231_free(chip);
1446 return -EBUSY;
1447 }
1448 chip->port = port;
1449 if ((long)cport >= 0 && (chip->res_cport = request_region(cport, 8, "CS4232 Control")) == NULL) {
1450 snd_printk(KERN_ERR "cs4231: can't grab control port 0x%lx\n", cport);
1451 snd_cs4231_free(chip);
1452 return -ENODEV;
1453 }
1454 chip->cport = cport;
1455 if (!(hwshare & CS4231_HWSHARE_IRQ) && request_irq(irq, snd_cs4231_interrupt, IRQF_DISABLED, "CS4231", (void *) chip)) {
1456 snd_printk(KERN_ERR "cs4231: can't grab IRQ %d\n", irq);
1457 snd_cs4231_free(chip);
1458 return -EBUSY;
1459 }
1460 chip->irq = irq;
1461 if (!(hwshare & CS4231_HWSHARE_DMA1) && request_dma(dma1, "CS4231 - 1")) {
1462 snd_printk(KERN_ERR "cs4231: can't grab DMA1 %d\n", dma1);
1463 snd_cs4231_free(chip);
1464 return -EBUSY;
1465 }
1466 chip->dma1 = dma1;
1467 if (!(hwshare & CS4231_HWSHARE_DMA2) && dma1 != dma2 && dma2 >= 0 && request_dma(dma2, "CS4231 - 2")) {
1468 snd_printk(KERN_ERR "cs4231: can't grab DMA2 %d\n", dma2);
1469 snd_cs4231_free(chip);
1470 return -EBUSY;
1471 }
1472 if (dma1 == dma2 || dma2 < 0) {
1473 chip->single_dma = 1;
1474 chip->dma2 = chip->dma1;
1475 } else
1476 chip->dma2 = dma2;
1477
1478 /* global setup */
1479 if (snd_cs4231_probe(chip) < 0) {
1480 snd_cs4231_free(chip);
1481 return -ENODEV;
1482 }
1483 snd_cs4231_init(chip);
1484
1485 #if 0
1486 if (chip->hardware & CS4231_HW_CS4232_MASK) {
1487 if (chip->res_cport == NULL)
1488 snd_printk("CS4232 control port features are not accessible\n");
1489 }
1490 #endif
1491
1492 /* Register device */
1493 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1494 snd_cs4231_free(chip);
1495 return err;
1496 }
1497
1498 #ifdef CONFIG_PM
1499 /* Power Management */
1500 chip->suspend = snd_cs4231_suspend;
1501 chip->resume = snd_cs4231_resume;
1502 #endif
1503
1504 *rchip = chip;
1505 return 0;
1506 }
1507
1508 static struct snd_pcm_ops snd_cs4231_playback_ops = {
1509 .open = snd_cs4231_playback_open,
1510 .close = snd_cs4231_playback_close,
1511 .ioctl = snd_pcm_lib_ioctl,
1512 .hw_params = snd_cs4231_playback_hw_params,
1513 .hw_free = snd_cs4231_playback_hw_free,
1514 .prepare = snd_cs4231_playback_prepare,
1515 .trigger = snd_cs4231_trigger,
1516 .pointer = snd_cs4231_playback_pointer,
1517 };
1518
1519 static struct snd_pcm_ops snd_cs4231_capture_ops = {
1520 .open = snd_cs4231_capture_open,
1521 .close = snd_cs4231_capture_close,
1522 .ioctl = snd_pcm_lib_ioctl,
1523 .hw_params = snd_cs4231_capture_hw_params,
1524 .hw_free = snd_cs4231_capture_hw_free,
1525 .prepare = snd_cs4231_capture_prepare,
1526 .trigger = snd_cs4231_trigger,
1527 .pointer = snd_cs4231_capture_pointer,
1528 };
1529
1530 int snd_cs4231_pcm(struct snd_cs4231 *chip, int device, struct snd_pcm **rpcm)
1531 {
1532 struct snd_pcm *pcm;
1533 int err;
1534
1535 if ((err = snd_pcm_new(chip->card, "CS4231", device, 1, 1, &pcm)) < 0)
1536 return err;
1537
1538 spin_lock_init(&chip->reg_lock);
1539 mutex_init(&chip->mce_mutex);
1540 mutex_init(&chip->open_mutex);
1541
1542 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_cs4231_playback_ops);
1543 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_cs4231_capture_ops);
1544
1545 /* global setup */
1546 pcm->private_data = chip;
1547 pcm->info_flags = 0;
1548 if (chip->single_dma)
1549 pcm->info_flags |= SNDRV_PCM_INFO_HALF_DUPLEX;
1550 if (chip->hardware != CS4231_HW_INTERWAVE)
1551 pcm->info_flags |= SNDRV_PCM_INFO_JOINT_DUPLEX;
1552 strcpy(pcm->name, snd_cs4231_chip_id(chip));
1553
1554 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1555 snd_dma_isa_data(),
1556 64*1024, chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024);
1557
1558 chip->pcm = pcm;
1559 if (rpcm)
1560 *rpcm = pcm;
1561 return 0;
1562 }
1563
1564 static void snd_cs4231_timer_free(struct snd_timer *timer)
1565 {
1566 struct snd_cs4231 *chip = timer->private_data;
1567 chip->timer = NULL;
1568 }
1569
1570 int snd_cs4231_timer(struct snd_cs4231 *chip, int device, struct snd_timer **rtimer)
1571 {
1572 struct snd_timer *timer;
1573 struct snd_timer_id tid;
1574 int err;
1575
1576 /* Timer initialization */
1577 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1578 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1579 tid.card = chip->card->number;
1580 tid.device = device;
1581 tid.subdevice = 0;
1582 if ((err = snd_timer_new(chip->card, "CS4231", &tid, &timer)) < 0)
1583 return err;
1584 strcpy(timer->name, snd_cs4231_chip_id(chip));
1585 timer->private_data = chip;
1586 timer->private_free = snd_cs4231_timer_free;
1587 timer->hw = snd_cs4231_timer_table;
1588 chip->timer = timer;
1589 if (rtimer)
1590 *rtimer = timer;
1591 return 0;
1592 }
1593
1594 /*
1595 * MIXER part
1596 */
1597
1598 static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1599 {
1600 static char *texts[4] = {
1601 "Line", "Aux", "Mic", "Mix"
1602 };
1603 static char *opl3sa_texts[4] = {
1604 "Line", "CD", "Mic", "Mix"
1605 };
1606 static char *gusmax_texts[4] = {
1607 "Line", "Synth", "Mic", "Mix"
1608 };
1609 char **ptexts = texts;
1610 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1611
1612 snd_assert(chip->card != NULL, return -EINVAL);
1613 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1614 uinfo->count = 2;
1615 uinfo->value.enumerated.items = 4;
1616 if (uinfo->value.enumerated.item > 3)
1617 uinfo->value.enumerated.item = 3;
1618 if (!strcmp(chip->card->driver, "GUS MAX"))
1619 ptexts = gusmax_texts;
1620 switch (chip->hardware) {
1621 case CS4231_HW_INTERWAVE: ptexts = gusmax_texts; break;
1622 case CS4231_HW_OPL3SA2: ptexts = opl3sa_texts; break;
1623 }
1624 strcpy(uinfo->value.enumerated.name, ptexts[uinfo->value.enumerated.item]);
1625 return 0;
1626 }
1627
1628 static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1629 {
1630 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1631 unsigned long flags;
1632
1633 spin_lock_irqsave(&chip->reg_lock, flags);
1634 ucontrol->value.enumerated.item[0] = (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1635 ucontrol->value.enumerated.item[1] = (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1636 spin_unlock_irqrestore(&chip->reg_lock, flags);
1637 return 0;
1638 }
1639
1640 static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1641 {
1642 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1643 unsigned long flags;
1644 unsigned short left, right;
1645 int change;
1646
1647 if (ucontrol->value.enumerated.item[0] > 3 ||
1648 ucontrol->value.enumerated.item[1] > 3)
1649 return -EINVAL;
1650 left = ucontrol->value.enumerated.item[0] << 6;
1651 right = ucontrol->value.enumerated.item[1] << 6;
1652 spin_lock_irqsave(&chip->reg_lock, flags);
1653 left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1654 right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1655 change = left != chip->image[CS4231_LEFT_INPUT] ||
1656 right != chip->image[CS4231_RIGHT_INPUT];
1657 snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1658 snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1659 spin_unlock_irqrestore(&chip->reg_lock, flags);
1660 return change;
1661 }
1662
1663 int snd_cs4231_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1664 {
1665 int mask = (kcontrol->private_value >> 16) & 0xff;
1666
1667 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1668 uinfo->count = 1;
1669 uinfo->value.integer.min = 0;
1670 uinfo->value.integer.max = mask;
1671 return 0;
1672 }
1673
1674 int snd_cs4231_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1675 {
1676 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1677 unsigned long flags;
1678 int reg = kcontrol->private_value & 0xff;
1679 int shift = (kcontrol->private_value >> 8) & 0xff;
1680 int mask = (kcontrol->private_value >> 16) & 0xff;
1681 int invert = (kcontrol->private_value >> 24) & 0xff;
1682
1683 spin_lock_irqsave(&chip->reg_lock, flags);
1684 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1685 spin_unlock_irqrestore(&chip->reg_lock, flags);
1686 if (invert)
1687 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1688 return 0;
1689 }
1690
1691 int snd_cs4231_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1692 {
1693 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1694 unsigned long flags;
1695 int reg = kcontrol->private_value & 0xff;
1696 int shift = (kcontrol->private_value >> 8) & 0xff;
1697 int mask = (kcontrol->private_value >> 16) & 0xff;
1698 int invert = (kcontrol->private_value >> 24) & 0xff;
1699 int change;
1700 unsigned short val;
1701
1702 val = (ucontrol->value.integer.value[0] & mask);
1703 if (invert)
1704 val = mask - val;
1705 val <<= shift;
1706 spin_lock_irqsave(&chip->reg_lock, flags);
1707 val = (chip->image[reg] & ~(mask << shift)) | val;
1708 change = val != chip->image[reg];
1709 snd_cs4231_out(chip, reg, val);
1710 spin_unlock_irqrestore(&chip->reg_lock, flags);
1711 return change;
1712 }
1713
1714 int snd_cs4231_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1715 {
1716 int mask = (kcontrol->private_value >> 24) & 0xff;
1717
1718 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1719 uinfo->count = 2;
1720 uinfo->value.integer.min = 0;
1721 uinfo->value.integer.max = mask;
1722 return 0;
1723 }
1724
1725 int snd_cs4231_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1726 {
1727 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1728 unsigned long flags;
1729 int left_reg = kcontrol->private_value & 0xff;
1730 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1731 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1732 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1733 int mask = (kcontrol->private_value >> 24) & 0xff;
1734 int invert = (kcontrol->private_value >> 22) & 1;
1735
1736 spin_lock_irqsave(&chip->reg_lock, flags);
1737 ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
1738 ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
1739 spin_unlock_irqrestore(&chip->reg_lock, flags);
1740 if (invert) {
1741 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1742 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1743 }
1744 return 0;
1745 }
1746
1747 int snd_cs4231_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1748 {
1749 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1750 unsigned long flags;
1751 int left_reg = kcontrol->private_value & 0xff;
1752 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1753 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1754 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1755 int mask = (kcontrol->private_value >> 24) & 0xff;
1756 int invert = (kcontrol->private_value >> 22) & 1;
1757 int change;
1758 unsigned short val1, val2;
1759
1760 val1 = ucontrol->value.integer.value[0] & mask;
1761 val2 = ucontrol->value.integer.value[1] & mask;
1762 if (invert) {
1763 val1 = mask - val1;
1764 val2 = mask - val2;
1765 }
1766 val1 <<= shift_left;
1767 val2 <<= shift_right;
1768 spin_lock_irqsave(&chip->reg_lock, flags);
1769 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1770 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1771 change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
1772 snd_cs4231_out(chip, left_reg, val1);
1773 snd_cs4231_out(chip, right_reg, val2);
1774 spin_unlock_irqrestore(&chip->reg_lock, flags);
1775 return change;
1776 }
1777
1778 static struct snd_kcontrol_new snd_cs4231_controls[] = {
1779 CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1780 CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1781 CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1782 CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1783 CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1784 CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1785 CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1786 CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1787 CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1788 CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1789 CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1790 CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
1791 CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0, 15, 0),
1792 {
1793 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1794 .name = "Capture Source",
1795 .info = snd_cs4231_info_mux,
1796 .get = snd_cs4231_get_mux,
1797 .put = snd_cs4231_put_mux,
1798 },
1799 CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5, 1, 0),
1800 CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1801 CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1)
1802 };
1803
1804 int snd_cs4231_mixer(struct snd_cs4231 *chip)
1805 {
1806 struct snd_card *card;
1807 unsigned int idx;
1808 int err;
1809
1810 snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
1811
1812 card = chip->card;
1813
1814 strcpy(card->mixername, chip->pcm->name);
1815
1816 for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
1817 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_cs4231_controls[idx], chip))) < 0)
1818 return err;
1819 }
1820 return 0;
1821 }
1822
1823 EXPORT_SYMBOL(snd_cs4231_out);
1824 EXPORT_SYMBOL(snd_cs4231_in);
1825 EXPORT_SYMBOL(snd_cs4236_ext_out);
1826 EXPORT_SYMBOL(snd_cs4236_ext_in);
1827 EXPORT_SYMBOL(snd_cs4231_mce_up);
1828 EXPORT_SYMBOL(snd_cs4231_mce_down);
1829 EXPORT_SYMBOL(snd_cs4231_interrupt);
1830 EXPORT_SYMBOL(snd_cs4231_chip_id);
1831 EXPORT_SYMBOL(snd_cs4231_create);
1832 EXPORT_SYMBOL(snd_cs4231_pcm);
1833 EXPORT_SYMBOL(snd_cs4231_mixer);
1834 EXPORT_SYMBOL(snd_cs4231_timer);
1835 EXPORT_SYMBOL(snd_cs4231_info_single);
1836 EXPORT_SYMBOL(snd_cs4231_get_single);
1837 EXPORT_SYMBOL(snd_cs4231_put_single);
1838 EXPORT_SYMBOL(snd_cs4231_info_double);
1839 EXPORT_SYMBOL(snd_cs4231_get_double);
1840 EXPORT_SYMBOL(snd_cs4231_put_double);
1841
1842 /*
1843 * INIT part
1844 */
1845
1846 static int __init alsa_cs4231_init(void)
1847 {
1848 return 0;
1849 }
1850
1851 static void __exit alsa_cs4231_exit(void)
1852 {
1853 }
1854
1855 module_init(alsa_cs4231_init)
1856 module_exit(alsa_cs4231_exit)
WRT350N Kernel Patches