x86: fix bogus KERN_ALERT on oops
[wrt350n-kernel.git] / arch / m68k / bvme6000 / config.c
blob9433a88a33c4093866e6ea603182f0975e6b0e54
1 /*
2 * arch/m68k/bvme6000/config.c
4 * Copyright (C) 1997 Richard Hirst [richard@sleepie.demon.co.uk]
6 * Based on:
8 * linux/amiga/config.c
10 * Copyright (C) 1993 Hamish Macdonald
12 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file README.legal in the main directory of this archive
14 * for more details.
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/mm.h>
20 #include <linux/tty.h>
21 #include <linux/console.h>
22 #include <linux/linkage.h>
23 #include <linux/init.h>
24 #include <linux/major.h>
25 #include <linux/genhd.h>
26 #include <linux/rtc.h>
27 #include <linux/interrupt.h>
29 #include <asm/bootinfo.h>
30 #include <asm/system.h>
31 #include <asm/pgtable.h>
32 #include <asm/setup.h>
33 #include <asm/irq.h>
34 #include <asm/traps.h>
35 #include <asm/rtc.h>
36 #include <asm/machdep.h>
37 #include <asm/bvme6000hw.h>
39 static void bvme6000_get_model(char *model);
40 static int bvme6000_get_hardware_list(char *buffer);
41 extern void bvme6000_sched_init(irq_handler_t handler);
42 extern unsigned long bvme6000_gettimeoffset (void);
43 extern int bvme6000_hwclk (int, struct rtc_time *);
44 extern int bvme6000_set_clock_mmss (unsigned long);
45 extern void bvme6000_reset (void);
46 extern void bvme6000_waitbut(void);
47 void bvme6000_set_vectors (void);
49 static unsigned char bcd2bin (unsigned char b);
50 static unsigned char bin2bcd (unsigned char b);
52 /* Save tick handler routine pointer, will point to do_timer() in
53 * kernel/sched.c, called via bvme6000_process_int() */
55 static irq_handler_t tick_handler;
58 int bvme6000_parse_bootinfo(const struct bi_record *bi)
60 if (bi->tag == BI_VME_TYPE)
61 return 0;
62 else
63 return 1;
66 void bvme6000_reset(void)
68 volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
70 printk ("\r\n\nCalled bvme6000_reset\r\n"
71 "\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r");
72 /* The string of returns is to delay the reset until the whole
73 * message is output. */
74 /* Enable the watchdog, via PIT port C bit 4 */
76 pit->pcddr |= 0x10; /* WDOG enable */
78 while(1)
82 static void bvme6000_get_model(char *model)
84 sprintf(model, "BVME%d000", m68k_cputype == CPU_68060 ? 6 : 4);
88 /* No hardware options on BVME6000? */
90 static int bvme6000_get_hardware_list(char *buffer)
92 *buffer = '\0';
93 return 0;
97 * This function is called during kernel startup to initialize
98 * the bvme6000 IRQ handling routines.
100 static void __init bvme6000_init_IRQ(void)
102 m68k_setup_user_interrupt(VEC_USER, 192, NULL);
105 void __init config_bvme6000(void)
107 volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
109 /* Board type is only set by newer versions of vmelilo/tftplilo */
110 if (!vme_brdtype) {
111 if (m68k_cputype == CPU_68060)
112 vme_brdtype = VME_TYPE_BVME6000;
113 else
114 vme_brdtype = VME_TYPE_BVME4000;
116 #if 0
117 /* Call bvme6000_set_vectors() so ABORT will work, along with BVMBug
118 * debugger. Note trap_init() will splat the abort vector, but
119 * bvme6000_init_IRQ() will put it back again. Hopefully. */
121 bvme6000_set_vectors();
122 #endif
124 mach_max_dma_address = 0xffffffff;
125 mach_sched_init = bvme6000_sched_init;
126 mach_init_IRQ = bvme6000_init_IRQ;
127 mach_gettimeoffset = bvme6000_gettimeoffset;
128 mach_hwclk = bvme6000_hwclk;
129 mach_set_clock_mmss = bvme6000_set_clock_mmss;
130 mach_reset = bvme6000_reset;
131 mach_get_model = bvme6000_get_model;
132 mach_get_hardware_list = bvme6000_get_hardware_list;
134 printk ("Board is %sconfigured as a System Controller\n",
135 *config_reg_ptr & BVME_CONFIG_SW1 ? "" : "not ");
137 /* Now do the PIT configuration */
139 pit->pgcr = 0x00; /* Unidirectional 8 bit, no handshake for now */
140 pit->psrr = 0x18; /* PIACK and PIRQ functions enabled */
141 pit->pacr = 0x00; /* Sub Mode 00, H2 i/p, no DMA */
142 pit->padr = 0x00; /* Just to be tidy! */
143 pit->paddr = 0x00; /* All inputs for now (safest) */
144 pit->pbcr = 0x80; /* Sub Mode 1x, H4 i/p, no DMA */
145 pit->pbdr = 0xbc | (*config_reg_ptr & BVME_CONFIG_SW1 ? 0 : 0x40);
146 /* PRI, SYSCON?, Level3, SCC clks from xtal */
147 pit->pbddr = 0xf3; /* Mostly outputs */
148 pit->pcdr = 0x01; /* PA transceiver disabled */
149 pit->pcddr = 0x03; /* WDOG disable */
151 /* Disable snooping for Ethernet and VME accesses */
153 bvme_acr_addrctl = 0;
157 irqreturn_t bvme6000_abort_int (int irq, void *dev_id)
159 unsigned long *new = (unsigned long *)vectors;
160 unsigned long *old = (unsigned long *)0xf8000000;
162 /* Wait for button release */
163 while (*(volatile unsigned char *)BVME_LOCAL_IRQ_STAT & BVME_ABORT_STATUS)
166 *(new+4) = *(old+4); /* Illegal instruction */
167 *(new+9) = *(old+9); /* Trace */
168 *(new+47) = *(old+47); /* Trap #15 */
169 *(new+0x1f) = *(old+0x1f); /* ABORT switch */
170 return IRQ_HANDLED;
174 static irqreturn_t bvme6000_timer_int (int irq, void *dev_id)
176 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
177 unsigned char msr = rtc->msr & 0xc0;
179 rtc->msr = msr | 0x20; /* Ack the interrupt */
181 return tick_handler(irq, dev_id);
185 * Set up the RTC timer 1 to mode 2, so T1 output toggles every 5ms
186 * (40000 x 125ns). It will interrupt every 10ms, when T1 goes low.
187 * So, when reading the elapsed time, you should read timer1,
188 * subtract it from 39999, and then add 40000 if T1 is high.
189 * That gives you the number of 125ns ticks in to the 10ms period,
190 * so divide by 8 to get the microsecond result.
193 void bvme6000_sched_init (irq_handler_t timer_routine)
195 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
196 unsigned char msr = rtc->msr & 0xc0;
198 rtc->msr = 0; /* Ensure timer registers accessible */
200 tick_handler = timer_routine;
201 if (request_irq(BVME_IRQ_RTC, bvme6000_timer_int, 0,
202 "timer", bvme6000_timer_int))
203 panic ("Couldn't register timer int");
205 rtc->t1cr_omr = 0x04; /* Mode 2, ext clk */
206 rtc->t1msb = 39999 >> 8;
207 rtc->t1lsb = 39999 & 0xff;
208 rtc->irr_icr1 &= 0xef; /* Route timer 1 to INTR pin */
209 rtc->msr = 0x40; /* Access int.cntrl, etc */
210 rtc->pfr_icr0 = 0x80; /* Just timer 1 ints enabled */
211 rtc->irr_icr1 = 0;
212 rtc->t1cr_omr = 0x0a; /* INTR+T1 active lo, push-pull */
213 rtc->t0cr_rtmr &= 0xdf; /* Stop timers in standby */
214 rtc->msr = 0; /* Access timer 1 control */
215 rtc->t1cr_omr = 0x05; /* Mode 2, ext clk, GO */
217 rtc->msr = msr;
219 if (request_irq(BVME_IRQ_ABORT, bvme6000_abort_int, 0,
220 "abort", bvme6000_abort_int))
221 panic ("Couldn't register abort int");
225 /* This is always executed with interrupts disabled. */
228 * NOTE: Don't accept any readings within 5us of rollover, as
229 * the T1INT bit may be a little slow getting set. There is also
230 * a fault in the chip, meaning that reads may produce invalid
231 * results...
234 unsigned long bvme6000_gettimeoffset (void)
236 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
237 volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
238 unsigned char msr = rtc->msr & 0xc0;
239 unsigned char t1int, t1op;
240 unsigned long v = 800000, ov;
242 rtc->msr = 0; /* Ensure timer registers accessible */
244 do {
245 ov = v;
246 t1int = rtc->msr & 0x20;
247 t1op = pit->pcdr & 0x04;
248 rtc->t1cr_omr |= 0x40; /* Latch timer1 */
249 v = rtc->t1msb << 8; /* Read timer1 */
250 v |= rtc->t1lsb; /* Read timer1 */
251 } while (t1int != (rtc->msr & 0x20) ||
252 t1op != (pit->pcdr & 0x04) ||
253 abs(ov-v) > 80 ||
254 v > 39960);
256 v = 39999 - v;
257 if (!t1op) /* If in second half cycle.. */
258 v += 40000;
259 v /= 8; /* Convert ticks to microseconds */
260 if (t1int)
261 v += 10000; /* Int pending, + 10ms */
262 rtc->msr = msr;
264 return v;
267 static unsigned char bcd2bin (unsigned char b)
269 return ((b>>4)*10 + (b&15));
272 static unsigned char bin2bcd (unsigned char b)
274 return (((b/10)*16) + (b%10));
279 * Looks like op is non-zero for setting the clock, and zero for
280 * reading the clock.
282 * struct hwclk_time {
283 * unsigned sec; 0..59
284 * unsigned min; 0..59
285 * unsigned hour; 0..23
286 * unsigned day; 1..31
287 * unsigned mon; 0..11
288 * unsigned year; 00...
289 * int wday; 0..6, 0 is Sunday, -1 means unknown/don't set
290 * };
293 int bvme6000_hwclk(int op, struct rtc_time *t)
295 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
296 unsigned char msr = rtc->msr & 0xc0;
298 rtc->msr = 0x40; /* Ensure clock and real-time-mode-register
299 * are accessible */
300 if (op)
301 { /* Write.... */
302 rtc->t0cr_rtmr = t->tm_year%4;
303 rtc->bcd_tenms = 0;
304 rtc->bcd_sec = bin2bcd(t->tm_sec);
305 rtc->bcd_min = bin2bcd(t->tm_min);
306 rtc->bcd_hr = bin2bcd(t->tm_hour);
307 rtc->bcd_dom = bin2bcd(t->tm_mday);
308 rtc->bcd_mth = bin2bcd(t->tm_mon + 1);
309 rtc->bcd_year = bin2bcd(t->tm_year%100);
310 if (t->tm_wday >= 0)
311 rtc->bcd_dow = bin2bcd(t->tm_wday+1);
312 rtc->t0cr_rtmr = t->tm_year%4 | 0x08;
314 else
315 { /* Read.... */
316 do {
317 t->tm_sec = bcd2bin(rtc->bcd_sec);
318 t->tm_min = bcd2bin(rtc->bcd_min);
319 t->tm_hour = bcd2bin(rtc->bcd_hr);
320 t->tm_mday = bcd2bin(rtc->bcd_dom);
321 t->tm_mon = bcd2bin(rtc->bcd_mth)-1;
322 t->tm_year = bcd2bin(rtc->bcd_year);
323 if (t->tm_year < 70)
324 t->tm_year += 100;
325 t->tm_wday = bcd2bin(rtc->bcd_dow)-1;
326 } while (t->tm_sec != bcd2bin(rtc->bcd_sec));
329 rtc->msr = msr;
331 return 0;
335 * Set the minutes and seconds from seconds value 'nowtime'. Fail if
336 * clock is out by > 30 minutes. Logic lifted from atari code.
337 * Algorithm is to wait for the 10ms register to change, and then to
338 * wait a short while, and then set it.
341 int bvme6000_set_clock_mmss (unsigned long nowtime)
343 int retval = 0;
344 short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;
345 unsigned char rtc_minutes, rtc_tenms;
346 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
347 unsigned char msr = rtc->msr & 0xc0;
348 unsigned long flags;
349 volatile int i;
351 rtc->msr = 0; /* Ensure clock accessible */
352 rtc_minutes = bcd2bin (rtc->bcd_min);
354 if ((rtc_minutes < real_minutes
355 ? real_minutes - rtc_minutes
356 : rtc_minutes - real_minutes) < 30)
358 local_irq_save(flags);
359 rtc_tenms = rtc->bcd_tenms;
360 while (rtc_tenms == rtc->bcd_tenms)
362 for (i = 0; i < 1000; i++)
364 rtc->bcd_min = bin2bcd(real_minutes);
365 rtc->bcd_sec = bin2bcd(real_seconds);
366 local_irq_restore(flags);
368 else
369 retval = -1;
371 rtc->msr = msr;
373 return retval;