arch/powerpc/sysdev/mpc8xx_pic.c

   1 #include <linux/kernel.h>
   2 #include <linux/module.h>
   3 #include <linux/stddef.h>
   4 #include <linux/init.h>
   5 #include <linux/sched.h>
   6 #include <linux/signal.h>
   7 #include <linux/irq.h>
   8 #include <linux/dma-mapping.h>
   9 #include <asm/prom.h>
  10 #include <asm/irq.h>
  11 #include <asm/io.h>
  12 #include <asm/8xx_immap.h>
  13 #include <asm/mpc8xx.h>
  14
  15 #include "mpc8xx_pic.h"
  16
  17
  18 #define PIC_VEC_SPURRIOUS      15
  19
  20 extern int cpm_get_irq(struct pt_regs *regs);
  21
  22 static struct irq_host *mpc8xx_pic_host;
  23 #define NR_MASK_WORDS   ((NR_IRQS + 31) / 32)
  24 static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
  25 static sysconf8xx_t __iomem *siu_reg;
  26
  27 int cpm_get_irq(struct pt_regs *regs);
  28
  29 static void mpc8xx_unmask_irq(unsigned int virq)
  30 {
  31         int     bit, word;
  32         unsigned int irq_nr = (unsigned int)irq_map[virq].hwirq;
  33
  34         bit = irq_nr & 0x1f;
  35         word = irq_nr >> 5;
  36
  37         ppc_cached_irq_mask[word] |= (1 << (31-bit));
  38         out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]);
  39 }
  40
  41 static void mpc8xx_mask_irq(unsigned int virq)
  42 {
  43         int     bit, word;
  44         unsigned int irq_nr = (unsigned int)irq_map[virq].hwirq;
  45
  46         bit = irq_nr & 0x1f;
  47         word = irq_nr >> 5;
  48
  49         ppc_cached_irq_mask[word] &= ~(1 << (31-bit));
  50         out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]);
  51 }
  52
  53 static void mpc8xx_ack(unsigned int virq)
  54 {
  55         int     bit;
  56         unsigned int irq_nr = (unsigned int)irq_map[virq].hwirq;
  57
  58         bit = irq_nr & 0x1f;
  59         out_be32(&siu_reg->sc_sipend, 1 << (31-bit));
  60 }
  61
  62 static void mpc8xx_end_irq(unsigned int virq)
  63 {
  64         int bit, word;
  65         unsigned int irq_nr = (unsigned int)irq_map[virq].hwirq;
  66
  67         bit = irq_nr & 0x1f;
  68         word = irq_nr >> 5;
  69
  70         ppc_cached_irq_mask[word] |= (1 << (31-bit));
  71         out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]);
  72 }
  73
  74 static int mpc8xx_set_irq_type(unsigned int virq, unsigned int flow_type)
  75 {
  76         struct irq_desc *desc = get_irq_desc(virq);
  77
  78         desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
  79         desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
  80         if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
  81                 desc->status |= IRQ_LEVEL;
  82
  83         if (flow_type & IRQ_TYPE_EDGE_FALLING) {
  84                 irq_hw_number_t hw = (unsigned int)irq_map[virq].hwirq;
  85                 unsigned int siel = in_be32(&siu_reg->sc_siel);
  86
  87                 /* only external IRQ senses are programmable */
  88                 if ((hw & 1) == 0) {
  89                         siel |= (0x80000000 >> hw);
  90                         out_be32(&siu_reg->sc_siel, siel);
  91                         desc->handle_irq = handle_edge_irq;
  92                 }
  93         }
  94         return 0;
  95 }
  96
  97 static struct irq_chip mpc8xx_pic = {
  98         .typename = " MPC8XX SIU ",
  99         .unmask = mpc8xx_unmask_irq,
 100         .mask = mpc8xx_mask_irq,
 101         .ack = mpc8xx_ack,
 102         .eoi = mpc8xx_end_irq,
 103         .set_type = mpc8xx_set_irq_type,
 104 };
 105
 106 unsigned int mpc8xx_get_irq(void)
 107 {
 108         int irq;
 109
 110         /* For MPC8xx, read the SIVEC register and shift the bits down
 111          * to get the irq number.
 112          */
 113         irq = in_be32(&siu_reg->sc_sivec) >> 26;
 114
 115         if (irq == PIC_VEC_SPURRIOUS)
 116                 irq = NO_IRQ;
 117
 118         return irq_linear_revmap(mpc8xx_pic_host, irq);
 119
 120 }
 121
 122 static int mpc8xx_pic_host_map(struct irq_host *h, unsigned int virq,
 123                           irq_hw_number_t hw)
 124 {
 125         pr_debug("mpc8xx_pic_host_map(%d, 0x%lx)\n", virq, hw);
 126
 127         /* Set default irq handle */
 128         set_irq_chip_and_handler(virq, &mpc8xx_pic, handle_level_irq);
 129         return 0;
 130 }
 131
 132
 133 static int mpc8xx_pic_host_xlate(struct irq_host *h, struct device_node *ct,
 134                             u32 *intspec, unsigned int intsize,
 135                             irq_hw_number_t *out_hwirq, unsigned int *out_flags)
 136 {
 137         static unsigned char map_pic_senses[4] = {
 138                 IRQ_TYPE_EDGE_RISING,
 139                 IRQ_TYPE_LEVEL_LOW,
 140                 IRQ_TYPE_LEVEL_HIGH,
 141                 IRQ_TYPE_EDGE_FALLING,
 142         };
 143
 144         *out_hwirq = intspec[0];
 145         if (intsize > 1 && intspec[1] < 4)
 146                 *out_flags = map_pic_senses[intspec[1]];
 147         else
 148                 *out_flags = IRQ_TYPE_NONE;
 149
 150         return 0;
 151 }
 152
 153
 154 static struct irq_host_ops mpc8xx_pic_host_ops = {
 155         .map = mpc8xx_pic_host_map,
 156         .xlate = mpc8xx_pic_host_xlate,
 157 };
 158
 159 int mpc8xx_pic_init(void)
 160 {
 161         struct resource res;
 162         struct device_node *np;
 163         int ret;
 164
 165         np = of_find_compatible_node(NULL, NULL, "fsl,pq1-pic");
 166         if (np == NULL)
 167                 np = of_find_node_by_type(NULL, "mpc8xx-pic");
 168         if (np == NULL) {
 169                 printk(KERN_ERR "Could not find fsl,pq1-pic node\n");
 170                 return -ENOMEM;
 171         }
 172
 173         ret = of_address_to_resource(np, 0, &res);
 174         if (ret)
 175                 goto out;
 176
 177         siu_reg = ioremap(res.start, res.end - res.start + 1);
 178         if (siu_reg == NULL)
 179                 return -EINVAL;
 180
 181         mpc8xx_pic_host = irq_alloc_host(of_node_get(np), IRQ_HOST_MAP_LINEAR,
 182                                          64, &mpc8xx_pic_host_ops, 64);
 183         if (mpc8xx_pic_host == NULL) {
 184                 printk(KERN_ERR "MPC8xx PIC: failed to allocate irq host!\n");
 185                 ret = -ENOMEM;
 186         }
 187
 188 out:
 189         of_node_put(np);
 190         return ret;
 191 }