block: blk_max_pfn is somtimes wrong
[wrt350n-kernel.git] / include / asm-mips / tx3912.h
blobd709d87363d05ae13d2526b3d5360e6b53a4ed87
1 /*
2 * include/asm-mips/tx3912.h
4 * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * Registers for TMPR3912/05 and PR31700 processors
12 #ifndef _TX3912_H_
13 #define _TX3912_H_
15 /*****************************************************************************
16 * Clock Subsystem *
17 * --------------- *
18 * Chapter 6 in Philips PR31700 and Toshiba TMPR3905/12 User Manuals *
19 *****************************************************************************/
20 #define TX3912_CLK_CTRL 0x01c0
23 * Clock control register values
25 #define TX3912_CLK_CTRL_CHICLKDIV_MASK 0xff000000
26 #define TX3912_CLK_CTRL_ENCLKTEST 0x00800000
27 #define TX3912_CLK_CTRL_CLKTESTSELSIB 0x00400000
28 #define TX3912_CLK_CTRL_CHIMCLKSEL 0x00200000
29 #define TX3912_CLK_CTRL_CHICLKDIR 0x00100000
30 #define TX3912_CLK_CTRL_ENCHIMCLK 0x00080000
31 #define TX3912_CLK_CTRL_ENVIDCLK 0x00040000
32 #define TX3912_CLK_CTRL_ENMBUSCLK 0x00020000
33 #define TX3912_CLK_CTRL_ENSPICLK 0x00010000
34 #define TX3912_CLK_CTRL_ENTIMERCLK 0x00008000
35 #define TX3912_CLK_CTRL_ENFASTTIMERCLK 0x00004000
36 #define TX3912_CLK_CTRL_SIBMCLKDIR 0x00002000
37 #define TX3912_CLK_CTRL_reserved1 0x00001000
38 #define TX3912_CLK_CTRL_ENSIBMCLK 0x00000800
39 #define TX3912_CLK_CTRL_SIBMCLKDIV_6 0x00000600
40 #define TX3912_CLK_CTRL_SIBMCLKDIV_5 0x00000500
41 #define TX3912_CLK_CTRL_SIBMCLKDIV_4 0x00000400
42 #define TX3912_CLK_CTRL_SIBMCLKDIV_3 0x00000300
43 #define TX3912_CLK_CTRL_SIBMCLKDIV_2 0x00000200
44 #define TX3912_CLK_CTRL_SIBMCLKDIV_1 0x00000100
45 #define TX3912_CLK_CTRL_CSERSEL 0x00000080
46 #define TX3912_CLK_CTRL_CSERDIV_6 0x00000060
47 #define TX3912_CLK_CTRL_CSERDIV_5 0x00000050
48 #define TX3912_CLK_CTRL_CSERDIV_4 0x00000040
49 #define TX3912_CLK_CTRL_CSERDIV_3 0x00000030
50 #define TX3912_CLK_CTRL_CSERDIV_2 0x00000020
51 #define TX3912_CLK_CTRL_CSERDIV_1 0x00000010
52 #define TX3912_CLK_CTRL_ENCSERCLK 0x00000008
53 #define TX3912_CLK_CTRL_ENIRCLK 0x00000004
54 #define TX3912_CLK_CTRL_ENUARTACLK 0x00000002
55 #define TX3912_CLK_CTRL_ENUARTBCLK 0x00000001
58 /*****************************************************************************
59 * Interrupt Subsystem *
60 * ------------------- *
61 * Chapter 8 in Philips PR31700 and Toshiba TMPR3905/12 User Manuals *
62 *****************************************************************************/
63 #define TX3912_INT1_CLEAR 0x0100
64 #define TX3912_INT2_CLEAR 0x0104
65 #define TX3912_INT3_CLEAR 0x0108
66 #define TX3912_INT4_CLEAR 0x010c
67 #define TX3912_INT5_CLEAR 0x0110
68 #define TX3912_INT1_ENABLE 0x0118
69 #define TX3912_INT2_ENABLE 0x011c
70 #define TX3912_INT3_ENABLE 0x0120
71 #define TX3912_INT4_ENABLE 0x0124
72 #define TX3912_INT5_ENABLE 0x0128
73 #define TX3912_INT6_ENABLE 0x012c
74 #define TX3912_INT1_STATUS 0x0100
75 #define TX3912_INT2_STATUS 0x0104
76 #define TX3912_INT3_STATUS 0x0108
77 #define TX3912_INT4_STATUS 0x010c
78 #define TX3912_INT5_STATUS 0x0110
79 #define TX3912_INT6_STATUS 0x0114
82 * Interrupt 2 register values
84 #define TX3912_INT2_UARTARXINT 0x80000000
85 #define TX3912_INT2_UARTARXOVERRUNINT 0x40000000
86 #define TX3912_INT2_UARTAFRAMEERRINT 0x20000000
87 #define TX3912_INT2_UARTABREAKINT 0x10000000
88 #define TX3912_INT2_UARTAPARITYINT 0x08000000
89 #define TX3912_INT2_UARTATXINT 0x04000000
90 #define TX3912_INT2_UARTATXOVERRUNINT 0x02000000
91 #define TX3912_INT2_UARTAEMPTYINT 0x01000000
92 #define TX3912_INT2_UARTADMAFULLINT 0x00800000
93 #define TX3912_INT2_UARTADMAHALFINT 0x00400000
94 #define TX3912_INT2_UARTBRXINT 0x00200000
95 #define TX3912_INT2_UARTBRXOVERRUNINT 0x00100000
96 #define TX3912_INT2_UARTBFRAMEERRINT 0x00080000
97 #define TX3912_INT2_UARTBBREAKINT 0x00040000
98 #define TX3912_INT2_UARTBPARITYINT 0x00020000
99 #define TX3912_INT2_UARTBTXINT 0x00010000
100 #define TX3912_INT2_UARTBTXOVERRUNINT 0x00008000
101 #define TX3912_INT2_UARTBEMPTYINT 0x00004000
102 #define TX3912_INT2_UARTBDMAFULLINT 0x00002000
103 #define TX3912_INT2_UARTBDMAHALFINT 0x00001000
104 #define TX3912_INT2_UARTA_RX_BITS 0xf8000000
105 #define TX3912_INT2_UARTA_TX_BITS 0x07c00000
106 #define TX3912_INT2_UARTB_RX_BITS 0x003e0000
107 #define TX3912_INT2_UARTB_TX_BITS 0x0001f000
110 * Interrupt 5 register values
112 #define TX3912_INT5_RTCINT 0x80000000
113 #define TX3912_INT5_ALARMINT 0x40000000
114 #define TX3912_INT5_PERINT 0x20000000
115 #define TX3912_INT5_STPTIMERINT 0x10000000
116 #define TX3912_INT5_POSPWRINT 0x08000000
117 #define TX3912_INT5_NEGPWRINT 0x04000000
118 #define TX3912_INT5_POSPWROKINT 0x02000000
119 #define TX3912_INT5_NEGPWROKINT 0x01000000
120 #define TX3912_INT5_POSONBUTINT 0x00800000
121 #define TX3912_INT5_NEGONBUTINT 0x00400000
122 #define TX3912_INT5_SPIBUFAVAILINT 0x00200000
123 #define TX3912_INT5_SPIERRINT 0x00100000
124 #define TX3912_INT5_SPIRCVINT 0x00080000
125 #define TX3912_INT5_SPIEMPTYINT 0x00040000
126 #define TX3912_INT5_IRCONSMINT 0x00020000
127 #define TX3912_INT5_CARSTINT 0x00010000
128 #define TX3912_INT5_POSCARINT 0x00008000
129 #define TX3912_INT5_NEGCARINT 0x00004000
130 #define TX3912_INT5_IOPOSINT6 0x00002000
131 #define TX3912_INT5_IOPOSINT5 0x00001000
132 #define TX3912_INT5_IOPOSINT4 0x00000800
133 #define TX3912_INT5_IOPOSINT3 0x00000400
134 #define TX3912_INT5_IOPOSINT2 0x00000200
135 #define TX3912_INT5_IOPOSINT1 0x00000100
136 #define TX3912_INT5_IOPOSINT0 0x00000080
137 #define TX3912_INT5_IONEGINT6 0x00000040
138 #define TX3912_INT5_IONEGINT5 0x00000020
139 #define TX3912_INT5_IONEGINT4 0x00000010
140 #define TX3912_INT5_IONEGINT3 0x00000008
141 #define TX3912_INT5_IONEGINT2 0x00000004
142 #define TX3912_INT5_IONEGINT1 0x00000002
143 #define TX3912_INT5_IONEGINT0 0x00000001
146 * Interrupt 6 status register values
148 #define TX3912_INT6_STATUS_IRQHIGH 0x80000000
149 #define TX3912_INT6_STATUS_IRQLOW 0x40000000
150 #define TX3912_INT6_STATUS_reserved6 0x3fffffc0
151 #define TX3912_INT6_STATUS_INTVEC_POSNEGPWROKINT 0x0000003c
152 #define TX3912_INT6_STATUS_INTVEC_ALARMINT 0x00000038
153 #define TX3912_INT6_STATUS_INTVEC_PERINT 0x00000034
154 #define TX3912_INT6_STATUS_INTVEC_reserved5 0x00000030
155 #define TX3912_INT6_STATUS_INTVEC_UARTARXINT 0x0000002c
156 #define TX3912_INT6_STATUS_INTVEC_UARTBRXINT 0x00000028
157 #define TX3912_INT6_STATUS_INTVEC_reserved4 0x00000024
158 #define TX3912_INT6_STATUS_INTVEC_IOPOSINT65 0x00000020
159 #define TX3912_INT6_STATUS_INTVEC_reserved3 0x0000001c
160 #define TX3912_INT6_STATUS_INTVEC_IONEGINT65 0x00000018
161 #define TX3912_INT6_STATUS_INTVEC_reserved2 0x00000014
162 #define TX3912_INT6_STATUS_INTVEC_SNDDMACNTINT 0x00000010
163 #define TX3912_INT6_STATUS_INTVEC_TELDMACNTINT 0x0000000c
164 #define TX3912_INT6_STATUS_INTVEC_CHIDMACNTINT 0x00000008
165 #define TX3912_INT6_STATUS_INTVEC_IOPOSNEGINT0 0x00000004
166 #define TX3912_INT6_STATUS_INTVEC_STDHANDLER 0x00000000
167 #define TX3912_INT6_STATUS_reserved1 0x00000003
170 * Interrupt 6 enable register values
172 #define TX3912_INT6_ENABLE_reserved5 0xfff80000
173 #define TX3912_INT6_ENABLE_GLOBALEN 0x00040000
174 #define TX3912_INT6_ENABLE_IRQPRITEST 0x00020000
175 #define TX3912_INT6_ENABLE_IRQTEST 0x00010000
176 #define TX3912_INT6_ENABLE_PRIORITYMASK_POSNEGPWROKINT 0x00008000
177 #define TX3912_INT6_ENABLE_PRIORITYMASK_ALARMINT 0x00004000
178 #define TX3912_INT6_ENABLE_PRIORITYMASK_PERINT 0x00002000
179 #define TX3912_INT6_ENABLE_PRIORITYMASK_reserved4 0x00001000
180 #define TX3912_INT6_ENABLE_PRIORITYMASK_UARTARXINT 0x00000800
181 #define TX3912_INT6_ENABLE_PRIORITYMASK_UARTBRXINT 0x00000400
182 #define TX3912_INT6_ENABLE_PRIORITYMASK_reserved3 0x00000200
183 #define TX3912_INT6_ENABLE_PRIORITYMASK_IOPOSINT65 0x00000100
184 #define TX3912_INT6_ENABLE_PRIORITYMASK_reserved2 0x00000080
185 #define TX3912_INT6_ENABLE_PRIORITYMASK_IONEGINT65 0x00000040
186 #define TX3912_INT6_ENABLE_PRIORITYMASK_reserved1 0x00000020
187 #define TX3912_INT6_ENABLE_PRIORITYMASK_SNDDMACNTINT 0x00000010
188 #define TX3912_INT6_ENABLE_PRIORITYMASK_TELDMACNTINT 0x00000008
189 #define TX3912_INT6_ENABLE_PRIORITYMASK_CHIDMACNTINT 0x00000004
190 #define TX3912_INT6_ENABLE_PRIORITYMASK_IOPOSNEGINT0 0x00000002
191 #define TX3912_INT6_ENABLE_PRIORITYMASK_STDHANDLER 0x00000001
192 #define TX3912_INT6_ENABLE_HIGH_PRIORITY 0x0000ffff
195 /*****************************************************************************
196 * Power Subsystem *
197 * --------------- *
198 * Chapter 11 in Philips PR31700 User Manual *
199 * Chapter 12 in Toshiba TMPR3905/12 User Manual *
200 *****************************************************************************/
201 #define TX3912_POWER_CTRL 0x01c4
204 * Power control register values
206 #define TX3912_POWER_CTRL_ONBUTN 0x80000000
207 #define TX3912_POWER_CTRL_PWRINT 0x40000000
208 #define TX3912_POWER_CTRL_PWROK 0x20000000
209 #define TX3912_POWER_CTRL_VIDRF_MASK 0x18000000
210 #define TX3912_POWER_CTRL_SLOWBUS 0x04000000
211 #define TX3912_POWER_CTRL_DIVMOD 0x02000000
212 #define TX3912_POWER_CTRL_reserved2 0x01ff0000
213 #define TX3912_POWER_CTRL_STPTIMERVAL_MASK 0x0000f000
214 #define TX3912_POWER_CTRL_ENSTPTIMER 0x00000800
215 #define TX3912_POWER_CTRL_ENFORCESHUTDWN 0x00000400
216 #define TX3912_POWER_CTRL_FORCESHUTDWN 0x00000200
217 #define TX3912_POWER_CTRL_FORCESHUTDWNOCC 0x00000100
218 #define TX3912_POWER_CTRL_SELC2MS 0x00000080
219 #define TX3912_POWER_CTRL_reserved1 0x00000040
220 #define TX3912_POWER_CTRL_BPDBVCC3 0x00000020
221 #define TX3912_POWER_CTRL_STOPCPU 0x00000010
222 #define TX3912_POWER_CTRL_DBNCONBUTN 0x00000008
223 #define TX3912_POWER_CTRL_COLDSTART 0x00000004
224 #define TX3912_POWER_CTRL_PWRCS 0x00000002
225 #define TX3912_POWER_CTRL_VCCON 0x00000001
228 /*****************************************************************************
229 * Timer Subsystem *
230 * --------------- *
231 * Chapter 14 in Philips PR31700 User Manual *
232 * Chapter 15 in Toshiba TMPR3905/12 User Manual *
233 *****************************************************************************/
234 #define TX3912_RTC_HIGH 0x0140
235 #define TX3912_RTC_LOW 0x0144
236 #define TX3912_RTC_ALARM_HIGH 0x0148
237 #define TX3912_RTC_ALARM_LOW 0x014c
238 #define TX3912_TIMER_CTRL 0x0150
239 #define TX3912_TIMER_PERIOD 0x0154
242 * Timer control register values
244 #define TX3912_TIMER_CTRL_FREEZEPRE 0x00000080
245 #define TX3912_TIMER_CTRL_FREEZERTC 0x00000040
246 #define TX3912_TIMER_CTRL_FREEZETIMER 0x00000020
247 #define TX3912_TIMER_CTRL_ENPERTIMER 0x00000010
248 #define TX3912_TIMER_CTRL_RTCCLEAR 0x00000008
249 #define TX3912_TIMER_CTRL_TESTC8MS 0x00000004
250 #define TX3912_TIMER_CTRL_ENTESTCLK 0x00000002
251 #define TX3912_TIMER_CTRL_ENRTCTST 0x00000001
254 * The periodic timer has granularity of 868 nanoseconds which
255 * results in a count of (1.152 x 10^6 / 100) in order to achieve
256 * a 10 millisecond periodic system clock.
258 #define TX3912_SYS_TIMER_VALUE (1152000/HZ)
261 /*****************************************************************************
262 * UART Subsystem *
263 * -------------- *
264 * Chapter 15 in Philips PR31700 User Manual *
265 * Chapter 16 in Toshiba TMPR3905/12 User Manual *
266 *****************************************************************************/
267 #define TX3912_UARTA_CTRL1 0x00b0
268 #define TX3912_UARTA_CTRL2 0x00b4
269 #define TX3912_UARTA_DMA_CTRL1 0x00b8
270 #define TX3912_UARTA_DMA_CTRL2 0x00bc
271 #define TX3912_UARTA_DMA_CNT 0x00c0
272 #define TX3912_UARTA_DATA 0x00c4
273 #define TX3912_UARTB_CTRL1 0x00c8
274 #define TX3912_UARTB_CTRL2 0x00cc
275 #define TX3912_UARTB_DMA_CTRL1 0x00d0
276 #define TX3912_UARTB_DMA_CTRL2 0x00d4
277 #define TX3912_UARTB_DMA_CNT 0x00d8
278 #define TX3912_UARTB_DATA 0x00dc
281 * UART Control Register 1 values
283 #define TX3912_UART_CTRL1_UARTON 0x80000000
284 #define TX3912_UART_CTRL1_EMPTY 0x40000000
285 #define TX3912_UART_CTRL1_PRXHOLDFULL 0x20000000
286 #define TX3912_UART_CTRL1_RXHOLDFULL 0x10000000
287 #define TX3912_UART_CTRL1_reserved1 0x0fff0000
288 #define TX3912_UART_CTRL1_ENDMARX 0x00008000
289 #define TX3912_UART_CTRL1_ENDMATX 0x00004000
290 #define TX3912_UART_CTRL1_TESTMODE 0x00002000
291 #define TX3912_UART_CTRL1_ENBREAKHALT 0x00001000
292 #define TX3912_UART_CTRL1_ENDMATEST 0x00000800
293 #define TX3912_UART_CTRL1_ENDMALOOP 0x00000400
294 #define TX3912_UART_CTRL1_PULSEOPT1 0x00000200
295 #define TX3912_UART_CTRL1_PULSEOPT1 0x00000100
296 #define TX3912_UART_CTRL1_DTINVERT 0x00000080
297 #define TX3912_UART_CTRL1_DISTXD 0x00000040
298 #define TX3912_UART_CTRL1_TWOSTOP 0x00000020
299 #define TX3912_UART_CTRL1_LOOPBACK 0x00000010
300 #define TX3912_UART_CTRL1_BIT_7 0x00000008
301 #define TX3912_UART_CTRL1_EVENPARITY 0x00000004
302 #define TX3912_UART_CTRL1_ENPARITY 0x00000002
303 #define TX3912_UART_CTRL1_ENUART 0x00000001
306 * UART Control Register 2 values
308 #define TX3912_UART_CTRL2_B230400 0x0000 /* 0 */
309 #define TX3912_UART_CTRL2_B115200 0x0001 /* 1 */
310 #define TX3912_UART_CTRL2_B76800 0x0002 /* 2 */
311 #define TX3912_UART_CTRL2_B57600 0x0003 /* 3 */
312 #define TX3912_UART_CTRL2_B38400 0x0005 /* 5 */
313 #define TX3912_UART_CTRL2_B19200 0x000b /* 11 */
314 #define TX3912_UART_CTRL2_B9600 0x0016 /* 22 */
315 #define TX3912_UART_CTRL2_B4800 0x002f /* 47 */
316 #define TX3912_UART_CTRL2_B2400 0x005f /* 95 */
317 #define TX3912_UART_CTRL2_B1200 0x00bf /* 191 */
318 #define TX3912_UART_CTRL2_B600 0x017f /* 383 */
319 #define TX3912_UART_CTRL2_B300 0x02ff /* 767 */
321 /*****************************************************************************
322 * Video Subsystem *
323 * --------------- *
324 * Chapter 16 in Philips PR31700 User Manual *
325 * Chapter 17 in Toshiba TMPR3905/12 User Manual *
326 *****************************************************************************/
327 #define TX3912_VIDEO_CTRL1 0x0028
328 #define TX3912_VIDEO_CTRL2 0x002c
329 #define TX3912_VIDEO_CTRL3 0x0030
330 #define TX3912_VIDEO_CTRL4 0x0034
331 #define TX3912_VIDEO_CTRL5 0x0038
332 #define TX3912_VIDEO_CTRL6 0x003c
333 #define TX3912_VIDEO_CTRL7 0x0040
334 #define TX3912_VIDEO_CTRL8 0x0044
335 #define TX3912_VIDEO_CTRL9 0x0048
336 #define TX3912_VIDEO_CTRL10 0x004c
337 #define TX3912_VIDEO_CTRL11 0x0050
338 #define TX3912_VIDEO_CTRL12 0x0054
339 #define TX3912_VIDEO_CTRL13 0x0058
340 #define TX3912_VIDEO_CTRL14 0x005c
343 * Video Control Register 1 values
345 #define TX3912_VIDEO_CTRL1_LINECNT 0xffc00000
346 #define TX3912_VIDEO_CTRL1_LOADDLY 0x00200000
347 #define TX3912_VIDEO_CTRL1_BAUDVAL 0x001f0000
348 #define TX3912_VIDEO_CTRL1_VIDDONEVAL 0x0000fe00
349 #define TX3912_VIDEO_CTRL1_ENFREEZEFRAME 0x00000100
350 #define TX3912_VIDEO_CTRL1_BITSEL_MASK 0x000000c0
351 #define TX3912_VIDEO_CTRL1_BITSEL_8BIT_COLOR 0x000000c0
352 #define TX3912_VIDEO_CTRL1_BITSEL_4BIT_GRAY 0x00000080
353 #define TX3912_VIDEO_CTRL1_BITSEL_2BIT_GRAY 0x00000040
354 #define TX3912_VIDEO_CTRL1_DISPSPLIT 0x00000020
355 #define TX3912_VIDEO_CTRL1_DISP8 0x00000010
356 #define TX3912_VIDEO_CTRL1_DFMODE 0x00000008
357 #define TX3912_VIDEO_CTRL1_INVVID 0x00000004
358 #define TX3912_VIDEO_CTRL1_DISPON 0x00000002
359 #define TX3912_VIDEO_CTRL1_ENVID 0x00000001
361 #endif /* _TX3912_H_ */