From af35a456976cc2822a6ab28ae524c02f7c4062db Mon Sep 17 00:00:00 2001 From: Steve Sakoman Date: Thu, 14 Aug 2008 21:23:11 -0700 Subject: [PATCH] overo: use the same platform.S as beagle --- board/overo/platform.S | 209 ++++++++++++++++--------------------------------- 1 file changed, 67 insertions(+), 142 deletions(-) diff --git a/board/overo/platform.S b/board/overo/platform.S index 8368487..5869270 100644 --- a/board/overo/platform.S +++ b/board/overo/platform.S @@ -174,7 +174,7 @@ lowlevel_init: ldr sp, SRAM_STACK str ip, [sp] /* stash old link register */ mov ip, lr /* save link reg across call */ - bl s_init /* go setup pll,mux,memory */ + bl s_init /* go setup pll,mux,memory */ ldr ip, [sp] /* restore save ip */ mov lr, ip /* restore link reg */ @@ -189,7 +189,6 @@ REG_CONTROL_STATUS: SRAM_STACK: .word LOW_LEVEL_SRAM_STACK - /* DPLL(1-4) PARAM TABLES */ /* Each of the tables has M, N, FREQSEL, M2 values defined for nominal * OPP (1.2V). The fields are defined according to dpll_param struct(clock.c). @@ -199,63 +198,43 @@ SRAM_STACK: mpu_dpll_param: /* 12MHz */ /* ES1 */ -.word 0x0FE -.word 0x07 -.word 0x05 -.word 0x01 +.word 0x0FE,0x07,0x05,0x01 /* ES2 */ -.word 0x0FA -.word 0x05 -.word 0x07 -.word 0x01 +.word 0x0FA,0x05,0x07,0x01 +/* 3410 */ +.word 0x085,0x05,0x07,0x01 /* 13MHz */ /* ES1 */ -.word 0x17D -.word 0x0C -.word 0x03 -.word 0x01 +.word 0x17D,0x0C,0x03,0x01 /* ES2 */ -.word 0x1F4 -.word 0x0C -.word 0x03 -.word 0x01 +.word 0x1F4,0x0C,0x03,0x01 +/* 3410 */ +.word 0x10A,0x0C,0x03,0x01 /* 19.2MHz */ /* ES1 */ -.word 0x179 -.word 0x12 -.word 0x04 -.word 0x01 +.word 0x179,0x12,0x04,0x01 /* ES2 */ -.word 0x271 -.word 0x17 -.word 0x03 -.word 0x01 +.word 0x271,0x17,0x03,0x01 +/* 3410 */ +.word 0x14C,0x17,0x03,0x01 /* 26MHz */ /* ES1 */ -.word 0x17D -.word 0x19 -.word 0x03 -.word 0x01 +.word 0x17D,0x19,0x03,0x01 /* ES2 */ -.word 0x0FA -.word 0x0C -.word 0x07 -.word 0x01 +.word 0x0FA,0x0C,0x07,0x01 +/* 3410 */ +.word 0x085,0x0C,0x07,0x01 /* 38.4MHz */ /* ES1 */ -.word 0x1FA -.word 0x32 -.word 0x03 -.word 0x01 +.word 0x1FA,0x32,0x03,0x01 /* ES2 */ -.word 0x271 -.word 0x2F -.word 0x03 -.word 0x01 +.word 0x271,0x2F,0x03,0x01 +/* 3410 */ +.word 0x14C,0x2F,0x03,0x01 .globl get_mpu_dpll_param @@ -266,63 +245,43 @@ get_mpu_dpll_param: iva_dpll_param: /* 12MHz */ /* ES1 */ -.word 0x07D -.word 0x05 -.word 0x07 -.word 0x01 +.word 0x07D,0x05,0x07,0x01 /* ES2 */ -.word 0x0B4 -.word 0x05 -.word 0x07 -.word 0x01 +.word 0x0B4,0x05,0x07,0x01 +/* 3410 */ +.word 0x085,0x05,0x07,0x01 /* 13MHz */ /* ES1 */ -.word 0x0FA -.word 0x0C -.word 0x03 -.word 0x01 +.word 0x0FA,0x0C,0x03,0x01 /* ES2 */ -.word 0x168 -.word 0x0C -.word 0x03 -.word 0x01 +.word 0x168,0x0C,0x03,0x01 +/* 3410 */ +.word 0x10A,0x0C,0x03,0x01 /* 19.2MHz */ /* ES1 */ -.word 0x082 -.word 0x09 -.word 0x07 -.word 0x01 +.word 0x082,0x09,0x07,0x01 /* ES2 */ -.word 0x0E1 -.word 0x0B -.word 0x06 -.word 0x01 +.word 0x0E1,0x0B,0x06,0x01 +/* 3410 */ +.word 0x14C,0x17,0x03,0x01 /* 26MHz */ /* ES1 */ -.word 0x07D -.word 0x0C -.word 0x07 -.word 0x01 +.word 0x07D,0x0C,0x07,0x01 /* ES2 */ -.word 0x0B4 -.word 0x0C -.word 0x07 -.word 0x01 +.word 0x0B4,0x0C,0x07,0x01 +/* 3410 */ +.word 0x085,0x0C,0x07,0x01 /* 38.4MHz */ /* ES1 */ -.word 0x13F -.word 0x30 -.word 0x03 -.word 0x01 +.word 0x13F,0x30,0x03,0x01 /* ES2 */ -.word 0x0E1 -.word 0x17 -.word 0x06 -.word 0x01 +.word 0x0E1,0x17,0x06,0x01 +/* 3410 */ +.word 0x14C,0x2F,0x03,0x01 .globl get_iva_dpll_param @@ -330,66 +289,47 @@ get_iva_dpll_param: adr r0, iva_dpll_param mov pc, lr +/* Core DPLL targets for L3 at 166 & L133 */ core_dpll_param: /* 12MHz */ /* ES1 */ -.word 0x19F -.word 0x0E -.word 0x03 -.word 0x01 +.word M_12_ES1,M_12_ES1,FSL_12_ES1,M2_12_ES1 /* ES2 */ -.word 0x0A6 -.word 0x05 -.word 0x07 -.word 0x01 +.word M_12,N_12,FSEL_12,M2_12 +/* 3410 */ +.word M_12,N_12,FSEL_12,M2_12 /* 13MHz */ /* ES1 */ -.word 0x1B2 -.word 0x10 -.word 0x03 -.word 0x01 +.word M_13_ES1,N_13_ES1,FSL_13_ES1,M2_13_ES1 /* ES2 */ -.word 0x14C -.word 0x0C -.word 0x03 -.word 0x01 +.word M_13,N_13,FSEL_13,M2_13 +/* 3410 */ +.word M_13,N_13,FSEL_13,M2_13 /* 19.2MHz */ /* ES1 */ -.word 0x19F -.word 0x17 -.word 0x03 -.word 0x01 +.word M_19p2_ES1,N_19p2_ES1,FSL_19p2_ES1,M2_19p2_ES1 /* ES2 */ -.word 0x19F -.word 0x17 -.word 0x03 -.word 0x01 +.word M_19p2,N_19p2,FSEL_19p2,M2_19p2 +/* 3410 */ +.word M_19p2,N_19p2,FSEL_19p2,M2_19p2 /* 26MHz */ /* ES1 */ -.word 0x1B2 -.word 0x21 -.word 0x03 -.word 0x01 +.word M_26_ES1,N_26_ES1,FSL_26_ES1,M2_26_ES1 /* ES2 */ -.word 0x0A6 -.word 0x0C -.word 0x07 -.word 0x01 +.word M_26,N_26,FSEL_26,M2_26 +/* 3410 */ +.word M_26,N_26,FSEL_26,M2_26 /* 38.4MHz */ /* ES1 */ -.word 0x19F -.word 0x2F -.word 0x03 -.word 0x01 +.word M_38p4_ES1,N_38p4_ES1,FSL_38p4_ES1,M2_38p4_ES1 /* ES2 */ -.word 0x19F -.word 0x2F -.word 0x03 -.word 0x01 +.word M_38p4,N_38p4,FSEL_38p4,M2_38p4 +/* 3410 */ +.word M_38p4,N_38p4,FSEL_38p4,M2_38p4 .globl get_core_dpll_param get_core_dpll_param: @@ -399,34 +339,19 @@ get_core_dpll_param: /* PER DPLL values are same for both ES1 and ES2 */ per_dpll_param: /* 12MHz */ -.word 0xD8 -.word 0x05 -.word 0x07 -.word 0x09 +.word 0xD8,0x05,0x07,0x09 /* 13MHz */ -.word 0x1B0 -.word 0x0C -.word 0x03 -.word 0x09 +.word 0x1B0,0x0C,0x03,0x09 /* 19.2MHz */ -.word 0xE1 -.word 0x09 -.word 0x07 -.word 0x09 +.word 0xE1,0x09,0x07,0x09 /* 26MHz */ -.word 0xD8 -.word 0x0C -.word 0x07 -.word 0x09 +.word 0xD8,0x0C,0x07,0x09 /* 38.4MHz */ -.word 0xE1 -.word 0x13 -.word 0x07 -.word 0x09 +.word 0xE1,0x13,0x07,0x09 .globl get_per_dpll_param get_per_dpll_param: -- 2.11.4.GIT