MIPS: Lemote 2F, Malta: Fix build warning
[zen-stable.git] / Documentation / prctl / disable-tsc-on-off-stress-test.c
blob1fcd91445375de646e5ce196452f842e5d4da139
1 /*
2 * Tests for prctl(PR_GET_TSC, ...) / prctl(PR_SET_TSC, ...)
4 * Tests if the control register is updated correctly
5 * when set with prctl()
7 * Warning: this test will cause a very high load for a few seconds
9 */
11 #include <stdio.h>
12 #include <stdlib.h>
13 #include <unistd.h>
14 #include <signal.h>
15 #include <inttypes.h>
16 #include <wait.h>
19 #include <sys/prctl.h>
20 #include <linux/prctl.h>
22 /* Get/set the process' ability to use the timestamp counter instruction */
23 #ifndef PR_GET_TSC
24 #define PR_GET_TSC 25
25 #define PR_SET_TSC 26
26 # define PR_TSC_ENABLE 1 /* allow the use of the timestamp counter */
27 # define PR_TSC_SIGSEGV 2 /* throw a SIGSEGV instead of reading the TSC */
28 #endif
30 /* snippet from wikipedia :-) */
32 uint64_t rdtsc() {
33 uint32_t lo, hi;
34 /* We cannot use "=A", since this would use %rax on x86_64 */
35 __asm__ __volatile__ ("rdtsc" : "=a" (lo), "=d" (hi));
36 return (uint64_t)hi << 32 | lo;
39 int should_segv = 0;
41 void sigsegv_cb(int sig)
43 if (!should_segv)
45 fprintf(stderr, "FATAL ERROR, rdtsc() failed while enabled\n");
46 exit(0);
48 if (prctl(PR_SET_TSC, PR_TSC_ENABLE) < 0)
50 perror("prctl");
51 exit(0);
53 should_segv = 0;
55 rdtsc();
58 void task(void)
60 signal(SIGSEGV, sigsegv_cb);
61 alarm(10);
62 for(;;)
64 rdtsc();
65 if (should_segv)
67 fprintf(stderr, "FATAL ERROR, rdtsc() succeeded while disabled\n");
68 exit(0);
70 if (prctl(PR_SET_TSC, PR_TSC_SIGSEGV) < 0)
72 perror("prctl");
73 exit(0);
75 should_segv = 1;
80 int main(int argc, char **argv)
82 int n_tasks = 100, i;
84 fprintf(stderr, "[No further output means we're allright]\n");
86 for (i=0; i<n_tasks; i++)
87 if (fork() == 0)
88 task();
90 for (i=0; i<n_tasks; i++)
91 wait(NULL);
93 exit(0);