?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
powerpc: use consistent types in mktree
[zen-stable.git] / drivers / media / video / cx23885 / cx23885-cards.c
blobce29b5e34a11329f58e5fca573205d8316876ff7
1 /*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/delay.h>
26 #include <media/cx25840.h>
27
28 #include "cx23885.h"
29 #include "tuner-xc2028.h"
30 #include "netup-init.h"
31
32 /* ------------------------------------------------------------------ */
33 /* board config info */
34
35 struct cx23885_board cx23885_boards[] = {
36 [CX23885_BOARD_UNKNOWN] = {
37 .name = "UNKNOWN/GENERIC",
38 /* Ensure safe default for unknown boards */
39 .clk_freq = 0,
40 .input = {{
41 .type = CX23885_VMUX_COMPOSITE1,
42 .vmux = 0,
43 }, {
44 .type = CX23885_VMUX_COMPOSITE2,
45 .vmux = 1,
46 }, {
47 .type = CX23885_VMUX_COMPOSITE3,
48 .vmux = 2,
49 }, {
50 .type = CX23885_VMUX_COMPOSITE4,
51 .vmux = 3,
52 } },
53 },
54 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
55 .name = "Hauppauge WinTV-HVR1800lp",
56 .portc = CX23885_MPEG_DVB,
57 .input = {{
58 .type = CX23885_VMUX_TELEVISION,
59 .vmux = 0,
60 .gpio0 = 0xff00,
61 }, {
62 .type = CX23885_VMUX_DEBUG,
63 .vmux = 0,
64 .gpio0 = 0xff01,
65 }, {
66 .type = CX23885_VMUX_COMPOSITE1,
67 .vmux = 1,
68 .gpio0 = 0xff02,
69 }, {
70 .type = CX23885_VMUX_SVIDEO,
71 .vmux = 2,
72 .gpio0 = 0xff02,
73 } },
74 },
75 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
76 .name = "Hauppauge WinTV-HVR1800",
77 .porta = CX23885_ANALOG_VIDEO,
78 .portb = CX23885_MPEG_ENCODER,
79 .portc = CX23885_MPEG_DVB,
80 .tuner_type = TUNER_PHILIPS_TDA8290,
81 .tuner_addr = 0x42, /* 0x84 >> 1 */
82 .input = {{
83 .type = CX23885_VMUX_TELEVISION,
84 .vmux = CX25840_VIN7_CH3 |
85 CX25840_VIN5_CH2 |
86 CX25840_VIN2_CH1,
87 .gpio0 = 0,
88 }, {
89 .type = CX23885_VMUX_COMPOSITE1,
90 .vmux = CX25840_VIN7_CH3 |
91 CX25840_VIN4_CH2 |
92 CX25840_VIN6_CH1,
93 .gpio0 = 0,
94 }, {
95 .type = CX23885_VMUX_SVIDEO,
96 .vmux = CX25840_VIN7_CH3 |
97 CX25840_VIN4_CH2 |
98 CX25840_VIN8_CH1 |
99 CX25840_SVIDEO_ON,
100 .gpio0 = 0,
101 } },
102 },
103 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
104 .name = "Hauppauge WinTV-HVR1250",
105 .portc = CX23885_MPEG_DVB,
106 .input = {{
107 .type = CX23885_VMUX_TELEVISION,
108 .vmux = 0,
109 .gpio0 = 0xff00,
110 }, {
111 .type = CX23885_VMUX_DEBUG,
112 .vmux = 0,
113 .gpio0 = 0xff01,
114 }, {
115 .type = CX23885_VMUX_COMPOSITE1,
116 .vmux = 1,
117 .gpio0 = 0xff02,
118 }, {
119 .type = CX23885_VMUX_SVIDEO,
120 .vmux = 2,
121 .gpio0 = 0xff02,
122 } },
123 },
124 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
125 .name = "DViCO FusionHDTV5 Express",
126 .portb = CX23885_MPEG_DVB,
127 },
128 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
129 .name = "Hauppauge WinTV-HVR1500Q",
130 .portc = CX23885_MPEG_DVB,
131 },
132 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
133 .name = "Hauppauge WinTV-HVR1500",
134 .portc = CX23885_MPEG_DVB,
135 },
136 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
137 .name = "Hauppauge WinTV-HVR1200",
138 .portc = CX23885_MPEG_DVB,
139 },
140 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
141 .name = "Hauppauge WinTV-HVR1700",
142 .portc = CX23885_MPEG_DVB,
143 },
144 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
145 .name = "Hauppauge WinTV-HVR1400",
146 .portc = CX23885_MPEG_DVB,
147 },
148 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
149 .name = "DViCO FusionHDTV7 Dual Express",
150 .portb = CX23885_MPEG_DVB,
151 .portc = CX23885_MPEG_DVB,
152 },
153 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
154 .name = "DViCO FusionHDTV DVB-T Dual Express",
155 .portb = CX23885_MPEG_DVB,
156 .portc = CX23885_MPEG_DVB,
157 },
158 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
159 .name = "Leadtek Winfast PxDVR3200 H",
160 .portc = CX23885_MPEG_DVB,
161 },
162 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
163 .name = "Compro VideoMate E650F",
164 .portc = CX23885_MPEG_DVB,
165 },
166 [CX23885_BOARD_TBS_6920] = {
167 .name = "TurboSight TBS 6920",
168 .portb = CX23885_MPEG_DVB,
169 },
170 [CX23885_BOARD_TEVII_S470] = {
171 .name = "TeVii S470",
172 .portb = CX23885_MPEG_DVB,
173 },
174 [CX23885_BOARD_DVBWORLD_2005] = {
175 .name = "DVBWorld DVB-S2 2005",
176 .portb = CX23885_MPEG_DVB,
177 },
178 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
179 .cimax = 1,
180 .name = "NetUP Dual DVB-S2 CI",
181 .portb = CX23885_MPEG_DVB,
182 .portc = CX23885_MPEG_DVB,
183 },
184 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
185 .name = "Hauppauge WinTV-HVR1270",
186 .portc = CX23885_MPEG_DVB,
187 },
188 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
189 .name = "Hauppauge WinTV-HVR1275",
190 .portc = CX23885_MPEG_DVB,
191 },
192 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
193 .name = "Hauppauge WinTV-HVR1255",
194 .portc = CX23885_MPEG_DVB,
195 },
196 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
197 .name = "Hauppauge WinTV-HVR1210",
198 .portc = CX23885_MPEG_DVB,
199 },
200 [CX23885_BOARD_MYGICA_X8506] = {
201 .name = "Mygica X8506 DMB-TH",
202 .portb = CX23885_MPEG_DVB,
203 },
204 };
205 const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
206
207 /* ------------------------------------------------------------------ */
208 /* PCI subsystem IDs */
209
210 struct cx23885_subid cx23885_subids[] = {
211 {
212 .subvendor = 0x0070,
213 .subdevice = 0x3400,
214 .card = CX23885_BOARD_UNKNOWN,
215 }, {
216 .subvendor = 0x0070,
217 .subdevice = 0x7600,
218 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
219 }, {
220 .subvendor = 0x0070,
221 .subdevice = 0x7800,
222 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
223 }, {
224 .subvendor = 0x0070,
225 .subdevice = 0x7801,
226 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
227 }, {
228 .subvendor = 0x0070,
229 .subdevice = 0x7809,
230 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
231 }, {
232 .subvendor = 0x0070,
233 .subdevice = 0x7911,
234 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
235 }, {
236 .subvendor = 0x18ac,
237 .subdevice = 0xd500,
238 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
239 }, {
240 .subvendor = 0x0070,
241 .subdevice = 0x7790,
242 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
243 }, {
244 .subvendor = 0x0070,
245 .subdevice = 0x7797,
246 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
247 }, {
248 .subvendor = 0x0070,
249 .subdevice = 0x7710,
250 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
251 }, {
252 .subvendor = 0x0070,
253 .subdevice = 0x7717,
254 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
255 }, {
256 .subvendor = 0x0070,
257 .subdevice = 0x71d1,
258 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
259 }, {
260 .subvendor = 0x0070,
261 .subdevice = 0x71d3,
262 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
263 }, {
264 .subvendor = 0x0070,
265 .subdevice = 0x8101,
266 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
267 }, {
268 .subvendor = 0x0070,
269 .subdevice = 0x8010,
270 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
271 }, {
272 .subvendor = 0x18ac,
273 .subdevice = 0xd618,
274 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
275 }, {
276 .subvendor = 0x18ac,
277 .subdevice = 0xdb78,
278 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
279 }, {
280 .subvendor = 0x107d,
281 .subdevice = 0x6681,
282 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
283 }, {
284 .subvendor = 0x185b,
285 .subdevice = 0xe800,
286 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
287 }, {
288 .subvendor = 0x6920,
289 .subdevice = 0x8888,
290 .card = CX23885_BOARD_TBS_6920,
291 }, {
292 .subvendor = 0xd470,
293 .subdevice = 0x9022,
294 .card = CX23885_BOARD_TEVII_S470,
295 }, {
296 .subvendor = 0x0001,
297 .subdevice = 0x2005,
298 .card = CX23885_BOARD_DVBWORLD_2005,
299 }, {
300 .subvendor = 0x1b55,
301 .subdevice = 0x2a2c,
302 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
303 }, {
304 .subvendor = 0x0070,
305 .subdevice = 0x2211,
306 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
307 }, {
308 .subvendor = 0x0070,
309 .subdevice = 0x2215,
310 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
311 }, {
312 .subvendor = 0x0070,
313 .subdevice = 0x2251,
314 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
315 }, {
316 .subvendor = 0x0070,
317 .subdevice = 0x2291,
318 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
319 }, {
320 .subvendor = 0x0070,
321 .subdevice = 0x2295,
322 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
323 }, {
324 .subvendor = 0x14f1,
325 .subdevice = 0x8651,
326 .card = CX23885_BOARD_MYGICA_X8506,
327 },
328 };
329 const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
330
331 void cx23885_card_list(struct cx23885_dev *dev)
332 {
333 int i;
334
335 if (0 == dev->pci->subsystem_vendor &&
336 0 == dev->pci->subsystem_device) {
337 printk(KERN_INFO
338 "%s: Board has no valid PCIe Subsystem ID and can't\n"
339 "%s: be autodetected. Pass card=<n> insmod option\n"
340 "%s: to workaround that. Redirect complaints to the\n"
341 "%s: vendor of the TV card. Best regards,\n"
342 "%s: -- tux\n",
343 dev->name, dev->name, dev->name, dev->name, dev->name);
344 } else {
345 printk(KERN_INFO
346 "%s: Your board isn't known (yet) to the driver.\n"
347 "%s: Try to pick one of the existing card configs via\n"
348 "%s: card=<n> insmod option. Updating to the latest\n"
349 "%s: version might help as well.\n",
350 dev->name, dev->name, dev->name, dev->name);
351 }
352 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
353 dev->name);
354 for (i = 0; i < cx23885_bcount; i++)
355 printk(KERN_INFO "%s: card=%d -> %s\n",
356 dev->name, i, cx23885_boards[i].name);
357 }
358
359 static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
360 {
361 struct tveeprom tv;
362
363 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
364 eeprom_data);
365
366 /* Make sure we support the board model */
367 switch (tv.model) {
368 case 22001:
369 /* WinTV-HVR1270 (PCIe, Retail, half height)
370 * ATSC/QAM and basic analog, IR Blast */
371 case 22009:
372 /* WinTV-HVR1210 (PCIe, Retail, half height)
373 * DVB-T and basic analog, IR Blast */
374 case 22011:
375 /* WinTV-HVR1270 (PCIe, Retail, half height)
376 * ATSC/QAM and basic analog, IR Recv */
377 case 22019:
378 /* WinTV-HVR1210 (PCIe, Retail, half height)
379 * DVB-T and basic analog, IR Recv */
380 case 22021:
381 /* WinTV-HVR1275 (PCIe, Retail, half height)
382 * ATSC/QAM and basic analog, IR Recv */
383 case 22029:
384 /* WinTV-HVR1210 (PCIe, Retail, half height)
385 * DVB-T and basic analog, IR Recv */
386 case 22101:
387 /* WinTV-HVR1270 (PCIe, Retail, full height)
388 * ATSC/QAM and basic analog, IR Blast */
389 case 22109:
390 /* WinTV-HVR1210 (PCIe, Retail, full height)
391 * DVB-T and basic analog, IR Blast */
392 case 22111:
393 /* WinTV-HVR1270 (PCIe, Retail, full height)
394 * ATSC/QAM and basic analog, IR Recv */
395 case 22119:
396 /* WinTV-HVR1210 (PCIe, Retail, full height)
397 * DVB-T and basic analog, IR Recv */
398 case 22121:
399 /* WinTV-HVR1275 (PCIe, Retail, full height)
400 * ATSC/QAM and basic analog, IR Recv */
401 case 22129:
402 /* WinTV-HVR1210 (PCIe, Retail, full height)
403 * DVB-T and basic analog, IR Recv */
404 case 71009:
405 /* WinTV-HVR1200 (PCIe, Retail, full height)
406 * DVB-T and basic analog */
407 case 71359:
408 /* WinTV-HVR1200 (PCIe, OEM, half height)
409 * DVB-T and basic analog */
410 case 71439:
411 /* WinTV-HVR1200 (PCIe, OEM, half height)
412 * DVB-T and basic analog */
413 case 71449:
414 /* WinTV-HVR1200 (PCIe, OEM, full height)
415 * DVB-T and basic analog */
416 case 71939:
417 /* WinTV-HVR1200 (PCIe, OEM, half height)
418 * DVB-T and basic analog */
419 case 71949:
420 /* WinTV-HVR1200 (PCIe, OEM, full height)
421 * DVB-T and basic analog */
422 case 71959:
423 /* WinTV-HVR1200 (PCIe, OEM, full height)
424 * DVB-T and basic analog */
425 case 71979:
426 /* WinTV-HVR1200 (PCIe, OEM, half height)
427 * DVB-T and basic analog */
428 case 71999:
429 /* WinTV-HVR1200 (PCIe, OEM, full height)
430 * DVB-T and basic analog */
431 case 76601:
432 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
433 channel ATSC and MPEG2 HW Encoder */
434 case 77001:
435 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
436 and Basic analog */
437 case 77011:
438 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
439 and Basic analog */
440 case 77041:
441 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
442 and Basic analog */
443 case 77051:
444 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
445 and Basic analog */
446 case 78011:
447 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
448 Dual channel ATSC and MPEG2 HW Encoder */
449 case 78501:
450 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
451 Dual channel ATSC and MPEG2 HW Encoder */
452 case 78521:
453 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
454 Dual channel ATSC and MPEG2 HW Encoder */
455 case 78531:
456 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
457 Dual channel ATSC and MPEG2 HW Encoder */
458 case 78631:
459 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
460 Dual channel ATSC and MPEG2 HW Encoder */
461 case 79001:
462 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
463 ATSC and Basic analog */
464 case 79101:
465 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
466 ATSC and Basic analog */
467 case 79561:
468 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
469 ATSC and Basic analog */
470 case 79571:
471 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
472 ATSC and Basic analog */
473 case 79671:
474 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
475 ATSC and Basic analog */
476 case 80019:
477 /* WinTV-HVR1400 (Express Card, Retail, IR,
478 * DVB-T and Basic analog */
479 case 81509:
480 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
481 * DVB-T and MPEG2 HW Encoder */
482 case 81519:
483 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
484 * DVB-T and MPEG2 HW Encoder */
485 break;
486 default:
487 printk(KERN_WARNING "%s: warning: unknown hauppauge model #%d\n",
488 dev->name, tv.model);
489 break;
490 }
491
492 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
493 dev->name, tv.model);
494 }
495
496 int cx23885_tuner_callback(void *priv, int component, int command, int arg)
497 {
498 struct cx23885_tsport *port = priv;
499 struct cx23885_dev *dev = port->dev;
500 u32 bitmask = 0;
501
502 if (command == XC2028_RESET_CLK)
503 return 0;
504
505 if (command != 0) {
506 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
507 __func__, command);
508 return -EINVAL;
509 }
510
511 switch (dev->board) {
512 case CX23885_BOARD_HAUPPAUGE_HVR1400:
513 case CX23885_BOARD_HAUPPAUGE_HVR1500:
514 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
515 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
516 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
517 /* Tuner Reset Command */
518 bitmask = 0x04;
519 break;
520 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
521 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
522 /* Two identical tuners on two different i2c buses,
523 * we need to reset the correct gpio. */
524 if (port->nr == 1)
525 bitmask = 0x01;
526 else if (port->nr == 2)
527 bitmask = 0x04;
528 break;
529 }
530
531 if (bitmask) {
532 /* Drive the tuner into reset and back out */
533 cx_clear(GP0_IO, bitmask);
534 mdelay(200);
535 cx_set(GP0_IO, bitmask);
536 }
537
538 return 0;
539 }
540
541 void cx23885_gpio_setup(struct cx23885_dev *dev)
542 {
543 switch (dev->board) {
544 case CX23885_BOARD_HAUPPAUGE_HVR1250:
545 /* GPIO-0 cx24227 demodulator reset */
546 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
547 break;
548 case CX23885_BOARD_HAUPPAUGE_HVR1500:
549 /* GPIO-0 cx24227 demodulator */
550 /* GPIO-2 xc3028 tuner */
551
552 /* Put the parts into reset */
553 cx_set(GP0_IO, 0x00050000);
554 cx_clear(GP0_IO, 0x00000005);
555 msleep(5);
556
557 /* Bring the parts out of reset */
558 cx_set(GP0_IO, 0x00050005);
559 break;
560 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
561 /* GPIO-0 cx24227 demodulator reset */
562 /* GPIO-2 xc5000 tuner reset */
563 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
564 break;
565 case CX23885_BOARD_HAUPPAUGE_HVR1800:
566 /* GPIO-0 656_CLK */
567 /* GPIO-1 656_D0 */
568 /* GPIO-2 8295A Reset */
569 /* GPIO-3-10 cx23417 data0-7 */
570 /* GPIO-11-14 cx23417 addr0-3 */
571 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
572 /* GPIO-19 IR_RX */
573
574 /* CX23417 GPIO's */
575 /* EIO15 Zilog Reset */
576 /* EIO14 S5H1409/CX24227 Reset */
577
578 /* Force the TDA8295A into reset and back */
579 cx_set(GP0_IO, 0x00040004);
580 mdelay(20);
581 cx_clear(GP0_IO, 0x00000004);
582 mdelay(20);
583 cx_set(GP0_IO, 0x00040004);
584 mdelay(20);
585 break;
586 case CX23885_BOARD_HAUPPAUGE_HVR1200:
587 /* GPIO-0 tda10048 demodulator reset */
588 /* GPIO-2 tda18271 tuner reset */
589
590 /* Put the parts into reset and back */
591 cx_set(GP0_IO, 0x00050000);
592 mdelay(20);
593 cx_clear(GP0_IO, 0x00000005);
594 mdelay(20);
595 cx_set(GP0_IO, 0x00050005);
596 break;
597 case CX23885_BOARD_HAUPPAUGE_HVR1700:
598 /* GPIO-0 TDA10048 demodulator reset */
599 /* GPIO-2 TDA8295A Reset */
600 /* GPIO-3-10 cx23417 data0-7 */
601 /* GPIO-11-14 cx23417 addr0-3 */
602 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
603
604 /* The following GPIO's are on the interna AVCore (cx25840) */
605 /* GPIO-19 IR_RX */
606 /* GPIO-20 IR_TX 416/DVBT Select */
607 /* GPIO-21 IIS DAT */
608 /* GPIO-22 IIS WCLK */
609 /* GPIO-23 IIS BCLK */
610
611 /* Put the parts into reset and back */
612 cx_set(GP0_IO, 0x00050000);
613 mdelay(20);
614 cx_clear(GP0_IO, 0x00000005);
615 mdelay(20);
616 cx_set(GP0_IO, 0x00050005);
617 break;
618 case CX23885_BOARD_HAUPPAUGE_HVR1400:
619 /* GPIO-0 Dibcom7000p demodulator reset */
620 /* GPIO-2 xc3028L tuner reset */
621 /* GPIO-13 LED */
622
623 /* Put the parts into reset and back */
624 cx_set(GP0_IO, 0x00050000);
625 mdelay(20);
626 cx_clear(GP0_IO, 0x00000005);
627 mdelay(20);
628 cx_set(GP0_IO, 0x00050005);
629 break;
630 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
631 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
632 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
633 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
634 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
635
636 /* Put the parts into reset and back */
637 cx_set(GP0_IO, 0x000f0000);
638 mdelay(20);
639 cx_clear(GP0_IO, 0x0000000f);
640 mdelay(20);
641 cx_set(GP0_IO, 0x000f000f);
642 break;
643 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
644 /* GPIO-0 portb xc3028 reset */
645 /* GPIO-1 portb zl10353 reset */
646 /* GPIO-2 portc xc3028 reset */
647 /* GPIO-3 portc zl10353 reset */
648
649 /* Put the parts into reset and back */
650 cx_set(GP0_IO, 0x000f0000);
651 mdelay(20);
652 cx_clear(GP0_IO, 0x0000000f);
653 mdelay(20);
654 cx_set(GP0_IO, 0x000f000f);
655 break;
656 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
657 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
658 /* GPIO-2 xc3028 tuner reset */
659
660 /* The following GPIO's are on the internal AVCore (cx25840) */
661 /* GPIO-? zl10353 demod reset */
662
663 /* Put the parts into reset and back */
664 cx_set(GP0_IO, 0x00040000);
665 mdelay(20);
666 cx_clear(GP0_IO, 0x00000004);
667 mdelay(20);
668 cx_set(GP0_IO, 0x00040004);
669 break;
670 case CX23885_BOARD_TBS_6920:
671 case CX23885_BOARD_TEVII_S470:
672 cx_write(MC417_CTL, 0x00000036);
673 cx_write(MC417_OEN, 0x00001000);
674 cx_write(MC417_RWD, 0x00001800);
675 break;
676 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
677 /* GPIO-0 INTA from CiMax1
678 GPIO-1 INTB from CiMax2
679 GPIO-2 reset chips
680 GPIO-3 to GPIO-10 data/addr for CA
681 GPIO-11 ~CS0 to CiMax1
682 GPIO-12 ~CS1 to CiMax2
683 GPIO-13 ADL0 load LSB addr
684 GPIO-14 ADL1 load MSB addr
685 GPIO-15 ~RDY from CiMax
686 GPIO-17 ~RD to CiMax
687 GPIO-18 ~WR to CiMax
688 */
689 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
690 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
691 cx_clear(GP0_IO, 0x00030004);
692 mdelay(100);/* reset delay */
693 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
694 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
695 /* GPIO-15 IN as ~ACK, rest as OUT */
696 cx_write(MC417_OEN, 0x00001000);
697 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
698 cx_write(MC417_RWD, 0x0000c300);
699 /* enable irq */
700 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
701 break;
702 case CX23885_BOARD_HAUPPAUGE_HVR1270:
703 case CX23885_BOARD_HAUPPAUGE_HVR1275:
704 case CX23885_BOARD_HAUPPAUGE_HVR1255:
705 case CX23885_BOARD_HAUPPAUGE_HVR1210:
706 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
707 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
708 /* GPIO-9 Demod reset */
709
710 /* Put the parts into reset and back */
711 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
712 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
713 cx23885_gpio_clear(dev, GPIO_9);
714 mdelay(20);
715 cx23885_gpio_set(dev, GPIO_9);
716 break;
717 case CX23885_BOARD_MYGICA_X8506:
718 /* GPIO-1 reset XC5000 */
719 /* GPIO-2 reset LGS8GL5 */
720 cx_set(GP0_IO, 0x00060000);
721 cx_clear(GP0_IO, 0x00000006);
722 mdelay(100);
723 cx_set(GP0_IO, 0x00060006);
724 mdelay(100);
725 break;
726 }
727 }
728
729 int cx23885_ir_init(struct cx23885_dev *dev)
730 {
731 switch (dev->board) {
732 case CX23885_BOARD_HAUPPAUGE_HVR1250:
733 case CX23885_BOARD_HAUPPAUGE_HVR1500:
734 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
735 case CX23885_BOARD_HAUPPAUGE_HVR1800:
736 case CX23885_BOARD_HAUPPAUGE_HVR1200:
737 case CX23885_BOARD_HAUPPAUGE_HVR1400:
738 case CX23885_BOARD_HAUPPAUGE_HVR1270:
739 case CX23885_BOARD_HAUPPAUGE_HVR1275:
740 case CX23885_BOARD_HAUPPAUGE_HVR1255:
741 case CX23885_BOARD_HAUPPAUGE_HVR1210:
742 /* FIXME: Implement me */
743 break;
744 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
745 request_module("ir-kbd-i2c");
746 break;
747 }
748
749 return 0;
750 }
751
752 void cx23885_card_setup(struct cx23885_dev *dev)
753 {
754 struct cx23885_tsport *ts1 = &dev->ts1;
755 struct cx23885_tsport *ts2 = &dev->ts2;
756
757 static u8 eeprom[256];
758
759 if (dev->i2c_bus[0].i2c_rc == 0) {
760 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
761 tveeprom_read(&dev->i2c_bus[0].i2c_client,
762 eeprom, sizeof(eeprom));
763 }
764
765 switch (dev->board) {
766 case CX23885_BOARD_HAUPPAUGE_HVR1250:
767 case CX23885_BOARD_HAUPPAUGE_HVR1500:
768 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
769 case CX23885_BOARD_HAUPPAUGE_HVR1400:
770 if (dev->i2c_bus[0].i2c_rc == 0)
771 hauppauge_eeprom(dev, eeprom+0x80);
772 break;
773 case CX23885_BOARD_HAUPPAUGE_HVR1800:
774 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
775 case CX23885_BOARD_HAUPPAUGE_HVR1200:
776 case CX23885_BOARD_HAUPPAUGE_HVR1700:
777 case CX23885_BOARD_HAUPPAUGE_HVR1270:
778 case CX23885_BOARD_HAUPPAUGE_HVR1275:
779 case CX23885_BOARD_HAUPPAUGE_HVR1255:
780 case CX23885_BOARD_HAUPPAUGE_HVR1210:
781 if (dev->i2c_bus[0].i2c_rc == 0)
782 hauppauge_eeprom(dev, eeprom+0xc0);
783 break;
784 }
785
786 switch (dev->board) {
787 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
788 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
789 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
790 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
791 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
792 /* break omitted intentionally */
793 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
794 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
795 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
796 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
797 break;
798 case CX23885_BOARD_HAUPPAUGE_HVR1800:
799 /* Defaults for VID B - Analog encoder */
800 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
801 ts1->gen_ctrl_val = 0x10e;
802 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
803 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
804
805 /* APB_TSVALERR_POL (active low)*/
806 ts1->vld_misc_val = 0x2000;
807 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
808
809 /* Defaults for VID C */
810 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
811 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
812 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
813 break;
814 case CX23885_BOARD_TEVII_S470:
815 case CX23885_BOARD_TBS_6920:
816 case CX23885_BOARD_DVBWORLD_2005:
817 ts1->gen_ctrl_val = 0x5; /* Parallel */
818 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
819 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
820 break;
821 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
822 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
823 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
824 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
825 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
826 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
827 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
828 break;
829 case CX23885_BOARD_MYGICA_X8506:
830 ts1->gen_ctrl_val = 0x5; /* Parallel */
831 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
832 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
833 break;
834 case CX23885_BOARD_HAUPPAUGE_HVR1250:
835 case CX23885_BOARD_HAUPPAUGE_HVR1500:
836 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
837 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
838 case CX23885_BOARD_HAUPPAUGE_HVR1200:
839 case CX23885_BOARD_HAUPPAUGE_HVR1700:
840 case CX23885_BOARD_HAUPPAUGE_HVR1400:
841 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
842 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
843 case CX23885_BOARD_HAUPPAUGE_HVR1270:
844 case CX23885_BOARD_HAUPPAUGE_HVR1275:
845 case CX23885_BOARD_HAUPPAUGE_HVR1255:
846 case CX23885_BOARD_HAUPPAUGE_HVR1210:
847 default:
848 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
849 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
850 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
851 }
852
853 /* Certain boards support analog, or require the avcore to be
854 * loaded, ensure this happens.
855 */
856 switch (dev->board) {
857 case CX23885_BOARD_HAUPPAUGE_HVR1800:
858 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
859 case CX23885_BOARD_HAUPPAUGE_HVR1700:
860 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
861 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
862 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
863 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
864 &dev->i2c_bus[2].i2c_adap,
865 "cx25840", "cx25840", 0x88 >> 1);
866 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
867 break;
868 }
869
870 /* AUX-PLL 27MHz CLK */
871 switch (dev->board) {
872 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
873 netup_initialize(dev);
874 break;
875 }
876 }
877
878 /* ------------------------------------------------------------------ */