drivers/gpu/drm/radeon/rv350d.h

   1 /*
   2  * Copyright 2008 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  * Copyright 2009 Jerome Glisse.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors: Dave Airlie
  25  *          Alex Deucher
  26  *          Jerome Glisse
  27  */
  28 #ifndef __RV350D_H__
  29 #define __RV350D_H__
  30
  31 /* RV350, RV380 registers */
  32 /* #define R_00000D_SCLK_CNTL                           0x00000D */
  33 #define   S_00000D_FORCE_VAP(x)                        (((x) & 0x1) << 21)
  34 #define   G_00000D_FORCE_VAP(x)                        (((x) >> 21) & 0x1)
  35 #define   C_00000D_FORCE_VAP                           0xFFDFFFFF
  36 #define   S_00000D_FORCE_SR(x)                         (((x) & 0x1) << 25)
  37 #define   G_00000D_FORCE_SR(x)                         (((x) >> 25) & 0x1)
  38 #define   C_00000D_FORCE_SR                            0xFDFFFFFF
  39 #define   S_00000D_FORCE_PX(x)                         (((x) & 0x1) << 26)
  40 #define   G_00000D_FORCE_PX(x)                         (((x) >> 26) & 0x1)
  41 #define   C_00000D_FORCE_PX                            0xFBFFFFFF
  42 #define   S_00000D_FORCE_TX(x)                         (((x) & 0x1) << 27)
  43 #define   G_00000D_FORCE_TX(x)                         (((x) >> 27) & 0x1)
  44 #define   C_00000D_FORCE_TX                            0xF7FFFFFF
  45 #define   S_00000D_FORCE_US(x)                         (((x) & 0x1) << 28)
  46 #define   G_00000D_FORCE_US(x)                         (((x) >> 28) & 0x1)
  47 #define   C_00000D_FORCE_US                            0xEFFFFFFF
  48 #define   S_00000D_FORCE_SU(x)                         (((x) & 0x1) << 30)
  49 #define   G_00000D_FORCE_SU(x)                         (((x) >> 30) & 0x1)
  50 #define   C_00000D_FORCE_SU                            0xBFFFFFFF
  51
  52 #endif