nfsd: don't fail unchecked creates of non-special files
[zen-stable.git] / arch / c6x / boot / dts / tms320c6474.dtsi
blobcc601bf348a1e7e5b6d1ce9a0db01a3689e6c2a9
2 / {
3         #address-cells = <1>;
4         #size-cells = <1>;
6         cpus {
7                 #address-cells = <1>;
8                 #size-cells = <0>;
10                 cpu@0 {
11                         device_type = "cpu";
12                         reg = <0>;
13                         model = "ti,c64x+";
14                 };
15                 cpu@1 {
16                         device_type = "cpu";
17                         reg = <1>;
18                         model = "ti,c64x+";
19                 };
20                 cpu@2 {
21                         device_type = "cpu";
22                         reg = <2>;
23                         model = "ti,c64x+";
24                 };
25         };
27         soc {
28                 compatible = "simple-bus";
29                 model = "tms320c6474";
30                 #address-cells = <1>;
31                 #size-cells = <1>;
32                 ranges;
34                 core_pic: interrupt-controller {
35                         interrupt-controller;
36                         #interrupt-cells = <1>;
37                         compatible = "ti,c64x+core-pic";
38                 };
40                 megamod_pic: interrupt-controller@1800000 {
41                        compatible = "ti,c64x+megamod-pic";
42                        interrupt-controller;
43                        #interrupt-cells = <1>;
44                        reg = <0x1800000 0x1000>;
45                        interrupt-parent = <&core_pic>;
46                 };
48                 cache-controller@1840000 {
49                         compatible = "ti,c64x+cache";
50                         reg = <0x01840000 0x8400>;
51                 };
53                 timer3: timer@2940000 {
54                         compatible = "ti,c64x+timer64";
55                         ti,core-mask = < 0x04 >;
56                         reg = <0x2940000 0x40>;
57                 };
59                 timer4: timer@2950000 {
60                         compatible = "ti,c64x+timer64";
61                         ti,core-mask = < 0x02 >;
62                         reg = <0x2950000 0x40>;
63                 };
65                 timer5: timer@2960000 {
66                         compatible = "ti,c64x+timer64";
67                         ti,core-mask = < 0x01 >;
68                         reg = <0x2960000 0x40>;
69                 };
71                 device-state-controller@2880800 {
72                         compatible = "ti,c64x+dscr";
73                         reg = <0x02880800 0x400>;
75                         ti,dscr-devstat = <0x004>;
76                         ti,dscr-silicon-rev = <0x014 28 0xf>;
77                         ti,dscr-mac-fuse-regs = <0x34 3 4 5 6
78                                                  0x38 0 0 1 2>;
79                 };
81                 clock-controller@29a0000 {
82                         compatible = "ti,c6474-pll", "ti,c64x+pll";
83                         reg = <0x029a0000 0x200>;
84                         ti,c64x+pll-bypass-delay = <120>;
85                         ti,c64x+pll-reset-delay = <30000>;
86                         ti,c64x+pll-lock-delay = <60000>;
87                 };
88         };