arch/arm/mach-stmp378x/include/mach/regs-apbx.h

   1 /*
   2  * stmp378x: APBX register definitions
   3  *
   4  * Copyright (c) 2008 Freescale Semiconductor
   5  * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  20  */
  21 #ifndef _MACH_REGS_APBX
  22 #define _MACH_REGS_APBX
  23
  24 #define REGS_APBX_BASE  (STMP3XXX_REGS_BASE + 0x24000)
  25 #define REGS_APBX_PHYS  0x80024000
  26 #define REGS_APBX_SIZE  0x2000
  27
  28 #define HW_APBX_CTRL0           0x0
  29 #define BM_APBX_CTRL0_CLKGATE   0x40000000
  30 #define BM_APBX_CTRL0_SFTRST    0x80000000
  31
  32 #define HW_APBX_CTRL1           0x10
  33
  34 #define HW_APBX_CTRL2           0x20
  35
  36 #define HW_APBX_CHANNEL_CTRL    0x30
  37 #define BM_APBX_CHANNEL_CTRL_RESET_CHANNEL      0xFFFF0000
  38 #define BP_APBX_CHANNEL_CTRL_RESET_CHANNEL      16
  39
  40 #define HW_APBX_DEVSEL          0x40
  41
  42 #define HW_APBX_CH0_NXTCMDAR    (0x110 + 0 * 0x70)
  43 #define HW_APBX_CH1_NXTCMDAR    (0x110 + 1 * 0x70)
  44 #define HW_APBX_CH2_NXTCMDAR    (0x110 + 2 * 0x70)
  45 #define HW_APBX_CH3_NXTCMDAR    (0x110 + 3 * 0x70)
  46 #define HW_APBX_CH4_NXTCMDAR    (0x110 + 4 * 0x70)
  47 #define HW_APBX_CH5_NXTCMDAR    (0x110 + 5 * 0x70)
  48 #define HW_APBX_CH6_NXTCMDAR    (0x110 + 6 * 0x70)
  49 #define HW_APBX_CH7_NXTCMDAR    (0x110 + 7 * 0x70)
  50 #define HW_APBX_CH8_NXTCMDAR    (0x110 + 8 * 0x70)
  51 #define HW_APBX_CH9_NXTCMDAR    (0x110 + 9 * 0x70)
  52 #define HW_APBX_CH10_NXTCMDAR   (0x110 + 10 * 0x70)
  53 #define HW_APBX_CH11_NXTCMDAR   (0x110 + 11 * 0x70)
  54 #define HW_APBX_CH12_NXTCMDAR   (0x110 + 12 * 0x70)
  55 #define HW_APBX_CH13_NXTCMDAR   (0x110 + 13 * 0x70)
  56 #define HW_APBX_CH14_NXTCMDAR   (0x110 + 14 * 0x70)
  57 #define HW_APBX_CH15_NXTCMDAR   (0x110 + 15 * 0x70)
  58
  59 #define HW_APBX_CHn_NXTCMDAR    0x110
  60 #define BM_APBX_CHn_CMD_COMMAND 0x00000003
  61 #define BP_APBX_CHn_CMD_COMMAND 0
  62 #define BV_APBX_CHn_CMD_COMMAND__NO_DMA_XFER     0
  63 #define BV_APBX_CHn_CMD_COMMAND__DMA_WRITE       1
  64 #define BV_APBX_CHn_CMD_COMMAND__DMA_READ        2
  65 #define BV_APBX_CHn_CMD_COMMAND__DMA_SENSE       3
  66 #define BM_APBX_CHn_CMD_CHAIN   0x00000004
  67 #define BM_APBX_CHn_CMD_IRQONCMPLT      0x00000008
  68 #define BM_APBX_CHn_CMD_SEMAPHORE       0x00000040
  69 #define BM_APBX_CHn_CMD_WAIT4ENDCMD     0x00000080
  70 #define BM_APBX_CHn_CMD_HALTONTERMINATE 0x00000100
  71 #define BM_APBX_CHn_CMD_CMDWORDS        0x0000F000
  72 #define BP_APBX_CHn_CMD_CMDWORDS        12
  73 #define BM_APBX_CHn_CMD_XFER_COUNT      0xFFFF0000
  74 #define BP_APBX_CHn_CMD_XFER_COUNT      16
  75
  76 #define HW_APBX_CH0_BAR         (0x130 + 0 * 0x70)
  77 #define HW_APBX_CH1_BAR         (0x130 + 1 * 0x70)
  78 #define HW_APBX_CH2_BAR         (0x130 + 2 * 0x70)
  79 #define HW_APBX_CH3_BAR         (0x130 + 3 * 0x70)
  80 #define HW_APBX_CH4_BAR         (0x130 + 4 * 0x70)
  81 #define HW_APBX_CH5_BAR         (0x130 + 5 * 0x70)
  82 #define HW_APBX_CH6_BAR         (0x130 + 6 * 0x70)
  83 #define HW_APBX_CH7_BAR         (0x130 + 7 * 0x70)
  84 #define HW_APBX_CH8_BAR         (0x130 + 8 * 0x70)
  85 #define HW_APBX_CH9_BAR         (0x130 + 9 * 0x70)
  86 #define HW_APBX_CH10_BAR                (0x130 + 10 * 0x70)
  87 #define HW_APBX_CH11_BAR                (0x130 + 11 * 0x70)
  88 #define HW_APBX_CH12_BAR                (0x130 + 12 * 0x70)
  89 #define HW_APBX_CH13_BAR                (0x130 + 13 * 0x70)
  90 #define HW_APBX_CH14_BAR                (0x130 + 14 * 0x70)
  91 #define HW_APBX_CH15_BAR                (0x130 + 15 * 0x70)
  92
  93 #define HW_APBX_CHn_BAR         0x130
  94
  95 #define HW_APBX_CH0_SEMA        (0x140 + 0 * 0x70)
  96 #define HW_APBX_CH1_SEMA        (0x140 + 1 * 0x70)
  97 #define HW_APBX_CH2_SEMA        (0x140 + 2 * 0x70)
  98 #define HW_APBX_CH3_SEMA        (0x140 + 3 * 0x70)
  99 #define HW_APBX_CH4_SEMA        (0x140 + 4 * 0x70)
 100 #define HW_APBX_CH5_SEMA        (0x140 + 5 * 0x70)
 101 #define HW_APBX_CH6_SEMA        (0x140 + 6 * 0x70)
 102 #define HW_APBX_CH7_SEMA        (0x140 + 7 * 0x70)
 103 #define HW_APBX_CH8_SEMA        (0x140 + 8 * 0x70)
 104 #define HW_APBX_CH9_SEMA        (0x140 + 9 * 0x70)
 105 #define HW_APBX_CH10_SEMA       (0x140 + 10 * 0x70)
 106 #define HW_APBX_CH11_SEMA       (0x140 + 11 * 0x70)
 107 #define HW_APBX_CH12_SEMA       (0x140 + 12 * 0x70)
 108 #define HW_APBX_CH13_SEMA       (0x140 + 13 * 0x70)
 109 #define HW_APBX_CH14_SEMA       (0x140 + 14 * 0x70)
 110 #define HW_APBX_CH15_SEMA       (0x140 + 15 * 0x70)
 111
 112 #define HW_APBX_CHn_SEMA        0x140
 113 #define BM_APBX_CHn_SEMA_INCREMENT_SEMA 0x000000FF
 114 #define BP_APBX_CHn_SEMA_INCREMENT_SEMA 0
 115 #define BM_APBX_CHn_SEMA_PHORE  0x00FF0000
 116 #define BP_APBX_CHn_SEMA_PHORE  16
 117
 118 #endif
 119