drivers/pcmcia/m32r_pcc.h

   1 /*
   2  * Copyright (C) 2001 by Hiroyuki Kondo
   3  */
   4
   5 #define M32R_MAX_PCC    2
   6
   7 /*
   8  * M32R PC Card Controller
   9  */
  10 #define M32R_PCC0_BASE        0x00ef7000
  11 #define M32R_PCC1_BASE        0x00ef7020
  12
  13 /*
  14  * Register offsets
  15  */
  16 #define PCCR            0x00
  17 #define PCADR           0x04
  18 #define PCMOD           0x08
  19 #define PCIRC           0x0c
  20 #define PCCSIGCR        0x10
  21 #define PCATCR          0x14
  22
  23 /*
  24  * PCCR
  25  */
  26 #define PCCR_PCEN       (1UL<<(31-31))
  27
  28 /*
  29  * PCIRC
  30  */
  31 #define PCIRC_BWERR     (1UL<<(31-7))
  32 #define PCIRC_CDIN1     (1UL<<(31-14))
  33 #define PCIRC_CDIN2     (1UL<<(31-15))
  34 #define PCIRC_BEIEN     (1UL<<(31-23))
  35 #define PCIRC_CIIEN     (1UL<<(31-30))
  36 #define PCIRC_COIEN     (1UL<<(31-31))
  37
  38 /*
  39  * PCCSIGCR
  40  */
  41 #define PCCSIGCR_SEN    (1UL<<(31-3))
  42 #define PCCSIGCR_VEN    (1UL<<(31-7))
  43 #define PCCSIGCR_CRST   (1UL<<(31-15))
  44 #define PCCSIGCR_COCR   (1UL<<(31-31))
  45
  46 /*
  47  *
  48  */
  49 #define PCMOD_AS_ATTRIB (1UL<<(31-19))
  50 #define PCMOD_AS_IO     (1UL<<(31-18))
  51
  52 #define PCMOD_CBSZ      (1UL<<(31-23)) /* set for 8bit */
  53
  54 #define PCMOD_DBEX      (1UL<<(31-31)) /* set for excahnge */
  55
  56 /*
  57  * M32R PCC Map addr
  58  */
  59 #define M32R_PCC0_MAPBASE        0x14000000
  60 #define M32R_PCC1_MAPBASE        0x16000000
  61
  62 #define M32R_PCC_MAPMAX          0x02000000
  63
  64 #define M32R_PCC_MAPSIZE         0x00001000 /* XXX */
  65 #define M32R_PCC_MAPMASK        (~(M32R_PCC_MAPMAX-1))