2 * arch/arm/plat-omap/include/mach/sram.h
4 * Interface for functions that need to be run in internal SRAM
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #ifndef __ARCH_ARM_OMAP_SRAM_H
12 #define __ARCH_ARM_OMAP_SRAM_H
15 #include <asm/fncpy.h>
17 extern void *omap_sram_push_address(unsigned long size
);
19 /* Macro to push a function to the internal SRAM, using the fncpy API */
20 #define omap_sram_push(funcp, size) ({ \
21 typeof(&(funcp)) _res = NULL; \
22 void *_sram_address = omap_sram_push_address(size); \
24 _res = fncpy(_sram_address, &(funcp), size); \
28 extern void omap_sram_reprogram_clock(u32 dpllctl
, u32 ckctl
);
30 extern void omap2_sram_ddr_init(u32
*slow_dll_ctrl
, u32 fast_dll_ctrl
,
31 u32 base_cs
, u32 force_unlock
);
32 extern void omap2_sram_reprogram_sdrc(u32 perf_level
, u32 dll_val
,
34 extern u32
omap2_set_prcm(u32 dpll_ctrl_val
, u32 sdrc_rfr_val
, int bypass
);
36 extern u32
omap3_configure_core_dpll(
37 u32 m2
, u32 unlock_dll
, u32 f
, u32 inc
,
38 u32 sdrc_rfr_ctrl_0
, u32 sdrc_actim_ctrl_a_0
,
39 u32 sdrc_actim_ctrl_b_0
, u32 sdrc_mr_0
,
40 u32 sdrc_rfr_ctrl_1
, u32 sdrc_actim_ctrl_a_1
,
41 u32 sdrc_actim_ctrl_b_1
, u32 sdrc_mr_1
);
42 extern void omap3_sram_restore_context(void);
44 /* Do not use these */
45 extern void omap1_sram_reprogram_clock(u32 ckctl
, u32 dpllctl
);
46 extern unsigned long omap1_sram_reprogram_clock_sz
;
48 extern void omap24xx_sram_reprogram_clock(u32 ckctl
, u32 dpllctl
);
49 extern unsigned long omap24xx_sram_reprogram_clock_sz
;
51 extern void omap242x_sram_ddr_init(u32
*slow_dll_ctrl
, u32 fast_dll_ctrl
,
52 u32 base_cs
, u32 force_unlock
);
53 extern unsigned long omap242x_sram_ddr_init_sz
;
55 extern u32
omap242x_sram_set_prcm(u32 dpll_ctrl_val
, u32 sdrc_rfr_val
,
57 extern unsigned long omap242x_sram_set_prcm_sz
;
59 extern void omap242x_sram_reprogram_sdrc(u32 perf_level
, u32 dll_val
,
61 extern unsigned long omap242x_sram_reprogram_sdrc_sz
;
64 extern void omap243x_sram_ddr_init(u32
*slow_dll_ctrl
, u32 fast_dll_ctrl
,
65 u32 base_cs
, u32 force_unlock
);
66 extern unsigned long omap243x_sram_ddr_init_sz
;
68 extern u32
omap243x_sram_set_prcm(u32 dpll_ctrl_val
, u32 sdrc_rfr_val
,
70 extern unsigned long omap243x_sram_set_prcm_sz
;
72 extern void omap243x_sram_reprogram_sdrc(u32 perf_level
, u32 dll_val
,
74 extern unsigned long omap243x_sram_reprogram_sdrc_sz
;
76 extern u32
omap3_sram_configure_core_dpll(
77 u32 m2
, u32 unlock_dll
, u32 f
, u32 inc
,
78 u32 sdrc_rfr_ctrl_0
, u32 sdrc_actim_ctrl_a_0
,
79 u32 sdrc_actim_ctrl_b_0
, u32 sdrc_mr_0
,
80 u32 sdrc_rfr_ctrl_1
, u32 sdrc_actim_ctrl_a_1
,
81 u32 sdrc_actim_ctrl_b_1
, u32 sdrc_mr_1
);
82 extern unsigned long omap3_sram_configure_core_dpll_sz
;
85 extern void omap_push_sram_idle(void);
87 static inline void omap_push_sram_idle(void) {}
88 #endif /* CONFIG_PM */
90 #endif /* __ASSEMBLY__ */
93 * OMAP2+: define the SRAM PA addresses.
94 * Used by the SRAM management code and the idle sleep code.
96 #define OMAP2_SRAM_PA 0x40200000
97 #define OMAP3_SRAM_PA 0x40200000
98 #define OMAP4_SRAM_PA 0x40300000