arch/ia64/kernel/irq.c

   1 /*
   2  *      linux/arch/ia64/kernel/irq.c
   3  *
   4  *      Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
   5  *
   6  * This file contains the code used by various IRQ handling routines:
   7  * asking for different IRQs should be done through these routines
   8  * instead of just grabbing them. Thus setups with different IRQ numbers
   9  * shouldn't result in any weird surprises, and installing new handlers
  10  * should be easier.
  11  *
  12  * Copyright (C) Ashok Raj<ashok.raj@intel.com>, Intel Corporation 2004
  13  *
  14  * 4/14/2004: Added code to handle cpu migration and do safe irq
  15  *                      migration without losing interrupts for iosapic
  16  *                      architecture.
  17  */
  18
  19 #include <asm/delay.h>
  20 #include <asm/uaccess.h>
  21 #include <linux/module.h>
  22 #include <linux/seq_file.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/kernel_stat.h>
  25
  26 /*
  27  * 'what should we do if we get a hw irq event on an illegal vector'.
  28  * each architecture has to answer this themselves.
  29  */
  30 void ack_bad_irq(unsigned int irq)
  31 {
  32         printk(KERN_ERR "Unexpected irq vector 0x%x on CPU %u!\n", irq, smp_processor_id());
  33 }
  34
  35 #ifdef CONFIG_IA64_GENERIC
  36 ia64_vector __ia64_irq_to_vector(int irq)
  37 {
  38         return irq_cfg[irq].vector;
  39 }
  40
  41 unsigned int __ia64_local_vector_to_irq (ia64_vector vec)
  42 {
  43         return __get_cpu_var(vector_irq)[vec];
  44 }
  45 #endif
  46
  47 /*
  48  * Interrupt statistics:
  49  */
  50
  51 atomic_t irq_err_count;
  52
  53 /*
  54  * /proc/interrupts printing:
  55  */
  56 int arch_show_interrupts(struct seq_file *p, int prec)
  57 {
  58         seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
  59         return 0;
  60 }
  61
  62 #ifdef CONFIG_SMP
  63 static char irq_redir [NR_IRQS]; // = { [0 ... NR_IRQS-1] = 1 };
  64
  65 void set_irq_affinity_info (unsigned int irq, int hwid, int redir)
  66 {
  67         if (irq < NR_IRQS) {
  68                 cpumask_copy(irq_get_irq_data(irq)->affinity,
  69                              cpumask_of(cpu_logical_id(hwid)));
  70                 irq_redir[irq] = (char) (redir & 0xff);
  71         }
  72 }
  73
  74 bool is_affinity_mask_valid(const struct cpumask *cpumask)
  75 {
  76         if (ia64_platform_is("sn2")) {
  77                 /* Only allow one CPU to be specified in the smp_affinity mask */
  78                 if (cpumask_weight(cpumask) != 1)
  79                         return false;
  80         }
  81         return true;
  82 }
  83
  84 #endif /* CONFIG_SMP */
  85
  86 #ifdef CONFIG_HOTPLUG_CPU
  87 unsigned int vectors_in_migration[NR_IRQS];
  88
  89 /*
  90  * Since cpu_online_mask is already updated, we just need to check for
  91  * affinity that has zeros
  92  */
  93 static void migrate_irqs(void)
  94 {
  95         int             irq, new_cpu;
  96
  97         for (irq=0; irq < NR_IRQS; irq++) {
  98                 struct irq_desc *desc = irq_to_desc(irq);
  99                 struct irq_data *data = irq_desc_get_irq_data(desc);
 100                 struct irq_chip *chip = irq_data_get_irq_chip(data);
 101
 102                 if (irqd_irq_disabled(data))
 103                         continue;
 104
 105                 /*
 106                  * No handling for now.
 107                  * TBD: Implement a disable function so we can now
 108                  * tell CPU not to respond to these local intr sources.
 109                  * such as ITV,CPEI,MCA etc.
 110                  */
 111                 if (irqd_is_per_cpu(data))
 112                         continue;
 113
 114                 if (cpumask_any_and(data->affinity, cpu_online_mask)
 115                     >= nr_cpu_ids) {
 116                         /*
 117                          * Save it for phase 2 processing
 118                          */
 119                         vectors_in_migration[irq] = irq;
 120
 121                         new_cpu = cpumask_any(cpu_online_mask);
 122
 123                         /*
 124                          * Al three are essential, currently WARN_ON.. maybe panic?
 125                          */
 126                         if (chip && chip->irq_disable &&
 127                                 chip->irq_enable && chip->irq_set_affinity) {
 128                                 chip->irq_disable(data);
 129                                 chip->irq_set_affinity(data,
 130                                                        cpumask_of(new_cpu), false);
 131                                 chip->irq_enable(data);
 132                         } else {
 133                                 WARN_ON((!chip || !chip->irq_disable ||
 134                                          !chip->irq_enable ||
 135                                          !chip->irq_set_affinity));
 136                         }
 137                 }
 138         }
 139 }
 140
 141 void fixup_irqs(void)
 142 {
 143         unsigned int irq;
 144         extern void ia64_process_pending_intr(void);
 145         extern volatile int time_keeper_id;
 146
 147         /* Mask ITV to disable timer */
 148         ia64_set_itv(1 << 16);
 149
 150         /*
 151          * Find a new timesync master
 152          */
 153         if (smp_processor_id() == time_keeper_id) {
 154                 time_keeper_id = cpumask_first(cpu_online_mask);
 155                 printk ("CPU %d is now promoted to time-keeper master\n", time_keeper_id);
 156         }
 157
 158         /*
 159          * Phase 1: Locate IRQs bound to this cpu and
 160          * relocate them for cpu removal.
 161          */
 162         migrate_irqs();
 163
 164         /*
 165          * Phase 2: Perform interrupt processing for all entries reported in
 166          * local APIC.
 167          */
 168         ia64_process_pending_intr();
 169
 170         /*
 171          * Phase 3: Now handle any interrupts not captured in local APIC.
 172          * This is to account for cases that device interrupted during the time the
 173          * rte was being disabled and re-programmed.
 174          */
 175         for (irq=0; irq < NR_IRQS; irq++) {
 176                 if (vectors_in_migration[irq]) {
 177                         struct pt_regs *old_regs = set_irq_regs(NULL);
 178
 179                         vectors_in_migration[irq]=0;
 180                         generic_handle_irq(irq);
 181                         set_irq_regs(old_regs);
 182                 }
 183         }
 184
 185         /*
 186          * Now let processor die. We do irq disable and max_xtp() to
 187          * ensure there is no more interrupts routed to this processor.
 188          * But the local timer interrupt can have 1 pending which we
 189          * take care in timer_interrupt().
 190          */
 191         max_xtp();
 192         local_irq_disable();
 193 }
 194 #endif