drivers/pci/setup-res.c

   1 /*
   2  *      drivers/pci/setup-res.c
   3  *
   4  * Extruded from code written by
   5  *      Dave Rusling (david.rusling@reo.mts.dec.com)
   6  *      David Mosberger (davidm@cs.arizona.edu)
   7  *      David Miller (davem@redhat.com)
   8  *
   9  * Support routines for initializing a PCI subsystem.
  10  */
  11
  12 /* fixed for multiple pci buses, 1999 Andrea Arcangeli <andrea@suse.de> */
  13
  14 /*
  15  * Nov 2000, Ivan Kokshaysky <ink@jurassic.park.msu.ru>
  16  *           Resource sorting
  17  */
  18
  19 #include <linux/init.h>
  20 #include <linux/kernel.h>
  21 #include <linux/export.h>
  22 #include <linux/pci.h>
  23 #include <linux/errno.h>
  24 #include <linux/ioport.h>
  25 #include <linux/cache.h>
  26 #include <linux/slab.h>
  27 #include "pci.h"
  28
  29
  30 void pci_update_resource(struct pci_dev *dev, int resno)
  31 {
  32         struct pci_bus_region region;
  33         u32 new, check, mask;
  34         int reg;
  35         enum pci_bar_type type;
  36         struct resource *res = dev->resource + resno;
  37
  38         /*
  39          * Ignore resources for unimplemented BARs and unused resource slots
  40          * for 64 bit BARs.
  41          */
  42         if (!res->flags)
  43                 return;
  44
  45         /*
  46          * Ignore non-moveable resources.  This might be legacy resources for
  47          * which no functional BAR register exists or another important
  48          * system resource we shouldn't move around.
  49          */
  50         if (res->flags & IORESOURCE_PCI_FIXED)
  51                 return;
  52
  53         pcibios_resource_to_bus(dev, &region, res);
  54
  55         new = region.start | (res->flags & PCI_REGION_FLAG_MASK);
  56         if (res->flags & IORESOURCE_IO)
  57                 mask = (u32)PCI_BASE_ADDRESS_IO_MASK;
  58         else
  59                 mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;
  60
  61         reg = pci_resource_bar(dev, resno, &type);
  62         if (!reg)
  63                 return;
  64         if (type != pci_bar_unknown) {
  65                 if (!(res->flags & IORESOURCE_ROM_ENABLE))
  66                         return;
  67                 new |= PCI_ROM_ADDRESS_ENABLE;
  68         }
  69
  70         pci_write_config_dword(dev, reg, new);
  71         pci_read_config_dword(dev, reg, &check);
  72
  73         if ((new ^ check) & mask) {
  74                 dev_err(&dev->dev, "BAR %d: error updating (%#08x != %#08x)\n",
  75                         resno, new, check);
  76         }
  77
  78         if (res->flags & IORESOURCE_MEM_64) {
  79                 new = region.start >> 16 >> 16;
  80                 pci_write_config_dword(dev, reg + 4, new);
  81                 pci_read_config_dword(dev, reg + 4, &check);
  82                 if (check != new) {
  83                         dev_err(&dev->dev, "BAR %d: error updating "
  84                                "(high %#08x != %#08x)\n", resno, new, check);
  85                 }
  86         }
  87         res->flags &= ~IORESOURCE_UNSET;
  88         dev_dbg(&dev->dev, "BAR %d: set to %pR (PCI address [%#llx-%#llx])\n",
  89                 resno, res, (unsigned long long)region.start,
  90                 (unsigned long long)region.end);
  91 }
  92
  93 int pci_claim_resource(struct pci_dev *dev, int resource)
  94 {
  95         struct resource *res = &dev->resource[resource];
  96         struct resource *root, *conflict;
  97
  98         root = pci_find_parent_resource(dev, res);
  99         if (!root) {
 100                 dev_info(&dev->dev, "no compatible bridge window for %pR\n",
 101                          res);
 102                 return -EINVAL;
 103         }
 104
 105         conflict = request_resource_conflict(root, res);
 106         if (conflict) {
 107                 dev_info(&dev->dev,
 108                          "address space collision: %pR conflicts with %s %pR\n",
 109                          res, conflict->name, conflict);
 110                 return -EBUSY;
 111         }
 112
 113         return 0;
 114 }
 115 EXPORT_SYMBOL(pci_claim_resource);
 116
 117 #ifdef CONFIG_PCI_QUIRKS
 118 void pci_disable_bridge_window(struct pci_dev *dev)
 119 {
 120         dev_info(&dev->dev, "disabling bridge mem windows\n");
 121
 122         /* MMIO Base/Limit */
 123         pci_write_config_dword(dev, PCI_MEMORY_BASE, 0x0000fff0);
 124
 125         /* Prefetchable MMIO Base/Limit */
 126         pci_write_config_dword(dev, PCI_PREF_LIMIT_UPPER32, 0);
 127         pci_write_config_dword(dev, PCI_PREF_MEMORY_BASE, 0x0000fff0);
 128         pci_write_config_dword(dev, PCI_PREF_BASE_UPPER32, 0xffffffff);
 129 }
 130 #endif  /* CONFIG_PCI_QUIRKS */
 131
 132
 133
 134 static int __pci_assign_resource(struct pci_bus *bus, struct pci_dev *dev,
 135                 int resno, resource_size_t size, resource_size_t align)
 136 {
 137         struct resource *res = dev->resource + resno;
 138         resource_size_t min;
 139         int ret;
 140
 141         min = (res->flags & IORESOURCE_IO) ? PCIBIOS_MIN_IO : PCIBIOS_MIN_MEM;
 142
 143         /* First, try exact prefetching match.. */
 144         ret = pci_bus_alloc_resource(bus, res, size, align, min,
 145                                      IORESOURCE_PREFETCH,
 146                                      pcibios_align_resource, dev);
 147
 148         if (ret < 0 && (res->flags & IORESOURCE_PREFETCH)) {
 149                 /*
 150                  * That failed.
 151                  *
 152                  * But a prefetching area can handle a non-prefetching
 153                  * window (it will just not perform as well).
 154                  */
 155                 ret = pci_bus_alloc_resource(bus, res, size, align, min, 0,
 156                                              pcibios_align_resource, dev);
 157         }
 158         return ret;
 159 }
 160
 161 static int pci_revert_fw_address(struct resource *res, struct pci_dev *dev,
 162                 int resno, resource_size_t size)
 163 {
 164         struct resource *root, *conflict;
 165         resource_size_t start, end;
 166         int ret = 0;
 167
 168         if (res->flags & IORESOURCE_IO)
 169                 root = &ioport_resource;
 170         else
 171                 root = &iomem_resource;
 172
 173         start = res->start;
 174         end = res->end;
 175         res->start = dev->fw_addr[resno];
 176         res->end = res->start + size - 1;
 177         dev_info(&dev->dev, "BAR %d: trying firmware assignment %pR\n",
 178                  resno, res);
 179         conflict = request_resource_conflict(root, res);
 180         if (conflict) {
 181                 dev_info(&dev->dev,
 182                          "BAR %d: %pR conflicts with %s %pR\n", resno,
 183                          res, conflict->name, conflict);
 184                 res->start = start;
 185                 res->end = end;
 186                 ret = 1;
 187         }
 188         return ret;
 189 }
 190
 191 static int _pci_assign_resource(struct pci_dev *dev, int resno, int size, resource_size_t min_align)
 192 {
 193         struct resource *res = dev->resource + resno;
 194         struct pci_bus *bus;
 195         int ret;
 196         char *type;
 197
 198         bus = dev->bus;
 199         while ((ret = __pci_assign_resource(bus, dev, resno, size, min_align))) {
 200                 if (!bus->parent || !bus->self->transparent)
 201                         break;
 202                 bus = bus->parent;
 203         }
 204
 205         if (ret) {
 206                 if (res->flags & IORESOURCE_MEM)
 207                         if (res->flags & IORESOURCE_PREFETCH)
 208                                 type = "mem pref";
 209                         else
 210                                 type = "mem";
 211                 else if (res->flags & IORESOURCE_IO)
 212                         type = "io";
 213                 else
 214                         type = "unknown";
 215                 dev_info(&dev->dev,
 216                          "BAR %d: can't assign %s (size %#llx)\n",
 217                          resno, type, (unsigned long long) resource_size(res));
 218         }
 219
 220         return ret;
 221 }
 222
 223 int pci_reassign_resource(struct pci_dev *dev, int resno, resource_size_t addsize,
 224                         resource_size_t min_align)
 225 {
 226         struct resource *res = dev->resource + resno;
 227         resource_size_t new_size;
 228         int ret;
 229
 230         if (!res->parent) {
 231                 dev_info(&dev->dev, "BAR %d: can't reassign an unassigned resouce %pR "
 232                          "\n", resno, res);
 233                 return -EINVAL;
 234         }
 235
 236         new_size = resource_size(res) + addsize + min_align;
 237         ret = _pci_assign_resource(dev, resno, new_size, min_align);
 238         if (!ret) {
 239                 res->flags &= ~IORESOURCE_STARTALIGN;
 240                 dev_info(&dev->dev, "BAR %d: assigned %pR\n", resno, res);
 241                 if (resno < PCI_BRIDGE_RESOURCES)
 242                         pci_update_resource(dev, resno);
 243         }
 244         return ret;
 245 }
 246
 247 int pci_assign_resource(struct pci_dev *dev, int resno)
 248 {
 249         struct resource *res = dev->resource + resno;
 250         resource_size_t align, size;
 251         struct pci_bus *bus;
 252         int ret;
 253
 254         align = pci_resource_alignment(dev, res);
 255         if (!align) {
 256                 dev_info(&dev->dev, "BAR %d: can't assign %pR "
 257                          "(bogus alignment)\n", resno, res);
 258                 return -EINVAL;
 259         }
 260
 261         bus = dev->bus;
 262         size = resource_size(res);
 263         ret = _pci_assign_resource(dev, resno, size, align);
 264
 265         /*
 266          * If we failed to assign anything, let's try the address
 267          * where firmware left it.  That at least has a chance of
 268          * working, which is better than just leaving it disabled.
 269          */
 270         if (ret < 0 && dev->fw_addr[resno])
 271                 ret = pci_revert_fw_address(res, dev, resno, size);
 272
 273         if (!ret) {
 274                 res->flags &= ~IORESOURCE_STARTALIGN;
 275                 dev_info(&dev->dev, "BAR %d: assigned %pR\n", resno, res);
 276                 if (resno < PCI_BRIDGE_RESOURCES)
 277                         pci_update_resource(dev, resno);
 278         }
 279         return ret;
 280 }
 281
 282
 283 /* Sort resources by alignment */
 284 void pdev_sort_resources(struct pci_dev *dev, struct resource_list *head)
 285 {
 286         int i;
 287
 288         for (i = 0; i < PCI_NUM_RESOURCES; i++) {
 289                 struct resource *r;
 290                 struct resource_list *list, *tmp;
 291                 resource_size_t r_align;
 292
 293                 r = &dev->resource[i];
 294
 295                 if (r->flags & IORESOURCE_PCI_FIXED)
 296                         continue;
 297
 298                 if (!(r->flags) || r->parent)
 299                         continue;
 300
 301                 r_align = pci_resource_alignment(dev, r);
 302                 if (!r_align) {
 303                         dev_warn(&dev->dev, "BAR %d: %pR has bogus alignment\n",
 304                                  i, r);
 305                         continue;
 306                 }
 307                 for (list = head; ; list = list->next) {
 308                         resource_size_t align = 0;
 309                         struct resource_list *ln = list->next;
 310
 311                         if (ln)
 312                                 align = pci_resource_alignment(ln->dev, ln->res);
 313
 314                         if (r_align > align) {
 315                                 tmp = kmalloc(sizeof(*tmp), GFP_KERNEL);
 316                                 if (!tmp)
 317                                         panic("pdev_sort_resources(): "
 318                                               "kmalloc() failed!\n");
 319                                 tmp->next = ln;
 320                                 tmp->res = r;
 321                                 tmp->dev = dev;
 322                                 list->next = tmp;
 323                                 break;
 324                         }
 325                 }
 326         }
 327 }
 328
 329 int pci_enable_resources(struct pci_dev *dev, int mask)
 330 {
 331         u16 cmd, old_cmd;
 332         int i;
 333         struct resource *r;
 334
 335         pci_read_config_word(dev, PCI_COMMAND, &cmd);
 336         old_cmd = cmd;
 337
 338         for (i = 0; i < PCI_NUM_RESOURCES; i++) {
 339                 if (!(mask & (1 << i)))
 340                         continue;
 341
 342                 r = &dev->resource[i];
 343
 344                 if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM)))
 345                         continue;
 346                 if ((i == PCI_ROM_RESOURCE) &&
 347                                 (!(r->flags & IORESOURCE_ROM_ENABLE)))
 348                         continue;
 349
 350                 if (!r->parent) {
 351                         dev_err(&dev->dev, "device not available "
 352                                 "(can't reserve %pR)\n", r);
 353                         return -EINVAL;
 354                 }
 355
 356                 if (r->flags & IORESOURCE_IO)
 357                         cmd |= PCI_COMMAND_IO;
 358                 if (r->flags & IORESOURCE_MEM)
 359                         cmd |= PCI_COMMAND_MEMORY;
 360         }
 361
 362         if (cmd != old_cmd) {
 363                 dev_info(&dev->dev, "enabling device (%04x -> %04x)\n",
 364                          old_cmd, cmd);
 365                 pci_write_config_word(dev, PCI_COMMAND, cmd);
 366         }
 367         return 0;
 368 }