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sfc: Don't use enums as a bitmask.
[zen-stable.git] / drivers / hwmon / w83627ehf.c
blobf2b377c56a3acda506e1efb21837bfa7138879de
1 /*
2 w83627ehf - Driver for the hardware monitoring functionality of
3 the Winbond W83627EHF Super-I/O chip
4 Copyright (C) 2005 Jean Delvare <khali@linux-fr.org>
5 Copyright (C) 2006 Yuan Mu (Winbond),
6 Rudolf Marek <r.marek@assembler.cz>
7 David Hubbard <david.c.hubbard@gmail.com>
8 Daniel J Blueman <daniel.blueman@gmail.com>
9 Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
10
11 Shamelessly ripped from the w83627hf driver
12 Copyright (C) 2003 Mark Studebaker
13
14 Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
15 in testing and debugging this driver.
16
17 This driver also supports the W83627EHG, which is the lead-free
18 version of the W83627EHF.
19
20 This program is free software; you can redistribute it and/or modify
21 it under the terms of the GNU General Public License as published by
22 the Free Software Foundation; either version 2 of the License, or
23 (at your option) any later version.
24
25 This program is distributed in the hope that it will be useful,
26 but WITHOUT ANY WARRANTY; without even the implied warranty of
27 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28 GNU General Public License for more details.
29
30 You should have received a copy of the GNU General Public License
31 along with this program; if not, write to the Free Software
32 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33
34
35 Supports the following chips:
36
37 Chip #vin #fan #pwm #temp chip IDs man ID
38 w83627ehf 10 5 4 3 0x8850 0x88 0x5ca3
39 0x8860 0xa1
40 w83627dhg 9 5 4 3 0xa020 0xc1 0x5ca3
41 w83627dhg-p 9 5 4 3 0xb070 0xc1 0x5ca3
42 w83667hg 9 5 3 3 0xa510 0xc1 0x5ca3
43 w83667hg-b 9 5 3 4 0xb350 0xc1 0x5ca3
44 nct6775f 9 4 3 9 0xb470 0xc1 0x5ca3
45 nct6776f 9 5 3 9 0xC330 0xc1 0x5ca3
46 */
47
48 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
49
50 #include <linux/module.h>
51 #include <linux/init.h>
52 #include <linux/slab.h>
53 #include <linux/jiffies.h>
54 #include <linux/platform_device.h>
55 #include <linux/hwmon.h>
56 #include <linux/hwmon-sysfs.h>
57 #include <linux/hwmon-vid.h>
58 #include <linux/err.h>
59 #include <linux/mutex.h>
60 #include <linux/acpi.h>
61 #include <linux/io.h>
62 #include "lm75.h"
63
64 enum kinds { w83627ehf, w83627dhg, w83627dhg_p, w83667hg, w83667hg_b, nct6775,
65 nct6776 };
66
67 /* used to set data->name = w83627ehf_device_names[data->sio_kind] */
68 static const char * const w83627ehf_device_names[] = {
69 "w83627ehf",
70 "w83627dhg",
71 "w83627dhg",
72 "w83667hg",
73 "w83667hg",
74 "nct6775",
75 "nct6776",
76 };
77
78 static unsigned short force_id;
79 module_param(force_id, ushort, 0);
80 MODULE_PARM_DESC(force_id, "Override the detected device ID");
81
82 static unsigned short fan_debounce;
83 module_param(fan_debounce, ushort, 0);
84 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
85
86 #define DRVNAME "w83627ehf"
87
88 /*
89 * Super-I/O constants and functions
90 */
91
92 #define W83627EHF_LD_HWM 0x0b
93 #define W83667HG_LD_VID 0x0d
94
95 #define SIO_REG_LDSEL 0x07 /* Logical device select */
96 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
97 #define SIO_REG_EN_VRM10 0x2C /* GPIO3, GPIO4 selection */
98 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
99 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
100 #define SIO_REG_VID_CTRL 0xF0 /* VID control */
101 #define SIO_REG_VID_DATA 0xF1 /* VID data */
102
103 #define SIO_W83627EHF_ID 0x8850
104 #define SIO_W83627EHG_ID 0x8860
105 #define SIO_W83627DHG_ID 0xa020
106 #define SIO_W83627DHG_P_ID 0xb070
107 #define SIO_W83667HG_ID 0xa510
108 #define SIO_W83667HG_B_ID 0xb350
109 #define SIO_NCT6775_ID 0xb470
110 #define SIO_NCT6776_ID 0xc330
111 #define SIO_ID_MASK 0xFFF0
112
113 static inline void
114 superio_outb(int ioreg, int reg, int val)
115 {
116 outb(reg, ioreg);
117 outb(val, ioreg + 1);
118 }
119
120 static inline int
121 superio_inb(int ioreg, int reg)
122 {
123 outb(reg, ioreg);
124 return inb(ioreg + 1);
125 }
126
127 static inline void
128 superio_select(int ioreg, int ld)
129 {
130 outb(SIO_REG_LDSEL, ioreg);
131 outb(ld, ioreg + 1);
132 }
133
134 static inline void
135 superio_enter(int ioreg)
136 {
137 outb(0x87, ioreg);
138 outb(0x87, ioreg);
139 }
140
141 static inline void
142 superio_exit(int ioreg)
143 {
144 outb(0xaa, ioreg);
145 outb(0x02, ioreg);
146 outb(0x02, ioreg + 1);
147 }
148
149 /*
150 * ISA constants
151 */
152
153 #define IOREGION_ALIGNMENT (~7)
154 #define IOREGION_OFFSET 5
155 #define IOREGION_LENGTH 2
156 #define ADDR_REG_OFFSET 0
157 #define DATA_REG_OFFSET 1
158
159 #define W83627EHF_REG_BANK 0x4E
160 #define W83627EHF_REG_CONFIG 0x40
161
162 /* Not currently used:
163 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
164 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
165 * REG_MAN_ID is at port 0x4f
166 * REG_CHIP_ID is at port 0x58 */
167
168 static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
169 static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };
170
171 /* The W83627EHF registers for nr=7,8,9 are in bank 5 */
172 #define W83627EHF_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
173 (0x554 + (((nr) - 7) * 2)))
174 #define W83627EHF_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
175 (0x555 + (((nr) - 7) * 2)))
176 #define W83627EHF_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
177 (0x550 + (nr) - 7))
178
179 static const u16 W83627EHF_REG_TEMP[] = { 0x27, 0x150, 0x250, 0x7e };
180 static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x3a, 0x153, 0x253, 0 };
181 static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x39, 0x155, 0x255, 0 };
182 static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0, 0x152, 0x252, 0 };
183
184 /* Fan clock dividers are spread over the following five registers */
185 #define W83627EHF_REG_FANDIV1 0x47
186 #define W83627EHF_REG_FANDIV2 0x4B
187 #define W83627EHF_REG_VBAT 0x5D
188 #define W83627EHF_REG_DIODE 0x59
189 #define W83627EHF_REG_SMI_OVT 0x4C
190
191 /* NCT6775F has its own fan divider registers */
192 #define NCT6775_REG_FANDIV1 0x506
193 #define NCT6775_REG_FANDIV2 0x507
194 #define NCT6775_REG_FAN_DEBOUNCE 0xf0
195
196 #define W83627EHF_REG_ALARM1 0x459
197 #define W83627EHF_REG_ALARM2 0x45A
198 #define W83627EHF_REG_ALARM3 0x45B
199
200 /* SmartFan registers */
201 #define W83627EHF_REG_FAN_STEPUP_TIME 0x0f
202 #define W83627EHF_REG_FAN_STEPDOWN_TIME 0x0e
203
204 /* DC or PWM output fan configuration */
205 static const u8 W83627EHF_REG_PWM_ENABLE[] = {
206 0x04, /* SYS FAN0 output mode and PWM mode */
207 0x04, /* CPU FAN0 output mode and PWM mode */
208 0x12, /* AUX FAN mode */
209 0x62, /* CPU FAN1 mode */
210 };
211
212 static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };
213 static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };
214
215 /* FAN Duty Cycle, be used to control */
216 static const u16 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };
217 static const u16 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };
218 static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };
219
220 /* Advanced Fan control, some values are common for all fans */
221 static const u16 W83627EHF_REG_FAN_START_OUTPUT[] = { 0x0a, 0x0b, 0x16, 0x65 };
222 static const u16 W83627EHF_REG_FAN_STOP_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };
223 static const u16 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0c, 0x0d, 0x17, 0x66 };
224
225 static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_COMMON[]
226 = { 0xff, 0x67, 0xff, 0x69 };
227 static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_COMMON[]
228 = { 0xff, 0x68, 0xff, 0x6a };
229
230 static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B[] = { 0x67, 0x69, 0x6b };
231 static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B[]
232 = { 0x68, 0x6a, 0x6c };
233
234 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301 };
235 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302 };
236 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = { 0x105, 0x205, 0x305 };
237 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = { 0x106, 0x206, 0x306 };
238 static const u16 NCT6775_REG_FAN_STOP_TIME[] = { 0x107, 0x207, 0x307 };
239 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309 };
240 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
241 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
242 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
243 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642};
244
245 static const u16 NCT6775_REG_TEMP[]
246 = { 0x27, 0x150, 0x250, 0x73, 0x75, 0x77, 0x62b, 0x62c, 0x62d };
247 static const u16 NCT6775_REG_TEMP_CONFIG[]
248 = { 0, 0x152, 0x252, 0, 0, 0, 0x628, 0x629, 0x62A };
249 static const u16 NCT6775_REG_TEMP_HYST[]
250 = { 0x3a, 0x153, 0x253, 0, 0, 0, 0x673, 0x678, 0x67D };
251 static const u16 NCT6775_REG_TEMP_OVER[]
252 = { 0x39, 0x155, 0x255, 0, 0, 0, 0x672, 0x677, 0x67C };
253 static const u16 NCT6775_REG_TEMP_SOURCE[]
254 = { 0x621, 0x622, 0x623, 0x100, 0x200, 0x300, 0x624, 0x625, 0x626 };
255
256 static const char *const w83667hg_b_temp_label[] = {
257 "SYSTIN",
258 "CPUTIN",
259 "AUXTIN",
260 "AMDTSI",
261 "PECI Agent 1",
262 "PECI Agent 2",
263 "PECI Agent 3",
264 "PECI Agent 4"
265 };
266
267 static const char *const nct6775_temp_label[] = {
268 "",
269 "SYSTIN",
270 "CPUTIN",
271 "AUXTIN",
272 "AMD SB-TSI",
273 "PECI Agent 0",
274 "PECI Agent 1",
275 "PECI Agent 2",
276 "PECI Agent 3",
277 "PECI Agent 4",
278 "PECI Agent 5",
279 "PECI Agent 6",
280 "PECI Agent 7",
281 "PCH_CHIP_CPU_MAX_TEMP",
282 "PCH_CHIP_TEMP",
283 "PCH_CPU_TEMP",
284 "PCH_MCH_TEMP",
285 "PCH_DIM0_TEMP",
286 "PCH_DIM1_TEMP",
287 "PCH_DIM2_TEMP",
288 "PCH_DIM3_TEMP"
289 };
290
291 static const char *const nct6776_temp_label[] = {
292 "",
293 "SYSTIN",
294 "CPUTIN",
295 "AUXTIN",
296 "SMBUSMASTER 0",
297 "SMBUSMASTER 1",
298 "SMBUSMASTER 2",
299 "SMBUSMASTER 3",
300 "SMBUSMASTER 4",
301 "SMBUSMASTER 5",
302 "SMBUSMASTER 6",
303 "SMBUSMASTER 7",
304 "PECI Agent 0",
305 "PECI Agent 1",
306 "PCH_CHIP_CPU_MAX_TEMP",
307 "PCH_CHIP_TEMP",
308 "PCH_CPU_TEMP",
309 "PCH_MCH_TEMP",
310 "PCH_DIM0_TEMP",
311 "PCH_DIM1_TEMP",
312 "PCH_DIM2_TEMP",
313 "PCH_DIM3_TEMP",
314 "BYTE_TEMP"
315 };
316
317 #define NUM_REG_TEMP ARRAY_SIZE(NCT6775_REG_TEMP)
318
319 static inline int is_word_sized(u16 reg)
320 {
321 return ((((reg & 0xff00) == 0x100
322 || (reg & 0xff00) == 0x200)
323 && ((reg & 0x00ff) == 0x50
324 || (reg & 0x00ff) == 0x53
325 || (reg & 0x00ff) == 0x55))
326 || (reg & 0xfff0) == 0x630
327 || reg == 0x640 || reg == 0x642
328 || ((reg & 0xfff0) == 0x650
329 && (reg & 0x000f) >= 0x06)
330 || reg == 0x73 || reg == 0x75 || reg == 0x77
331 );
332 }
333
334 /*
335 * Conversions
336 */
337
338 /* 1 is PWM mode, output in ms */
339 static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
340 {
341 return mode ? 100 * reg : 400 * reg;
342 }
343
344 static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
345 {
346 return SENSORS_LIMIT((mode ? (msec + 50) / 100 :
347 (msec + 200) / 400), 1, 255);
348 }
349
350 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
351 {
352 if (reg == 0 || reg == 255)
353 return 0;
354 return 1350000U / (reg << divreg);
355 }
356
357 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
358 {
359 if ((reg & 0xff1f) == 0xff1f)
360 return 0;
361
362 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
363
364 if (reg == 0)
365 return 0;
366
367 return 1350000U / reg;
368 }
369
370 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
371 {
372 if (reg == 0 || reg == 0xffff)
373 return 0;
374
375 /*
376 * Even though the registers are 16 bit wide, the fan divisor
377 * still applies.
378 */
379 return 1350000U / (reg << divreg);
380 }
381
382 static inline unsigned int
383 div_from_reg(u8 reg)
384 {
385 return 1 << reg;
386 }
387
388 static inline int
389 temp_from_reg(u16 reg, s16 regval)
390 {
391 if (is_word_sized(reg))
392 return LM75_TEMP_FROM_REG(regval);
393 return regval * 1000;
394 }
395
396 static inline u16
397 temp_to_reg(u16 reg, long temp)
398 {
399 if (is_word_sized(reg))
400 return LM75_TEMP_TO_REG(temp);
401 return DIV_ROUND_CLOSEST(SENSORS_LIMIT(temp, -127000, 128000), 1000);
402 }
403
404 /* Some of analog inputs have internal scaling (2x), 8mV is ADC LSB */
405
406 static u8 scale_in[10] = { 8, 8, 16, 16, 8, 8, 8, 16, 16, 8 };
407
408 static inline long in_from_reg(u8 reg, u8 nr)
409 {
410 return reg * scale_in[nr];
411 }
412
413 static inline u8 in_to_reg(u32 val, u8 nr)
414 {
415 return SENSORS_LIMIT(((val + (scale_in[nr] / 2)) / scale_in[nr]), 0,
416 255);
417 }
418
419 /*
420 * Data structures and manipulation thereof
421 */
422
423 struct w83627ehf_data {
424 int addr; /* IO base of hw monitor block */
425 const char *name;
426
427 struct device *hwmon_dev;
428 struct mutex lock;
429
430 u16 reg_temp[NUM_REG_TEMP];
431 u16 reg_temp_over[NUM_REG_TEMP];
432 u16 reg_temp_hyst[NUM_REG_TEMP];
433 u16 reg_temp_config[NUM_REG_TEMP];
434 u8 temp_src[NUM_REG_TEMP];
435 const char * const *temp_label;
436
437 const u16 *REG_PWM;
438 const u16 *REG_TARGET;
439 const u16 *REG_FAN;
440 const u16 *REG_FAN_MIN;
441 const u16 *REG_FAN_START_OUTPUT;
442 const u16 *REG_FAN_STOP_OUTPUT;
443 const u16 *REG_FAN_STOP_TIME;
444 const u16 *REG_FAN_MAX_OUTPUT;
445 const u16 *REG_FAN_STEP_OUTPUT;
446
447 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
448 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
449
450 struct mutex update_lock;
451 char valid; /* !=0 if following fields are valid */
452 unsigned long last_updated; /* In jiffies */
453
454 /* Register values */
455 u8 bank; /* current register bank */
456 u8 in_num; /* number of in inputs we have */
457 u8 in[10]; /* Register value */
458 u8 in_max[10]; /* Register value */
459 u8 in_min[10]; /* Register value */
460 unsigned int rpm[5];
461 u16 fan_min[5];
462 u8 fan_div[5];
463 u8 has_fan; /* some fan inputs can be disabled */
464 u8 has_fan_min; /* some fans don't have min register */
465 bool has_fan_div;
466 u8 temp_type[3];
467 s16 temp[9];
468 s16 temp_max[9];
469 s16 temp_max_hyst[9];
470 u32 alarms;
471
472 u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
473 u8 pwm_enable[4]; /* 1->manual
474 2->thermal cruise mode (also called SmartFan I)
475 3->fan speed cruise mode
476 4->variable thermal cruise (also called
477 SmartFan III)
478 5->enhanced variable thermal cruise (also called
479 SmartFan IV) */
480 u8 pwm_enable_orig[4]; /* original value of pwm_enable */
481 u8 pwm_num; /* number of pwm */
482 u8 pwm[4];
483 u8 target_temp[4];
484 u8 tolerance[4];
485
486 u8 fan_start_output[4]; /* minimum fan speed when spinning up */
487 u8 fan_stop_output[4]; /* minimum fan speed when spinning down */
488 u8 fan_stop_time[4]; /* time at minimum before disabling fan */
489 u8 fan_max_output[4]; /* maximum fan speed */
490 u8 fan_step_output[4]; /* rate of change output value */
491
492 u8 vid;
493 u8 vrm;
494
495 u16 have_temp;
496 u8 in6_skip;
497 };
498
499 struct w83627ehf_sio_data {
500 int sioreg;
501 enum kinds kind;
502 };
503
504 /*
505 * On older chips, only registers 0x50-0x5f are banked.
506 * On more recent chips, all registers are banked.
507 * Assume that is the case and set the bank number for each access.
508 * Cache the bank number so it only needs to be set if it changes.
509 */
510 static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
511 {
512 u8 bank = reg >> 8;
513 if (data->bank != bank) {
514 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
515 outb_p(bank, data->addr + DATA_REG_OFFSET);
516 data->bank = bank;
517 }
518 }
519
520 static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
521 {
522 int res, word_sized = is_word_sized(reg);
523
524 mutex_lock(&data->lock);
525
526 w83627ehf_set_bank(data, reg);
527 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
528 res = inb_p(data->addr + DATA_REG_OFFSET);
529 if (word_sized) {
530 outb_p((reg & 0xff) + 1,
531 data->addr + ADDR_REG_OFFSET);
532 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
533 }
534
535 mutex_unlock(&data->lock);
536 return res;
537 }
538
539 static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg,
540 u16 value)
541 {
542 int word_sized = is_word_sized(reg);
543
544 mutex_lock(&data->lock);
545
546 w83627ehf_set_bank(data, reg);
547 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
548 if (word_sized) {
549 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
550 outb_p((reg & 0xff) + 1,
551 data->addr + ADDR_REG_OFFSET);
552 }
553 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
554
555 mutex_unlock(&data->lock);
556 return 0;
557 }
558
559 /* This function assumes that the caller holds data->update_lock */
560 static void nct6775_write_fan_div(struct w83627ehf_data *data, int nr)
561 {
562 u8 reg;
563
564 switch (nr) {
565 case 0:
566 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
567 | (data->fan_div[0] & 0x7);
568 w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg);
569 break;
570 case 1:
571 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
572 | ((data->fan_div[1] << 4) & 0x70);
573 w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg);
574 case 2:
575 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
576 | (data->fan_div[2] & 0x7);
577 w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg);
578 break;
579 case 3:
580 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
581 | ((data->fan_div[3] << 4) & 0x70);
582 w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg);
583 break;
584 }
585 }
586
587 /* This function assumes that the caller holds data->update_lock */
588 static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
589 {
590 u8 reg;
591
592 switch (nr) {
593 case 0:
594 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
595 | ((data->fan_div[0] & 0x03) << 4);
596 /* fan5 input control bit is write only, compute the value */
597 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
598 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
599 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
600 | ((data->fan_div[0] & 0x04) << 3);
601 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
602 break;
603 case 1:
604 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
605 | ((data->fan_div[1] & 0x03) << 6);
606 /* fan5 input control bit is write only, compute the value */
607 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
608 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
609 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
610 | ((data->fan_div[1] & 0x04) << 4);
611 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
612 break;
613 case 2:
614 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
615 | ((data->fan_div[2] & 0x03) << 6);
616 w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
617 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
618 | ((data->fan_div[2] & 0x04) << 5);
619 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
620 break;
621 case 3:
622 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
623 | (data->fan_div[3] & 0x03);
624 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
625 reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
626 | ((data->fan_div[3] & 0x04) << 5);
627 w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
628 break;
629 case 4:
630 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
631 | ((data->fan_div[4] & 0x03) << 2)
632 | ((data->fan_div[4] & 0x04) << 5);
633 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
634 break;
635 }
636 }
637
638 static void w83627ehf_write_fan_div_common(struct device *dev,
639 struct w83627ehf_data *data, int nr)
640 {
641 struct w83627ehf_sio_data *sio_data = dev->platform_data;
642
643 if (sio_data->kind == nct6776)
644 ; /* no dividers, do nothing */
645 else if (sio_data->kind == nct6775)
646 nct6775_write_fan_div(data, nr);
647 else
648 w83627ehf_write_fan_div(data, nr);
649 }
650
651 static void nct6775_update_fan_div(struct w83627ehf_data *data)
652 {
653 u8 i;
654
655 i = w83627ehf_read_value(data, NCT6775_REG_FANDIV1);
656 data->fan_div[0] = i & 0x7;
657 data->fan_div[1] = (i & 0x70) >> 4;
658 i = w83627ehf_read_value(data, NCT6775_REG_FANDIV2);
659 data->fan_div[2] = i & 0x7;
660 if (data->has_fan & (1<<3))
661 data->fan_div[3] = (i & 0x70) >> 4;
662 }
663
664 static void w83627ehf_update_fan_div(struct w83627ehf_data *data)
665 {
666 int i;
667
668 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
669 data->fan_div[0] = (i >> 4) & 0x03;
670 data->fan_div[1] = (i >> 6) & 0x03;
671 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
672 data->fan_div[2] = (i >> 6) & 0x03;
673 i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
674 data->fan_div[0] |= (i >> 3) & 0x04;
675 data->fan_div[1] |= (i >> 4) & 0x04;
676 data->fan_div[2] |= (i >> 5) & 0x04;
677 if (data->has_fan & ((1 << 3) | (1 << 4))) {
678 i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
679 data->fan_div[3] = i & 0x03;
680 data->fan_div[4] = ((i >> 2) & 0x03)
681 | ((i >> 5) & 0x04);
682 }
683 if (data->has_fan & (1 << 3)) {
684 i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
685 data->fan_div[3] |= (i >> 5) & 0x04;
686 }
687 }
688
689 static void w83627ehf_update_fan_div_common(struct device *dev,
690 struct w83627ehf_data *data)
691 {
692 struct w83627ehf_sio_data *sio_data = dev->platform_data;
693
694 if (sio_data->kind == nct6776)
695 ; /* no dividers, do nothing */
696 else if (sio_data->kind == nct6775)
697 nct6775_update_fan_div(data);
698 else
699 w83627ehf_update_fan_div(data);
700 }
701
702 static void nct6775_update_pwm(struct w83627ehf_data *data)
703 {
704 int i;
705 int pwmcfg, fanmodecfg;
706
707 for (i = 0; i < data->pwm_num; i++) {
708 pwmcfg = w83627ehf_read_value(data,
709 W83627EHF_REG_PWM_ENABLE[i]);
710 fanmodecfg = w83627ehf_read_value(data,
711 NCT6775_REG_FAN_MODE[i]);
712 data->pwm_mode[i] =
713 ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;
714 data->pwm_enable[i] = ((fanmodecfg >> 4) & 7) + 1;
715 data->tolerance[i] = fanmodecfg & 0x0f;
716 data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]);
717 }
718 }
719
720 static void w83627ehf_update_pwm(struct w83627ehf_data *data)
721 {
722 int i;
723 int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
724
725 for (i = 0; i < data->pwm_num; i++) {
726 if (!(data->has_fan & (1 << i)))
727 continue;
728
729 /* pwmcfg, tolerance mapped for i=0, i=1 to same reg */
730 if (i != 1) {
731 pwmcfg = w83627ehf_read_value(data,
732 W83627EHF_REG_PWM_ENABLE[i]);
733 tolerance = w83627ehf_read_value(data,
734 W83627EHF_REG_TOLERANCE[i]);
735 }
736 data->pwm_mode[i] =
737 ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;
738 data->pwm_enable[i] = ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
739 & 3) + 1;
740 data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]);
741
742 data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0)) & 0x0f;
743 }
744 }
745
746 static void w83627ehf_update_pwm_common(struct device *dev,
747 struct w83627ehf_data *data)
748 {
749 struct w83627ehf_sio_data *sio_data = dev->platform_data;
750
751 if (sio_data->kind == nct6775 || sio_data->kind == nct6776)
752 nct6775_update_pwm(data);
753 else
754 w83627ehf_update_pwm(data);
755 }
756
757 static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
758 {
759 struct w83627ehf_data *data = dev_get_drvdata(dev);
760 struct w83627ehf_sio_data *sio_data = dev->platform_data;
761
762 int i;
763
764 mutex_lock(&data->update_lock);
765
766 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
767 || !data->valid) {
768 /* Fan clock dividers */
769 w83627ehf_update_fan_div_common(dev, data);
770
771 /* Measured voltages and limits */
772 for (i = 0; i < data->in_num; i++) {
773 data->in[i] = w83627ehf_read_value(data,
774 W83627EHF_REG_IN(i));
775 data->in_min[i] = w83627ehf_read_value(data,
776 W83627EHF_REG_IN_MIN(i));
777 data->in_max[i] = w83627ehf_read_value(data,
778 W83627EHF_REG_IN_MAX(i));
779 }
780
781 /* Measured fan speeds and limits */
782 for (i = 0; i < 5; i++) {
783 u16 reg;
784
785 if (!(data->has_fan & (1 << i)))
786 continue;
787
788 reg = w83627ehf_read_value(data, data->REG_FAN[i]);
789 data->rpm[i] = data->fan_from_reg(reg,
790 data->fan_div[i]);
791
792 if (data->has_fan_min & (1 << i))
793 data->fan_min[i] = w83627ehf_read_value(data,
794 data->REG_FAN_MIN[i]);
795
796 /* If we failed to measure the fan speed and clock
797 divider can be increased, let's try that for next
798 time */
799 if (data->has_fan_div
800 && (reg >= 0xff || (sio_data->kind == nct6775
801 && reg == 0x00))
802 && data->fan_div[i] < 0x07) {
803 dev_dbg(dev, "Increasing fan%d "
804 "clock divider from %u to %u\n",
805 i + 1, div_from_reg(data->fan_div[i]),
806 div_from_reg(data->fan_div[i] + 1));
807 data->fan_div[i]++;
808 w83627ehf_write_fan_div_common(dev, data, i);
809 /* Preserve min limit if possible */
810 if ((data->has_fan_min & (1 << i))
811 && data->fan_min[i] >= 2
812 && data->fan_min[i] != 255)
813 w83627ehf_write_value(data,
814 data->REG_FAN_MIN[i],
815 (data->fan_min[i] /= 2));
816 }
817 }
818
819 w83627ehf_update_pwm_common(dev, data);
820
821 for (i = 0; i < data->pwm_num; i++) {
822 if (!(data->has_fan & (1 << i)))
823 continue;
824
825 data->fan_start_output[i] =
826 w83627ehf_read_value(data,
827 data->REG_FAN_START_OUTPUT[i]);
828 data->fan_stop_output[i] =
829 w83627ehf_read_value(data,
830 data->REG_FAN_STOP_OUTPUT[i]);
831 data->fan_stop_time[i] =
832 w83627ehf_read_value(data,
833 data->REG_FAN_STOP_TIME[i]);
834
835 if (data->REG_FAN_MAX_OUTPUT &&
836 data->REG_FAN_MAX_OUTPUT[i] != 0xff)
837 data->fan_max_output[i] =
838 w83627ehf_read_value(data,
839 data->REG_FAN_MAX_OUTPUT[i]);
840
841 if (data->REG_FAN_STEP_OUTPUT &&
842 data->REG_FAN_STEP_OUTPUT[i] != 0xff)
843 data->fan_step_output[i] =
844 w83627ehf_read_value(data,
845 data->REG_FAN_STEP_OUTPUT[i]);
846
847 data->target_temp[i] =
848 w83627ehf_read_value(data,
849 data->REG_TARGET[i]) &
850 (data->pwm_mode[i] == 1 ? 0x7f : 0xff);
851 }
852
853 /* Measured temperatures and limits */
854 for (i = 0; i < NUM_REG_TEMP; i++) {
855 if (!(data->have_temp & (1 << i)))
856 continue;
857 data->temp[i] = w83627ehf_read_value(data,
858 data->reg_temp[i]);
859 if (data->reg_temp_over[i])
860 data->temp_max[i]
861 = w83627ehf_read_value(data,
862 data->reg_temp_over[i]);
863 if (data->reg_temp_hyst[i])
864 data->temp_max_hyst[i]
865 = w83627ehf_read_value(data,
866 data->reg_temp_hyst[i]);
867 }
868
869 data->alarms = w83627ehf_read_value(data,
870 W83627EHF_REG_ALARM1) |
871 (w83627ehf_read_value(data,
872 W83627EHF_REG_ALARM2) << 8) |
873 (w83627ehf_read_value(data,
874 W83627EHF_REG_ALARM3) << 16);
875
876 data->last_updated = jiffies;
877 data->valid = 1;
878 }
879
880 mutex_unlock(&data->update_lock);
881 return data;
882 }
883
884 /*
885 * Sysfs callback functions
886 */
887 #define show_in_reg(reg) \
888 static ssize_t \
889 show_##reg(struct device *dev, struct device_attribute *attr, \
890 char *buf) \
891 { \
892 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
893 struct sensor_device_attribute *sensor_attr = \
894 to_sensor_dev_attr(attr); \
895 int nr = sensor_attr->index; \
896 return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr)); \
897 }
898 show_in_reg(in)
899 show_in_reg(in_min)
900 show_in_reg(in_max)
901
902 #define store_in_reg(REG, reg) \
903 static ssize_t \
904 store_in_##reg(struct device *dev, struct device_attribute *attr, \
905 const char *buf, size_t count) \
906 { \
907 struct w83627ehf_data *data = dev_get_drvdata(dev); \
908 struct sensor_device_attribute *sensor_attr = \
909 to_sensor_dev_attr(attr); \
910 int nr = sensor_attr->index; \
911 unsigned long val; \
912 int err; \
913 err = strict_strtoul(buf, 10, &val); \
914 if (err < 0) \
915 return err; \
916 mutex_lock(&data->update_lock); \
917 data->in_##reg[nr] = in_to_reg(val, nr); \
918 w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \
919 data->in_##reg[nr]); \
920 mutex_unlock(&data->update_lock); \
921 return count; \
922 }
923
924 store_in_reg(MIN, min)
925 store_in_reg(MAX, max)
926
927 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
928 char *buf)
929 {
930 struct w83627ehf_data *data = w83627ehf_update_device(dev);
931 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
932 int nr = sensor_attr->index;
933 return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01);
934 }
935
936 static struct sensor_device_attribute sda_in_input[] = {
937 SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
938 SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
939 SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
940 SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
941 SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
942 SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
943 SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
944 SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
945 SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
946 SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
947 };
948
949 static struct sensor_device_attribute sda_in_alarm[] = {
950 SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
951 SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
952 SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
953 SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
954 SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
955 SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21),
956 SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20),
957 SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16),
958 SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17),
959 SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19),
960 };
961
962 static struct sensor_device_attribute sda_in_min[] = {
963 SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
964 SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
965 SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
966 SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
967 SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
968 SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
969 SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
970 SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
971 SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
972 SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
973 };
974
975 static struct sensor_device_attribute sda_in_max[] = {
976 SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
977 SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
978 SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
979 SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
980 SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
981 SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
982 SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
983 SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
984 SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
985 SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
986 };
987
988 static ssize_t
989 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
990 {
991 struct w83627ehf_data *data = w83627ehf_update_device(dev);
992 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
993 int nr = sensor_attr->index;
994 return sprintf(buf, "%d\n", data->rpm[nr]);
995 }
996
997 static ssize_t
998 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
999 {
1000 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1001 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1002 int nr = sensor_attr->index;
1003 return sprintf(buf, "%d\n",
1004 data->fan_from_reg_min(data->fan_min[nr],
1005 data->fan_div[nr]));
1006 }
1007
1008 static ssize_t
1009 show_fan_div(struct device *dev, struct device_attribute *attr,
1010 char *buf)
1011 {
1012 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1013 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1014 int nr = sensor_attr->index;
1015 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1016 }
1017
1018 static ssize_t
1019 store_fan_min(struct device *dev, struct device_attribute *attr,
1020 const char *buf, size_t count)
1021 {
1022 struct w83627ehf_data *data = dev_get_drvdata(dev);
1023 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1024 int nr = sensor_attr->index;
1025 unsigned long val;
1026 int err;
1027 unsigned int reg;
1028 u8 new_div;
1029
1030 err = strict_strtoul(buf, 10, &val);
1031 if (err < 0)
1032 return err;
1033
1034 mutex_lock(&data->update_lock);
1035 if (!data->has_fan_div) {
1036 /*
1037 * Only NCT6776F for now, so we know that this is a 13 bit
1038 * register
1039 */
1040 if (!val) {
1041 val = 0xff1f;
1042 } else {
1043 if (val > 1350000U)
1044 val = 135000U;
1045 val = 1350000U / val;
1046 val = (val & 0x1f) | ((val << 3) & 0xff00);
1047 }
1048 data->fan_min[nr] = val;
1049 goto done; /* Leave fan divider alone */
1050 }
1051 if (!val) {
1052 /* No min limit, alarm disabled */
1053 data->fan_min[nr] = 255;
1054 new_div = data->fan_div[nr]; /* No change */
1055 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1056 } else if ((reg = 1350000U / val) >= 128 * 255) {
1057 /* Speed below this value cannot possibly be represented,
1058 even with the highest divider (128) */
1059 data->fan_min[nr] = 254;
1060 new_div = 7; /* 128 == (1 << 7) */
1061 dev_warn(dev, "fan%u low limit %lu below minimum %u, set to "
1062 "minimum\n", nr + 1, val,
1063 data->fan_from_reg_min(254, 7));
1064 } else if (!reg) {
1065 /* Speed above this value cannot possibly be represented,
1066 even with the lowest divider (1) */
1067 data->fan_min[nr] = 1;
1068 new_div = 0; /* 1 == (1 << 0) */
1069 dev_warn(dev, "fan%u low limit %lu above maximum %u, set to "
1070 "maximum\n", nr + 1, val,
1071 data->fan_from_reg_min(1, 0));
1072 } else {
1073 /* Automatically pick the best divider, i.e. the one such
1074 that the min limit will correspond to a register value
1075 in the 96..192 range */
1076 new_div = 0;
1077 while (reg > 192 && new_div < 7) {
1078 reg >>= 1;
1079 new_div++;
1080 }
1081 data->fan_min[nr] = reg;
1082 }
1083
1084 /* Write both the fan clock divider (if it changed) and the new
1085 fan min (unconditionally) */
1086 if (new_div != data->fan_div[nr]) {
1087 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1088 nr + 1, div_from_reg(data->fan_div[nr]),
1089 div_from_reg(new_div));
1090 data->fan_div[nr] = new_div;
1091 w83627ehf_write_fan_div_common(dev, data, nr);
1092 /* Give the chip time to sample a new speed value */
1093 data->last_updated = jiffies;
1094 }
1095 done:
1096 w83627ehf_write_value(data, data->REG_FAN_MIN[nr],
1097 data->fan_min[nr]);
1098 mutex_unlock(&data->update_lock);
1099
1100 return count;
1101 }
1102
1103 static struct sensor_device_attribute sda_fan_input[] = {
1104 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
1105 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
1106 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
1107 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
1108 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
1109 };
1110
1111 static struct sensor_device_attribute sda_fan_alarm[] = {
1112 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
1113 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
1114 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
1115 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),
1116 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),
1117 };
1118
1119 static struct sensor_device_attribute sda_fan_min[] = {
1120 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
1121 store_fan_min, 0),
1122 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
1123 store_fan_min, 1),
1124 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
1125 store_fan_min, 2),
1126 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
1127 store_fan_min, 3),
1128 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
1129 store_fan_min, 4),
1130 };
1131
1132 static struct sensor_device_attribute sda_fan_div[] = {
1133 SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
1134 SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
1135 SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
1136 SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
1137 SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
1138 };
1139
1140 static ssize_t
1141 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1142 {
1143 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1144 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1145 int nr = sensor_attr->index;
1146 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1147 }
1148
1149 #define show_temp_reg(addr, reg) \
1150 static ssize_t \
1151 show_##reg(struct device *dev, struct device_attribute *attr, \
1152 char *buf) \
1153 { \
1154 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1155 struct sensor_device_attribute *sensor_attr = \
1156 to_sensor_dev_attr(attr); \
1157 int nr = sensor_attr->index; \
1158 return sprintf(buf, "%d\n", \
1159 temp_from_reg(data->addr[nr], data->reg[nr])); \
1160 }
1161 show_temp_reg(reg_temp, temp);
1162 show_temp_reg(reg_temp_over, temp_max);
1163 show_temp_reg(reg_temp_hyst, temp_max_hyst);
1164
1165 #define store_temp_reg(addr, reg) \
1166 static ssize_t \
1167 store_##reg(struct device *dev, struct device_attribute *attr, \
1168 const char *buf, size_t count) \
1169 { \
1170 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1171 struct sensor_device_attribute *sensor_attr = \
1172 to_sensor_dev_attr(attr); \
1173 int nr = sensor_attr->index; \
1174 int err; \
1175 long val; \
1176 err = strict_strtol(buf, 10, &val); \
1177 if (err < 0) \
1178 return err; \
1179 mutex_lock(&data->update_lock); \
1180 data->reg[nr] = temp_to_reg(data->addr[nr], val); \
1181 w83627ehf_write_value(data, data->addr[nr], \
1182 data->reg[nr]); \
1183 mutex_unlock(&data->update_lock); \
1184 return count; \
1185 }
1186 store_temp_reg(reg_temp_over, temp_max);
1187 store_temp_reg(reg_temp_hyst, temp_max_hyst);
1188
1189 static ssize_t
1190 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1191 {
1192 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1193 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1194 int nr = sensor_attr->index;
1195 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1196 }
1197
1198 static struct sensor_device_attribute sda_temp_input[] = {
1199 SENSOR_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0),
1200 SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1),
1201 SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2),
1202 SENSOR_ATTR(temp4_input, S_IRUGO, show_temp, NULL, 3),
1203 SENSOR_ATTR(temp5_input, S_IRUGO, show_temp, NULL, 4),
1204 SENSOR_ATTR(temp6_input, S_IRUGO, show_temp, NULL, 5),
1205 SENSOR_ATTR(temp7_input, S_IRUGO, show_temp, NULL, 6),
1206 SENSOR_ATTR(temp8_input, S_IRUGO, show_temp, NULL, 7),
1207 SENSOR_ATTR(temp9_input, S_IRUGO, show_temp, NULL, 8),
1208 };
1209
1210 static struct sensor_device_attribute sda_temp_label[] = {
1211 SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
1212 SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
1213 SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
1214 SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
1215 SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
1216 SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
1217 SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),
1218 SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),
1219 SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),
1220 };
1221
1222 static struct sensor_device_attribute sda_temp_max[] = {
1223 SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp_max,
1224 store_temp_max, 0),
1225 SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max,
1226 store_temp_max, 1),
1227 SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max,
1228 store_temp_max, 2),
1229 SENSOR_ATTR(temp4_max, S_IRUGO | S_IWUSR, show_temp_max,
1230 store_temp_max, 3),
1231 SENSOR_ATTR(temp5_max, S_IRUGO | S_IWUSR, show_temp_max,
1232 store_temp_max, 4),
1233 SENSOR_ATTR(temp6_max, S_IRUGO | S_IWUSR, show_temp_max,
1234 store_temp_max, 5),
1235 SENSOR_ATTR(temp7_max, S_IRUGO | S_IWUSR, show_temp_max,
1236 store_temp_max, 6),
1237 SENSOR_ATTR(temp8_max, S_IRUGO | S_IWUSR, show_temp_max,
1238 store_temp_max, 7),
1239 SENSOR_ATTR(temp9_max, S_IRUGO | S_IWUSR, show_temp_max,
1240 store_temp_max, 8),
1241 };
1242
1243 static struct sensor_device_attribute sda_temp_max_hyst[] = {
1244 SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1245 store_temp_max_hyst, 0),
1246 SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1247 store_temp_max_hyst, 1),
1248 SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1249 store_temp_max_hyst, 2),
1250 SENSOR_ATTR(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1251 store_temp_max_hyst, 3),
1252 SENSOR_ATTR(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1253 store_temp_max_hyst, 4),
1254 SENSOR_ATTR(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1255 store_temp_max_hyst, 5),
1256 SENSOR_ATTR(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1257 store_temp_max_hyst, 6),
1258 SENSOR_ATTR(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1259 store_temp_max_hyst, 7),
1260 SENSOR_ATTR(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1261 store_temp_max_hyst, 8),
1262 };
1263
1264 static struct sensor_device_attribute sda_temp_alarm[] = {
1265 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
1266 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
1267 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
1268 };
1269
1270 static struct sensor_device_attribute sda_temp_type[] = {
1271 SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0),
1272 SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1),
1273 SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2),
1274 };
1275
1276 #define show_pwm_reg(reg) \
1277 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1278 char *buf) \
1279 { \
1280 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1281 struct sensor_device_attribute *sensor_attr = \
1282 to_sensor_dev_attr(attr); \
1283 int nr = sensor_attr->index; \
1284 return sprintf(buf, "%d\n", data->reg[nr]); \
1285 }
1286
1287 show_pwm_reg(pwm_mode)
1288 show_pwm_reg(pwm_enable)
1289 show_pwm_reg(pwm)
1290
1291 static ssize_t
1292 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1293 const char *buf, size_t count)
1294 {
1295 struct w83627ehf_data *data = dev_get_drvdata(dev);
1296 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1297 int nr = sensor_attr->index;
1298 unsigned long val;
1299 int err;
1300 u16 reg;
1301
1302 err = strict_strtoul(buf, 10, &val);
1303 if (err < 0)
1304 return err;
1305
1306 if (val > 1)
1307 return -EINVAL;
1308 mutex_lock(&data->update_lock);
1309 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
1310 data->pwm_mode[nr] = val;
1311 reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);
1312 if (!val)
1313 reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];
1314 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
1315 mutex_unlock(&data->update_lock);
1316 return count;
1317 }
1318
1319 static ssize_t
1320 store_pwm(struct device *dev, struct device_attribute *attr,
1321 const char *buf, size_t count)
1322 {
1323 struct w83627ehf_data *data = dev_get_drvdata(dev);
1324 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1325 int nr = sensor_attr->index;
1326 unsigned long val;
1327 int err;
1328
1329 err = strict_strtoul(buf, 10, &val);
1330 if (err < 0)
1331 return err;
1332
1333 val = SENSORS_LIMIT(val, 0, 255);
1334
1335 mutex_lock(&data->update_lock);
1336 data->pwm[nr] = val;
1337 w83627ehf_write_value(data, data->REG_PWM[nr], val);
1338 mutex_unlock(&data->update_lock);
1339 return count;
1340 }
1341
1342 static ssize_t
1343 store_pwm_enable(struct device *dev, struct device_attribute *attr,
1344 const char *buf, size_t count)
1345 {
1346 struct w83627ehf_data *data = dev_get_drvdata(dev);
1347 struct w83627ehf_sio_data *sio_data = dev->platform_data;
1348 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1349 int nr = sensor_attr->index;
1350 unsigned long val;
1351 int err;
1352 u16 reg;
1353
1354 err = strict_strtoul(buf, 10, &val);
1355 if (err < 0)
1356 return err;
1357
1358 if (!val || (val > 4 && val != data->pwm_enable_orig[nr]))
1359 return -EINVAL;
1360 /* SmartFan III mode is not supported on NCT6776F */
1361 if (sio_data->kind == nct6776 && val == 4)
1362 return -EINVAL;
1363
1364 mutex_lock(&data->update_lock);
1365 data->pwm_enable[nr] = val;
1366 if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1367 reg = w83627ehf_read_value(data,
1368 NCT6775_REG_FAN_MODE[nr]);
1369 reg &= 0x0f;
1370 reg |= (val - 1) << 4;
1371 w83627ehf_write_value(data,
1372 NCT6775_REG_FAN_MODE[nr], reg);
1373 } else {
1374 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
1375 reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);
1376 reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];
1377 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
1378 }
1379 mutex_unlock(&data->update_lock);
1380 return count;
1381 }
1382
1383
1384 #define show_tol_temp(reg) \
1385 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1386 char *buf) \
1387 { \
1388 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1389 struct sensor_device_attribute *sensor_attr = \
1390 to_sensor_dev_attr(attr); \
1391 int nr = sensor_attr->index; \
1392 return sprintf(buf, "%d\n", data->reg[nr] * 1000); \
1393 }
1394
1395 show_tol_temp(tolerance)
1396 show_tol_temp(target_temp)
1397
1398 static ssize_t
1399 store_target_temp(struct device *dev, struct device_attribute *attr,
1400 const char *buf, size_t count)
1401 {
1402 struct w83627ehf_data *data = dev_get_drvdata(dev);
1403 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1404 int nr = sensor_attr->index;
1405 long val;
1406 int err;
1407
1408 err = strict_strtol(buf, 10, &val);
1409 if (err < 0)
1410 return err;
1411
1412 val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 127);
1413
1414 mutex_lock(&data->update_lock);
1415 data->target_temp[nr] = val;
1416 w83627ehf_write_value(data, data->REG_TARGET[nr], val);
1417 mutex_unlock(&data->update_lock);
1418 return count;
1419 }
1420
1421 static ssize_t
1422 store_tolerance(struct device *dev, struct device_attribute *attr,
1423 const char *buf, size_t count)
1424 {
1425 struct w83627ehf_data *data = dev_get_drvdata(dev);
1426 struct w83627ehf_sio_data *sio_data = dev->platform_data;
1427 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1428 int nr = sensor_attr->index;
1429 u16 reg;
1430 long val;
1431 int err;
1432
1433 err = strict_strtol(buf, 10, &val);
1434 if (err < 0)
1435 return err;
1436
1437 /* Limit the temp to 0C - 15C */
1438 val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 15);
1439
1440 mutex_lock(&data->update_lock);
1441 if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1442 /* Limit tolerance further for NCT6776F */
1443 if (sio_data->kind == nct6776 && val > 7)
1444 val = 7;
1445 reg = w83627ehf_read_value(data, NCT6775_REG_FAN_MODE[nr]);
1446 reg = (reg & 0xf0) | val;
1447 w83627ehf_write_value(data, NCT6775_REG_FAN_MODE[nr], reg);
1448 } else {
1449 reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
1450 if (nr == 1)
1451 reg = (reg & 0x0f) | (val << 4);
1452 else
1453 reg = (reg & 0xf0) | val;
1454 w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
1455 }
1456 data->tolerance[nr] = val;
1457 mutex_unlock(&data->update_lock);
1458 return count;
1459 }
1460
1461 static struct sensor_device_attribute sda_pwm[] = {
1462 SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
1463 SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
1464 SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
1465 SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),
1466 };
1467
1468 static struct sensor_device_attribute sda_pwm_mode[] = {
1469 SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1470 store_pwm_mode, 0),
1471 SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1472 store_pwm_mode, 1),
1473 SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1474 store_pwm_mode, 2),
1475 SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1476 store_pwm_mode, 3),
1477 };
1478
1479 static struct sensor_device_attribute sda_pwm_enable[] = {
1480 SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1481 store_pwm_enable, 0),
1482 SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1483 store_pwm_enable, 1),
1484 SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1485 store_pwm_enable, 2),
1486 SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1487 store_pwm_enable, 3),
1488 };
1489
1490 static struct sensor_device_attribute sda_target_temp[] = {
1491 SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
1492 store_target_temp, 0),
1493 SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
1494 store_target_temp, 1),
1495 SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
1496 store_target_temp, 2),
1497 SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
1498 store_target_temp, 3),
1499 };
1500
1501 static struct sensor_device_attribute sda_tolerance[] = {
1502 SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1503 store_tolerance, 0),
1504 SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1505 store_tolerance, 1),
1506 SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1507 store_tolerance, 2),
1508 SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1509 store_tolerance, 3),
1510 };
1511
1512 /* Smart Fan registers */
1513
1514 #define fan_functions(reg, REG) \
1515 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1516 char *buf) \
1517 { \
1518 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1519 struct sensor_device_attribute *sensor_attr = \
1520 to_sensor_dev_attr(attr); \
1521 int nr = sensor_attr->index; \
1522 return sprintf(buf, "%d\n", data->reg[nr]); \
1523 } \
1524 static ssize_t \
1525 store_##reg(struct device *dev, struct device_attribute *attr, \
1526 const char *buf, size_t count) \
1527 { \
1528 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1529 struct sensor_device_attribute *sensor_attr = \
1530 to_sensor_dev_attr(attr); \
1531 int nr = sensor_attr->index; \
1532 unsigned long val; \
1533 int err; \
1534 err = strict_strtoul(buf, 10, &val); \
1535 if (err < 0) \
1536 return err; \
1537 val = SENSORS_LIMIT(val, 1, 255); \
1538 mutex_lock(&data->update_lock); \
1539 data->reg[nr] = val; \
1540 w83627ehf_write_value(data, data->REG_##REG[nr], val); \
1541 mutex_unlock(&data->update_lock); \
1542 return count; \
1543 }
1544
1545 fan_functions(fan_start_output, FAN_START_OUTPUT)
1546 fan_functions(fan_stop_output, FAN_STOP_OUTPUT)
1547 fan_functions(fan_max_output, FAN_MAX_OUTPUT)
1548 fan_functions(fan_step_output, FAN_STEP_OUTPUT)
1549
1550 #define fan_time_functions(reg, REG) \
1551 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1552 char *buf) \
1553 { \
1554 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1555 struct sensor_device_attribute *sensor_attr = \
1556 to_sensor_dev_attr(attr); \
1557 int nr = sensor_attr->index; \
1558 return sprintf(buf, "%d\n", \
1559 step_time_from_reg(data->reg[nr], \
1560 data->pwm_mode[nr])); \
1561 } \
1562 \
1563 static ssize_t \
1564 store_##reg(struct device *dev, struct device_attribute *attr, \
1565 const char *buf, size_t count) \
1566 { \
1567 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1568 struct sensor_device_attribute *sensor_attr = \
1569 to_sensor_dev_attr(attr); \
1570 int nr = sensor_attr->index; \
1571 unsigned long val; \
1572 int err; \
1573 err = strict_strtoul(buf, 10, &val); \
1574 if (err < 0) \
1575 return err; \
1576 val = step_time_to_reg(val, data->pwm_mode[nr]); \
1577 mutex_lock(&data->update_lock); \
1578 data->reg[nr] = val; \
1579 w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1580 mutex_unlock(&data->update_lock); \
1581 return count; \
1582 } \
1583
1584 fan_time_functions(fan_stop_time, FAN_STOP_TIME)
1585
1586 static ssize_t show_name(struct device *dev, struct device_attribute *attr,
1587 char *buf)
1588 {
1589 struct w83627ehf_data *data = dev_get_drvdata(dev);
1590
1591 return sprintf(buf, "%s\n", data->name);
1592 }
1593 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1594
1595 static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {
1596 SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1597 store_fan_stop_time, 3),
1598 SENSOR_ATTR(pwm4_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1599 store_fan_start_output, 3),
1600 SENSOR_ATTR(pwm4_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1601 store_fan_stop_output, 3),
1602 SENSOR_ATTR(pwm4_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1603 store_fan_max_output, 3),
1604 SENSOR_ATTR(pwm4_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1605 store_fan_step_output, 3),
1606 };
1607
1608 static struct sensor_device_attribute sda_sf3_arrays[] = {
1609 SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1610 store_fan_stop_time, 0),
1611 SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1612 store_fan_stop_time, 1),
1613 SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1614 store_fan_stop_time, 2),
1615 SENSOR_ATTR(pwm1_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1616 store_fan_start_output, 0),
1617 SENSOR_ATTR(pwm2_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1618 store_fan_start_output, 1),
1619 SENSOR_ATTR(pwm3_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1620 store_fan_start_output, 2),
1621 SENSOR_ATTR(pwm1_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1622 store_fan_stop_output, 0),
1623 SENSOR_ATTR(pwm2_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1624 store_fan_stop_output, 1),
1625 SENSOR_ATTR(pwm3_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1626 store_fan_stop_output, 2),
1627 };
1628
1629
1630 /*
1631 * pwm1 and pwm3 don't support max and step settings on all chips.
1632 * Need to check support while generating/removing attribute files.
1633 */
1634 static struct sensor_device_attribute sda_sf3_max_step_arrays[] = {
1635 SENSOR_ATTR(pwm1_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1636 store_fan_max_output, 0),
1637 SENSOR_ATTR(pwm1_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1638 store_fan_step_output, 0),
1639 SENSOR_ATTR(pwm2_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1640 store_fan_max_output, 1),
1641 SENSOR_ATTR(pwm2_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1642 store_fan_step_output, 1),
1643 SENSOR_ATTR(pwm3_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1644 store_fan_max_output, 2),
1645 SENSOR_ATTR(pwm3_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1646 store_fan_step_output, 2),
1647 };
1648
1649 static ssize_t
1650 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
1651 {
1652 struct w83627ehf_data *data = dev_get_drvdata(dev);
1653 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1654 }
1655 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
1656
1657 /*
1658 * Driver and device management
1659 */
1660
1661 static void w83627ehf_device_remove_files(struct device *dev)
1662 {
1663 /* some entries in the following arrays may not have been used in
1664 * device_create_file(), but device_remove_file() will ignore them */
1665 int i;
1666 struct w83627ehf_data *data = dev_get_drvdata(dev);
1667
1668 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1669 device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);
1670 for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
1671 struct sensor_device_attribute *attr =
1672 &sda_sf3_max_step_arrays[i];
1673 if (data->REG_FAN_STEP_OUTPUT &&
1674 data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff)
1675 device_remove_file(dev, &attr->dev_attr);
1676 }
1677 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)
1678 device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);
1679 for (i = 0; i < data->in_num; i++) {
1680 if ((i == 6) && data->in6_skip)
1681 continue;
1682 device_remove_file(dev, &sda_in_input[i].dev_attr);
1683 device_remove_file(dev, &sda_in_alarm[i].dev_attr);
1684 device_remove_file(dev, &sda_in_min[i].dev_attr);
1685 device_remove_file(dev, &sda_in_max[i].dev_attr);
1686 }
1687 for (i = 0; i < 5; i++) {
1688 device_remove_file(dev, &sda_fan_input[i].dev_attr);
1689 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
1690 device_remove_file(dev, &sda_fan_div[i].dev_attr);
1691 device_remove_file(dev, &sda_fan_min[i].dev_attr);
1692 }
1693 for (i = 0; i < data->pwm_num; i++) {
1694 device_remove_file(dev, &sda_pwm[i].dev_attr);
1695 device_remove_file(dev, &sda_pwm_mode[i].dev_attr);
1696 device_remove_file(dev, &sda_pwm_enable[i].dev_attr);
1697 device_remove_file(dev, &sda_target_temp[i].dev_attr);
1698 device_remove_file(dev, &sda_tolerance[i].dev_attr);
1699 }
1700 for (i = 0; i < NUM_REG_TEMP; i++) {
1701 if (!(data->have_temp & (1 << i)))
1702 continue;
1703 device_remove_file(dev, &sda_temp_input[i].dev_attr);
1704 device_remove_file(dev, &sda_temp_label[i].dev_attr);
1705 device_remove_file(dev, &sda_temp_max[i].dev_attr);
1706 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
1707 if (i > 2)
1708 continue;
1709 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
1710 device_remove_file(dev, &sda_temp_type[i].dev_attr);
1711 }
1712
1713 device_remove_file(dev, &dev_attr_name);
1714 device_remove_file(dev, &dev_attr_cpu0_vid);
1715 }
1716
1717 /* Get the monitoring functions started */
1718 static inline void __devinit w83627ehf_init_device(struct w83627ehf_data *data)
1719 {
1720 int i;
1721 u8 tmp, diode;
1722
1723 /* Start monitoring is needed */
1724 tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
1725 if (!(tmp & 0x01))
1726 w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
1727 tmp | 0x01);
1728
1729 /* Enable temperature sensors if needed */
1730 for (i = 0; i < NUM_REG_TEMP; i++) {
1731 if (!(data->have_temp & (1 << i)))
1732 continue;
1733 if (!data->reg_temp_config[i])
1734 continue;
1735 tmp = w83627ehf_read_value(data,
1736 data->reg_temp_config[i]);
1737 if (tmp & 0x01)
1738 w83627ehf_write_value(data,
1739 data->reg_temp_config[i],
1740 tmp & 0xfe);
1741 }
1742
1743 /* Enable VBAT monitoring if needed */
1744 tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
1745 if (!(tmp & 0x01))
1746 w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);
1747
1748 /* Get thermal sensor types */
1749 diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
1750 for (i = 0; i < 3; i++) {
1751 if ((tmp & (0x02 << i)))
1752 data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 2;
1753 else
1754 data->temp_type[i] = 4; /* thermistor */
1755 }
1756 }
1757
1758 static void w82627ehf_swap_tempreg(struct w83627ehf_data *data,
1759 int r1, int r2)
1760 {
1761 u16 tmp;
1762
1763 tmp = data->temp_src[r1];
1764 data->temp_src[r1] = data->temp_src[r2];
1765 data->temp_src[r2] = tmp;
1766
1767 tmp = data->reg_temp[r1];
1768 data->reg_temp[r1] = data->reg_temp[r2];
1769 data->reg_temp[r2] = tmp;
1770
1771 tmp = data->reg_temp_over[r1];
1772 data->reg_temp_over[r1] = data->reg_temp_over[r2];
1773 data->reg_temp_over[r2] = tmp;
1774
1775 tmp = data->reg_temp_hyst[r1];
1776 data->reg_temp_hyst[r1] = data->reg_temp_hyst[r2];
1777 data->reg_temp_hyst[r2] = tmp;
1778
1779 tmp = data->reg_temp_config[r1];
1780 data->reg_temp_config[r1] = data->reg_temp_config[r2];
1781 data->reg_temp_config[r2] = tmp;
1782 }
1783
1784 static int __devinit w83627ehf_probe(struct platform_device *pdev)
1785 {
1786 struct device *dev = &pdev->dev;
1787 struct w83627ehf_sio_data *sio_data = dev->platform_data;
1788 struct w83627ehf_data *data;
1789 struct resource *res;
1790 u8 fan3pin, fan4pin, fan4min, fan5pin, en_vrm10;
1791 int i, err = 0;
1792
1793 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1794 if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
1795 err = -EBUSY;
1796 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1797 (unsigned long)res->start,
1798 (unsigned long)res->start + IOREGION_LENGTH - 1);
1799 goto exit;
1800 }
1801
1802 data = kzalloc(sizeof(struct w83627ehf_data), GFP_KERNEL);
1803 if (!data) {
1804 err = -ENOMEM;
1805 goto exit_release;
1806 }
1807
1808 data->addr = res->start;
1809 mutex_init(&data->lock);
1810 mutex_init(&data->update_lock);
1811 data->name = w83627ehf_device_names[sio_data->kind];
1812 platform_set_drvdata(pdev, data);
1813
1814 /* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */
1815 data->in_num = (sio_data->kind == w83627ehf) ? 10 : 9;
1816 /* 667HG, NCT6775F, and NCT6776F have 3 pwms */
1817 data->pwm_num = (sio_data->kind == w83667hg
1818 || sio_data->kind == w83667hg_b
1819 || sio_data->kind == nct6775
1820 || sio_data->kind == nct6776) ? 3 : 4;
1821
1822 data->have_temp = 0x07;
1823 /* Check temp3 configuration bit for 667HG */
1824 if (sio_data->kind == w83667hg) {
1825 u8 reg;
1826
1827 reg = w83627ehf_read_value(data, W83627EHF_REG_TEMP_CONFIG[2]);
1828 if (reg & 0x01)
1829 data->have_temp &= ~(1 << 2);
1830 else
1831 data->in6_skip = 1; /* either temp3 or in6 */
1832 }
1833
1834 /* Deal with temperature register setup first. */
1835 if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1836 int mask = 0;
1837
1838 /*
1839 * Display temperature sensor output only if it monitors
1840 * a source other than one already reported. Always display
1841 * first three temperature registers, though.
1842 */
1843 for (i = 0; i < NUM_REG_TEMP; i++) {
1844 u8 src;
1845
1846 data->reg_temp[i] = NCT6775_REG_TEMP[i];
1847 data->reg_temp_over[i] = NCT6775_REG_TEMP_OVER[i];
1848 data->reg_temp_hyst[i] = NCT6775_REG_TEMP_HYST[i];
1849 data->reg_temp_config[i] = NCT6775_REG_TEMP_CONFIG[i];
1850
1851 src = w83627ehf_read_value(data,
1852 NCT6775_REG_TEMP_SOURCE[i]);
1853 src &= 0x1f;
1854 if (src && !(mask & (1 << src))) {
1855 data->have_temp |= 1 << i;
1856 mask |= 1 << src;
1857 }
1858
1859 data->temp_src[i] = src;
1860
1861 /*
1862 * Now do some register swapping if index 0..2 don't
1863 * point to SYSTIN(1), CPUIN(2), and AUXIN(3).
1864 * Idea is to have the first three attributes
1865 * report SYSTIN, CPUIN, and AUXIN if possible
1866 * without overriding the basic system configuration.
1867 */
1868 if (i > 0 && data->temp_src[0] != 1
1869 && data->temp_src[i] == 1)
1870 w82627ehf_swap_tempreg(data, 0, i);
1871 if (i > 1 && data->temp_src[1] != 2
1872 && data->temp_src[i] == 2)
1873 w82627ehf_swap_tempreg(data, 1, i);
1874 if (i > 2 && data->temp_src[2] != 3
1875 && data->temp_src[i] == 3)
1876 w82627ehf_swap_tempreg(data, 2, i);
1877 }
1878 if (sio_data->kind == nct6776) {
1879 /*
1880 * On NCT6776, AUXTIN and VIN3 pins are shared.
1881 * Only way to detect it is to check if AUXTIN is used
1882 * as a temperature source, and if that source is
1883 * enabled.
1884 *
1885 * If that is the case, disable in6, which reports VIN3.
1886 * Otherwise disable temp3.
1887 */
1888 if (data->temp_src[2] == 3) {
1889 u8 reg;
1890
1891 if (data->reg_temp_config[2])
1892 reg = w83627ehf_read_value(data,
1893 data->reg_temp_config[2]);
1894 else
1895 reg = 0; /* Assume AUXTIN is used */
1896
1897 if (reg & 0x01)
1898 data->have_temp &= ~(1 << 2);
1899 else
1900 data->in6_skip = 1;
1901 }
1902 data->temp_label = nct6776_temp_label;
1903 } else {
1904 data->temp_label = nct6775_temp_label;
1905 }
1906 } else if (sio_data->kind == w83667hg_b) {
1907 u8 reg;
1908
1909 /*
1910 * Temperature sources are selected with bank 0, registers 0x49
1911 * and 0x4a.
1912 */
1913 for (i = 0; i < ARRAY_SIZE(W83627EHF_REG_TEMP); i++) {
1914 data->reg_temp[i] = W83627EHF_REG_TEMP[i];
1915 data->reg_temp_over[i] = W83627EHF_REG_TEMP_OVER[i];
1916 data->reg_temp_hyst[i] = W83627EHF_REG_TEMP_HYST[i];
1917 data->reg_temp_config[i] = W83627EHF_REG_TEMP_CONFIG[i];
1918 }
1919 reg = w83627ehf_read_value(data, 0x4a);
1920 data->temp_src[0] = reg >> 5;
1921 reg = w83627ehf_read_value(data, 0x49);
1922 data->temp_src[1] = reg & 0x07;
1923 data->temp_src[2] = (reg >> 4) & 0x07;
1924
1925 /*
1926 * W83667HG-B has another temperature register at 0x7e.
1927 * The temperature source is selected with register 0x7d.
1928 * Support it if the source differs from already reported
1929 * sources.
1930 */
1931 reg = w83627ehf_read_value(data, 0x7d);
1932 reg &= 0x07;
1933 if (reg != data->temp_src[0] && reg != data->temp_src[1]
1934 && reg != data->temp_src[2]) {
1935 data->temp_src[3] = reg;
1936 data->have_temp |= 1 << 3;
1937 }
1938
1939 /*
1940 * Chip supports either AUXTIN or VIN3. Try to find out which
1941 * one.
1942 */
1943 reg = w83627ehf_read_value(data, W83627EHF_REG_TEMP_CONFIG[2]);
1944 if (data->temp_src[2] == 2 && (reg & 0x01))
1945 data->have_temp &= ~(1 << 2);
1946
1947 if ((data->temp_src[2] == 2 && (data->have_temp & (1 << 2)))
1948 || (data->temp_src[3] == 2 && (data->have_temp & (1 << 3))))
1949 data->in6_skip = 1;
1950
1951 data->temp_label = w83667hg_b_temp_label;
1952 } else {
1953 /* Temperature sources are fixed */
1954 for (i = 0; i < 3; i++) {
1955 data->reg_temp[i] = W83627EHF_REG_TEMP[i];
1956 data->reg_temp_over[i] = W83627EHF_REG_TEMP_OVER[i];
1957 data->reg_temp_hyst[i] = W83627EHF_REG_TEMP_HYST[i];
1958 data->reg_temp_config[i] = W83627EHF_REG_TEMP_CONFIG[i];
1959 }
1960 }
1961
1962 if (sio_data->kind == nct6775) {
1963 data->has_fan_div = true;
1964 data->fan_from_reg = fan_from_reg16;
1965 data->fan_from_reg_min = fan_from_reg8;
1966 data->REG_PWM = NCT6775_REG_PWM;
1967 data->REG_TARGET = NCT6775_REG_TARGET;
1968 data->REG_FAN = NCT6775_REG_FAN;
1969 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
1970 data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT;
1971 data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT;
1972 data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME;
1973 data->REG_FAN_MAX_OUTPUT = NCT6775_REG_FAN_MAX_OUTPUT;
1974 data->REG_FAN_STEP_OUTPUT = NCT6775_REG_FAN_STEP_OUTPUT;
1975 } else if (sio_data->kind == nct6776) {
1976 data->has_fan_div = false;
1977 data->fan_from_reg = fan_from_reg13;
1978 data->fan_from_reg_min = fan_from_reg13;
1979 data->REG_PWM = NCT6775_REG_PWM;
1980 data->REG_TARGET = NCT6775_REG_TARGET;
1981 data->REG_FAN = NCT6775_REG_FAN;
1982 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
1983 data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT;
1984 data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT;
1985 data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME;
1986 } else if (sio_data->kind == w83667hg_b) {
1987 data->has_fan_div = true;
1988 data->fan_from_reg = fan_from_reg8;
1989 data->fan_from_reg_min = fan_from_reg8;
1990 data->REG_PWM = W83627EHF_REG_PWM;
1991 data->REG_TARGET = W83627EHF_REG_TARGET;
1992 data->REG_FAN = W83627EHF_REG_FAN;
1993 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
1994 data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;
1995 data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;
1996 data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;
1997 data->REG_FAN_MAX_OUTPUT =
1998 W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B;
1999 data->REG_FAN_STEP_OUTPUT =
2000 W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B;
2001 } else {
2002 data->has_fan_div = true;
2003 data->fan_from_reg = fan_from_reg8;
2004 data->fan_from_reg_min = fan_from_reg8;
2005 data->REG_PWM = W83627EHF_REG_PWM;
2006 data->REG_TARGET = W83627EHF_REG_TARGET;
2007 data->REG_FAN = W83627EHF_REG_FAN;
2008 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2009 data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;
2010 data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;
2011 data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;
2012 data->REG_FAN_MAX_OUTPUT =
2013 W83627EHF_REG_FAN_MAX_OUTPUT_COMMON;
2014 data->REG_FAN_STEP_OUTPUT =
2015 W83627EHF_REG_FAN_STEP_OUTPUT_COMMON;
2016 }
2017
2018 /* Initialize the chip */
2019 w83627ehf_init_device(data);
2020
2021 data->vrm = vid_which_vrm();
2022 superio_enter(sio_data->sioreg);
2023 /* Read VID value */
2024 if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b ||
2025 sio_data->kind == nct6775 || sio_data->kind == nct6776) {
2026 /* W83667HG has different pins for VID input and output, so
2027 we can get the VID input values directly at logical device D
2028 0xe3. */
2029 superio_select(sio_data->sioreg, W83667HG_LD_VID);
2030 data->vid = superio_inb(sio_data->sioreg, 0xe3);
2031 err = device_create_file(dev, &dev_attr_cpu0_vid);
2032 if (err)
2033 goto exit_release;
2034 } else {
2035 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
2036 if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) {
2037 /* Set VID input sensibility if needed. In theory the
2038 BIOS should have set it, but in practice it's not
2039 always the case. We only do it for the W83627EHF/EHG
2040 because the W83627DHG is more complex in this
2041 respect. */
2042 if (sio_data->kind == w83627ehf) {
2043 en_vrm10 = superio_inb(sio_data->sioreg,
2044 SIO_REG_EN_VRM10);
2045 if ((en_vrm10 & 0x08) && data->vrm == 90) {
2046 dev_warn(dev, "Setting VID input "
2047 "voltage to TTL\n");
2048 superio_outb(sio_data->sioreg,
2049 SIO_REG_EN_VRM10,
2050 en_vrm10 & ~0x08);
2051 } else if (!(en_vrm10 & 0x08)
2052 && data->vrm == 100) {
2053 dev_warn(dev, "Setting VID input "
2054 "voltage to VRM10\n");
2055 superio_outb(sio_data->sioreg,
2056 SIO_REG_EN_VRM10,
2057 en_vrm10 | 0x08);
2058 }
2059 }
2060
2061 data->vid = superio_inb(sio_data->sioreg,
2062 SIO_REG_VID_DATA);
2063 if (sio_data->kind == w83627ehf) /* 6 VID pins only */
2064 data->vid &= 0x3f;
2065
2066 err = device_create_file(dev, &dev_attr_cpu0_vid);
2067 if (err)
2068 goto exit_release;
2069 } else {
2070 dev_info(dev, "VID pins in output mode, CPU VID not "
2071 "available\n");
2072 }
2073 }
2074
2075 /* fan4 and fan5 share some pins with the GPIO and serial flash */
2076 if (sio_data->kind == nct6775) {
2077 /* On NCT6775, fan4 shares pins with the fdc interface */
2078 fan3pin = 1;
2079 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
2080 fan4min = 0;
2081 fan5pin = 0;
2082 } else if (sio_data->kind == nct6776) {
2083 fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
2084 fan4pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x01);
2085 fan5pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x02);
2086 fan4min = fan4pin;
2087 } else if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) {
2088 fan3pin = 1;
2089 fan4pin = superio_inb(sio_data->sioreg, 0x27) & 0x40;
2090 fan5pin = superio_inb(sio_data->sioreg, 0x27) & 0x20;
2091 fan4min = fan4pin;
2092 } else {
2093 fan3pin = 1;
2094 fan4pin = !(superio_inb(sio_data->sioreg, 0x29) & 0x06);
2095 fan5pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x02);
2096 fan4min = fan4pin;
2097 }
2098
2099 if (fan_debounce &&
2100 (sio_data->kind == nct6775 || sio_data->kind == nct6776)) {
2101 u8 tmp;
2102
2103 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
2104 tmp = superio_inb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE);
2105 if (sio_data->kind == nct6776)
2106 superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE,
2107 0x3e | tmp);
2108 else
2109 superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE,
2110 0x1e | tmp);
2111 pr_info("Enabled fan debounce for chip %s\n", data->name);
2112 }
2113
2114 superio_exit(sio_data->sioreg);
2115
2116 /* It looks like fan4 and fan5 pins can be alternatively used
2117 as fan on/off switches, but fan5 control is write only :/
2118 We assume that if the serial interface is disabled, designers
2119 connected fan5 as input unless they are emitting log 1, which
2120 is not the default. */
2121
2122 data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
2123
2124 data->has_fan |= (fan3pin << 2);
2125 data->has_fan_min |= (fan3pin << 2);
2126
2127 /*
2128 * NCT6775F and NCT6776F don't have the W83627EHF_REG_FANDIV1 register
2129 */
2130 if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
2131 data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
2132 data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
2133 } else {
2134 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
2135 if ((i & (1 << 2)) && fan4pin) {
2136 data->has_fan |= (1 << 3);
2137 data->has_fan_min |= (1 << 3);
2138 }
2139 if (!(i & (1 << 1)) && fan5pin) {
2140 data->has_fan |= (1 << 4);
2141 data->has_fan_min |= (1 << 4);
2142 }
2143 }
2144
2145 /* Read fan clock dividers immediately */
2146 w83627ehf_update_fan_div_common(dev, data);
2147
2148 /* Read pwm data to save original values */
2149 w83627ehf_update_pwm_common(dev, data);
2150 for (i = 0; i < data->pwm_num; i++)
2151 data->pwm_enable_orig[i] = data->pwm_enable[i];
2152
2153 /* Read pwm data to save original values */
2154 w83627ehf_update_pwm_common(dev, data);
2155 for (i = 0; i < data->pwm_num; i++)
2156 data->pwm_enable_orig[i] = data->pwm_enable[i];
2157
2158 /* Register sysfs hooks */
2159 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++) {
2160 err = device_create_file(dev, &sda_sf3_arrays[i].dev_attr);
2161 if (err)
2162 goto exit_remove;
2163 }
2164
2165 for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
2166 struct sensor_device_attribute *attr =
2167 &sda_sf3_max_step_arrays[i];
2168 if (data->REG_FAN_STEP_OUTPUT &&
2169 data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff) {
2170 err = device_create_file(dev, &attr->dev_attr);
2171 if (err)
2172 goto exit_remove;
2173 }
2174 }
2175 /* if fan4 is enabled create the sf3 files for it */
2176 if ((data->has_fan & (1 << 3)) && data->pwm_num >= 4)
2177 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) {
2178 err = device_create_file(dev,
2179 &sda_sf3_arrays_fan4[i].dev_attr);
2180 if (err)
2181 goto exit_remove;
2182 }
2183
2184 for (i = 0; i < data->in_num; i++) {
2185 if ((i == 6) && data->in6_skip)
2186 continue;
2187 if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))
2188 || (err = device_create_file(dev,
2189 &sda_in_alarm[i].dev_attr))
2190 || (err = device_create_file(dev,
2191 &sda_in_min[i].dev_attr))
2192 || (err = device_create_file(dev,
2193 &sda_in_max[i].dev_attr)))
2194 goto exit_remove;
2195 }
2196
2197 for (i = 0; i < 5; i++) {
2198 if (data->has_fan & (1 << i)) {
2199 if ((err = device_create_file(dev,
2200 &sda_fan_input[i].dev_attr))
2201 || (err = device_create_file(dev,
2202 &sda_fan_alarm[i].dev_attr)))
2203 goto exit_remove;
2204 if (sio_data->kind != nct6776) {
2205 err = device_create_file(dev,
2206 &sda_fan_div[i].dev_attr);
2207 if (err)
2208 goto exit_remove;
2209 }
2210 if (data->has_fan_min & (1 << i)) {
2211 err = device_create_file(dev,
2212 &sda_fan_min[i].dev_attr);
2213 if (err)
2214 goto exit_remove;
2215 }
2216 if (i < data->pwm_num &&
2217 ((err = device_create_file(dev,
2218 &sda_pwm[i].dev_attr))
2219 || (err = device_create_file(dev,
2220 &sda_pwm_mode[i].dev_attr))
2221 || (err = device_create_file(dev,
2222 &sda_pwm_enable[i].dev_attr))
2223 || (err = device_create_file(dev,
2224 &sda_target_temp[i].dev_attr))
2225 || (err = device_create_file(dev,
2226 &sda_tolerance[i].dev_attr))))
2227 goto exit_remove;
2228 }
2229 }
2230
2231 for (i = 0; i < NUM_REG_TEMP; i++) {
2232 if (!(data->have_temp & (1 << i)))
2233 continue;
2234 err = device_create_file(dev, &sda_temp_input[i].dev_attr);
2235 if (err)
2236 goto exit_remove;
2237 if (data->temp_label) {
2238 err = device_create_file(dev,
2239 &sda_temp_label[i].dev_attr);
2240 if (err)
2241 goto exit_remove;
2242 }
2243 if (data->reg_temp_over[i]) {
2244 err = device_create_file(dev,
2245 &sda_temp_max[i].dev_attr);
2246 if (err)
2247 goto exit_remove;
2248 }
2249 if (data->reg_temp_hyst[i]) {
2250 err = device_create_file(dev,
2251 &sda_temp_max_hyst[i].dev_attr);
2252 if (err)
2253 goto exit_remove;
2254 }
2255 if (i > 2)
2256 continue;
2257 if ((err = device_create_file(dev,
2258 &sda_temp_alarm[i].dev_attr))
2259 || (err = device_create_file(dev,
2260 &sda_temp_type[i].dev_attr)))
2261 goto exit_remove;
2262 }
2263
2264 err = device_create_file(dev, &dev_attr_name);
2265 if (err)
2266 goto exit_remove;
2267
2268 data->hwmon_dev = hwmon_device_register(dev);
2269 if (IS_ERR(data->hwmon_dev)) {
2270 err = PTR_ERR(data->hwmon_dev);
2271 goto exit_remove;
2272 }
2273
2274 return 0;
2275
2276 exit_remove:
2277 w83627ehf_device_remove_files(dev);
2278 kfree(data);
2279 platform_set_drvdata(pdev, NULL);
2280 exit_release:
2281 release_region(res->start, IOREGION_LENGTH);
2282 exit:
2283 return err;
2284 }
2285
2286 static int __devexit w83627ehf_remove(struct platform_device *pdev)
2287 {
2288 struct w83627ehf_data *data = platform_get_drvdata(pdev);
2289
2290 hwmon_device_unregister(data->hwmon_dev);
2291 w83627ehf_device_remove_files(&pdev->dev);
2292 release_region(data->addr, IOREGION_LENGTH);
2293 platform_set_drvdata(pdev, NULL);
2294 kfree(data);
2295
2296 return 0;
2297 }
2298
2299 static struct platform_driver w83627ehf_driver = {
2300 .driver = {
2301 .owner = THIS_MODULE,
2302 .name = DRVNAME,
2303 },
2304 .probe = w83627ehf_probe,
2305 .remove = __devexit_p(w83627ehf_remove),
2306 };
2307
2308 /* w83627ehf_find() looks for a '627 in the Super-I/O config space */
2309 static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
2310 struct w83627ehf_sio_data *sio_data)
2311 {
2312 static const char __initdata sio_name_W83627EHF[] = "W83627EHF";
2313 static const char __initdata sio_name_W83627EHG[] = "W83627EHG";
2314 static const char __initdata sio_name_W83627DHG[] = "W83627DHG";
2315 static const char __initdata sio_name_W83627DHG_P[] = "W83627DHG-P";
2316 static const char __initdata sio_name_W83667HG[] = "W83667HG";
2317 static const char __initdata sio_name_W83667HG_B[] = "W83667HG-B";
2318 static const char __initdata sio_name_NCT6775[] = "NCT6775F";
2319 static const char __initdata sio_name_NCT6776[] = "NCT6776F";
2320
2321 u16 val;
2322 const char *sio_name;
2323
2324 superio_enter(sioaddr);
2325
2326 if (force_id)
2327 val = force_id;
2328 else
2329 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
2330 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
2331 switch (val & SIO_ID_MASK) {
2332 case SIO_W83627EHF_ID:
2333 sio_data->kind = w83627ehf;
2334 sio_name = sio_name_W83627EHF;
2335 break;
2336 case SIO_W83627EHG_ID:
2337 sio_data->kind = w83627ehf;
2338 sio_name = sio_name_W83627EHG;
2339 break;
2340 case SIO_W83627DHG_ID:
2341 sio_data->kind = w83627dhg;
2342 sio_name = sio_name_W83627DHG;
2343 break;
2344 case SIO_W83627DHG_P_ID:
2345 sio_data->kind = w83627dhg_p;
2346 sio_name = sio_name_W83627DHG_P;
2347 break;
2348 case SIO_W83667HG_ID:
2349 sio_data->kind = w83667hg;
2350 sio_name = sio_name_W83667HG;
2351 break;
2352 case SIO_W83667HG_B_ID:
2353 sio_data->kind = w83667hg_b;
2354 sio_name = sio_name_W83667HG_B;
2355 break;
2356 case SIO_NCT6775_ID:
2357 sio_data->kind = nct6775;
2358 sio_name = sio_name_NCT6775;
2359 break;
2360 case SIO_NCT6776_ID:
2361 sio_data->kind = nct6776;
2362 sio_name = sio_name_NCT6776;
2363 break;
2364 default:
2365 if (val != 0xffff)
2366 pr_debug("unsupported chip ID: 0x%04x\n", val);
2367 superio_exit(sioaddr);
2368 return -ENODEV;
2369 }
2370
2371 /* We have a known chip, find the HWM I/O address */
2372 superio_select(sioaddr, W83627EHF_LD_HWM);
2373 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
2374 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
2375 *addr = val & IOREGION_ALIGNMENT;
2376 if (*addr == 0) {
2377 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
2378 superio_exit(sioaddr);
2379 return -ENODEV;
2380 }
2381
2382 /* Activate logical device if needed */
2383 val = superio_inb(sioaddr, SIO_REG_ENABLE);
2384 if (!(val & 0x01)) {
2385 pr_warn("Forcibly enabling Super-I/O. "
2386 "Sensor is probably unusable.\n");
2387 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
2388 }
2389
2390 superio_exit(sioaddr);
2391 pr_info("Found %s chip at %#x\n", sio_name, *addr);
2392 sio_data->sioreg = sioaddr;
2393
2394 return 0;
2395 }
2396
2397 /* when Super-I/O functions move to a separate file, the Super-I/O
2398 * bus will manage the lifetime of the device and this module will only keep
2399 * track of the w83627ehf driver. But since we platform_device_alloc(), we
2400 * must keep track of the device */
2401 static struct platform_device *pdev;
2402
2403 static int __init sensors_w83627ehf_init(void)
2404 {
2405 int err;
2406 unsigned short address;
2407 struct resource res;
2408 struct w83627ehf_sio_data sio_data;
2409
2410 /* initialize sio_data->kind and sio_data->sioreg.
2411 *
2412 * when Super-I/O functions move to a separate file, the Super-I/O
2413 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
2414 * w83627ehf hardware monitor, and call probe() */
2415 if (w83627ehf_find(0x2e, &address, &sio_data) &&
2416 w83627ehf_find(0x4e, &address, &sio_data))
2417 return -ENODEV;
2418
2419 err = platform_driver_register(&w83627ehf_driver);
2420 if (err)
2421 goto exit;
2422
2423 pdev = platform_device_alloc(DRVNAME, address);
2424 if (!pdev) {
2425 err = -ENOMEM;
2426 pr_err("Device allocation failed\n");
2427 goto exit_unregister;
2428 }
2429
2430 err = platform_device_add_data(pdev, &sio_data,
2431 sizeof(struct w83627ehf_sio_data));
2432 if (err) {
2433 pr_err("Platform data allocation failed\n");
2434 goto exit_device_put;
2435 }
2436
2437 memset(&res, 0, sizeof(res));
2438 res.name = DRVNAME;
2439 res.start = address + IOREGION_OFFSET;
2440 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
2441 res.flags = IORESOURCE_IO;
2442
2443 err = acpi_check_resource_conflict(&res);
2444 if (err)
2445 goto exit_device_put;
2446
2447 err = platform_device_add_resources(pdev, &res, 1);
2448 if (err) {
2449 pr_err("Device resource addition failed (%d)\n", err);
2450 goto exit_device_put;
2451 }
2452
2453 /* platform_device_add calls probe() */
2454 err = platform_device_add(pdev);
2455 if (err) {
2456 pr_err("Device addition failed (%d)\n", err);
2457 goto exit_device_put;
2458 }
2459
2460 return 0;
2461
2462 exit_device_put:
2463 platform_device_put(pdev);
2464 exit_unregister:
2465 platform_driver_unregister(&w83627ehf_driver);
2466 exit:
2467 return err;
2468 }
2469
2470 static void __exit sensors_w83627ehf_exit(void)
2471 {
2472 platform_device_unregister(pdev);
2473 platform_driver_unregister(&w83627ehf_driver);
2474 }
2475
2476 MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
2477 MODULE_DESCRIPTION("W83627EHF driver");
2478 MODULE_LICENSE("GPL");
2479
2480 module_init(sensors_w83627ehf_init);
2481 module_exit(sensors_w83627ehf_exit);