sfc: Don't use enums as a bitmask.
[zen-stable.git] / drivers / net / sfc / efx.c
blobc914729f95546469c42d3d193bfa8ffb3bd235b7
1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2011 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
17 #include <linux/ip.h>
18 #include <linux/tcp.h>
19 #include <linux/in.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include <linux/gfp.h>
24 #include <linux/cpu_rmap.h>
25 #include "net_driver.h"
26 #include "efx.h"
27 #include "nic.h"
29 #include "mcdi.h"
30 #include "workarounds.h"
32 /**************************************************************************
34 * Type name strings
36 **************************************************************************
39 /* Loopback mode names (see LOOPBACK_MODE()) */
40 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
41 const char *efx_loopback_mode_names[] = {
42 [LOOPBACK_NONE] = "NONE",
43 [LOOPBACK_DATA] = "DATAPATH",
44 [LOOPBACK_GMAC] = "GMAC",
45 [LOOPBACK_XGMII] = "XGMII",
46 [LOOPBACK_XGXS] = "XGXS",
47 [LOOPBACK_XAUI] = "XAUI",
48 [LOOPBACK_GMII] = "GMII",
49 [LOOPBACK_SGMII] = "SGMII",
50 [LOOPBACK_XGBR] = "XGBR",
51 [LOOPBACK_XFI] = "XFI",
52 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
53 [LOOPBACK_GMII_FAR] = "GMII_FAR",
54 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
55 [LOOPBACK_XFI_FAR] = "XFI_FAR",
56 [LOOPBACK_GPHY] = "GPHY",
57 [LOOPBACK_PHYXS] = "PHYXS",
58 [LOOPBACK_PCS] = "PCS",
59 [LOOPBACK_PMAPMD] = "PMA/PMD",
60 [LOOPBACK_XPORT] = "XPORT",
61 [LOOPBACK_XGMII_WS] = "XGMII_WS",
62 [LOOPBACK_XAUI_WS] = "XAUI_WS",
63 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
64 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
65 [LOOPBACK_GMII_WS] = "GMII_WS",
66 [LOOPBACK_XFI_WS] = "XFI_WS",
67 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
68 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
71 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
72 const char *efx_reset_type_names[] = {
73 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
74 [RESET_TYPE_ALL] = "ALL",
75 [RESET_TYPE_WORLD] = "WORLD",
76 [RESET_TYPE_DISABLE] = "DISABLE",
77 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
78 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
79 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
80 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
81 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
82 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
83 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
86 #define EFX_MAX_MTU (9 * 1024)
88 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
89 * queued onto this work queue. This is not a per-nic work queue, because
90 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
92 static struct workqueue_struct *reset_workqueue;
94 /**************************************************************************
96 * Configurable values
98 *************************************************************************/
101 * Use separate channels for TX and RX events
103 * Set this to 1 to use separate channels for TX and RX. It allows us
104 * to control interrupt affinity separately for TX and RX.
106 * This is only used in MSI-X interrupt mode
108 static unsigned int separate_tx_channels;
109 module_param(separate_tx_channels, uint, 0444);
110 MODULE_PARM_DESC(separate_tx_channels,
111 "Use separate channels for TX and RX");
113 /* This is the weight assigned to each of the (per-channel) virtual
114 * NAPI devices.
116 static int napi_weight = 64;
118 /* This is the time (in jiffies) between invocations of the hardware
119 * monitor. On Falcon-based NICs, this will:
120 * - Check the on-board hardware monitor;
121 * - Poll the link state and reconfigure the hardware as necessary.
123 static unsigned int efx_monitor_interval = 1 * HZ;
125 /* This controls whether or not the driver will initialise devices
126 * with invalid MAC addresses stored in the EEPROM or flash. If true,
127 * such devices will be initialised with a random locally-generated
128 * MAC address. This allows for loading the sfc_mtd driver to
129 * reprogram the flash, even if the flash contents (including the MAC
130 * address) have previously been erased.
132 static unsigned int allow_bad_hwaddr;
134 /* Initial interrupt moderation settings. They can be modified after
135 * module load with ethtool.
137 * The default for RX should strike a balance between increasing the
138 * round-trip latency and reducing overhead.
140 static unsigned int rx_irq_mod_usec = 60;
142 /* Initial interrupt moderation settings. They can be modified after
143 * module load with ethtool.
145 * This default is chosen to ensure that a 10G link does not go idle
146 * while a TX queue is stopped after it has become full. A queue is
147 * restarted when it drops below half full. The time this takes (assuming
148 * worst case 3 descriptors per packet and 1024 descriptors) is
149 * 512 / 3 * 1.2 = 205 usec.
151 static unsigned int tx_irq_mod_usec = 150;
153 /* This is the first interrupt mode to try out of:
154 * 0 => MSI-X
155 * 1 => MSI
156 * 2 => legacy
158 static unsigned int interrupt_mode;
160 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
161 * i.e. the number of CPUs among which we may distribute simultaneous
162 * interrupt handling.
164 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
165 * The default (0) means to assign an interrupt to each package (level II cache)
167 static unsigned int rss_cpus;
168 module_param(rss_cpus, uint, 0444);
169 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
171 static int phy_flash_cfg;
172 module_param(phy_flash_cfg, int, 0644);
173 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
175 static unsigned irq_adapt_low_thresh = 10000;
176 module_param(irq_adapt_low_thresh, uint, 0644);
177 MODULE_PARM_DESC(irq_adapt_low_thresh,
178 "Threshold score for reducing IRQ moderation");
180 static unsigned irq_adapt_high_thresh = 20000;
181 module_param(irq_adapt_high_thresh, uint, 0644);
182 MODULE_PARM_DESC(irq_adapt_high_thresh,
183 "Threshold score for increasing IRQ moderation");
185 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
186 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
187 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
188 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
189 module_param(debug, uint, 0);
190 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
192 /**************************************************************************
194 * Utility functions and prototypes
196 *************************************************************************/
198 static void efx_remove_channels(struct efx_nic *efx);
199 static void efx_remove_port(struct efx_nic *efx);
200 static void efx_init_napi(struct efx_nic *efx);
201 static void efx_fini_napi(struct efx_nic *efx);
202 static void efx_fini_napi_channel(struct efx_channel *channel);
203 static void efx_fini_struct(struct efx_nic *efx);
204 static void efx_start_all(struct efx_nic *efx);
205 static void efx_stop_all(struct efx_nic *efx);
207 #define EFX_ASSERT_RESET_SERIALISED(efx) \
208 do { \
209 if ((efx->state == STATE_RUNNING) || \
210 (efx->state == STATE_DISABLED)) \
211 ASSERT_RTNL(); \
212 } while (0)
214 /**************************************************************************
216 * Event queue processing
218 *************************************************************************/
220 /* Process channel's event queue
222 * This function is responsible for processing the event queue of a
223 * single channel. The caller must guarantee that this function will
224 * never be concurrently called more than once on the same channel,
225 * though different channels may be being processed concurrently.
227 static int efx_process_channel(struct efx_channel *channel, int budget)
229 struct efx_nic *efx = channel->efx;
230 int spent;
232 if (unlikely(efx->reset_pending != RESET_TYPE_NONE ||
233 !channel->enabled))
234 return 0;
236 spent = efx_nic_process_eventq(channel, budget);
237 if (spent == 0)
238 return 0;
240 /* Deliver last RX packet. */
241 if (channel->rx_pkt) {
242 __efx_rx_packet(channel, channel->rx_pkt,
243 channel->rx_pkt_csummed);
244 channel->rx_pkt = NULL;
247 efx_rx_strategy(channel);
249 efx_fast_push_rx_descriptors(efx_channel_get_rx_queue(channel));
251 return spent;
254 /* Mark channel as finished processing
256 * Note that since we will not receive further interrupts for this
257 * channel before we finish processing and call the eventq_read_ack()
258 * method, there is no need to use the interrupt hold-off timers.
260 static inline void efx_channel_processed(struct efx_channel *channel)
262 /* The interrupt handler for this channel may set work_pending
263 * as soon as we acknowledge the events we've seen. Make sure
264 * it's cleared before then. */
265 channel->work_pending = false;
266 smp_wmb();
268 efx_nic_eventq_read_ack(channel);
271 /* NAPI poll handler
273 * NAPI guarantees serialisation of polls of the same device, which
274 * provides the guarantee required by efx_process_channel().
276 static int efx_poll(struct napi_struct *napi, int budget)
278 struct efx_channel *channel =
279 container_of(napi, struct efx_channel, napi_str);
280 struct efx_nic *efx = channel->efx;
281 int spent;
283 netif_vdbg(efx, intr, efx->net_dev,
284 "channel %d NAPI poll executing on CPU %d\n",
285 channel->channel, raw_smp_processor_id());
287 spent = efx_process_channel(channel, budget);
289 if (spent < budget) {
290 if (channel->channel < efx->n_rx_channels &&
291 efx->irq_rx_adaptive &&
292 unlikely(++channel->irq_count == 1000)) {
293 if (unlikely(channel->irq_mod_score <
294 irq_adapt_low_thresh)) {
295 if (channel->irq_moderation > 1) {
296 channel->irq_moderation -= 1;
297 efx->type->push_irq_moderation(channel);
299 } else if (unlikely(channel->irq_mod_score >
300 irq_adapt_high_thresh)) {
301 if (channel->irq_moderation <
302 efx->irq_rx_moderation) {
303 channel->irq_moderation += 1;
304 efx->type->push_irq_moderation(channel);
307 channel->irq_count = 0;
308 channel->irq_mod_score = 0;
311 efx_filter_rfs_expire(channel);
313 /* There is no race here; although napi_disable() will
314 * only wait for napi_complete(), this isn't a problem
315 * since efx_channel_processed() will have no effect if
316 * interrupts have already been disabled.
318 napi_complete(napi);
319 efx_channel_processed(channel);
322 return spent;
325 /* Process the eventq of the specified channel immediately on this CPU
327 * Disable hardware generated interrupts, wait for any existing
328 * processing to finish, then directly poll (and ack ) the eventq.
329 * Finally reenable NAPI and interrupts.
331 * This is for use only during a loopback self-test. It must not
332 * deliver any packets up the stack as this can result in deadlock.
334 void efx_process_channel_now(struct efx_channel *channel)
336 struct efx_nic *efx = channel->efx;
338 BUG_ON(channel->channel >= efx->n_channels);
339 BUG_ON(!channel->enabled);
340 BUG_ON(!efx->loopback_selftest);
342 /* Disable interrupts and wait for ISRs to complete */
343 efx_nic_disable_interrupts(efx);
344 if (efx->legacy_irq) {
345 synchronize_irq(efx->legacy_irq);
346 efx->legacy_irq_enabled = false;
348 if (channel->irq)
349 synchronize_irq(channel->irq);
351 /* Wait for any NAPI processing to complete */
352 napi_disable(&channel->napi_str);
354 /* Poll the channel */
355 efx_process_channel(channel, channel->eventq_mask + 1);
357 /* Ack the eventq. This may cause an interrupt to be generated
358 * when they are reenabled */
359 efx_channel_processed(channel);
361 napi_enable(&channel->napi_str);
362 if (efx->legacy_irq)
363 efx->legacy_irq_enabled = true;
364 efx_nic_enable_interrupts(efx);
367 /* Create event queue
368 * Event queue memory allocations are done only once. If the channel
369 * is reset, the memory buffer will be reused; this guards against
370 * errors during channel reset and also simplifies interrupt handling.
372 static int efx_probe_eventq(struct efx_channel *channel)
374 struct efx_nic *efx = channel->efx;
375 unsigned long entries;
377 netif_dbg(channel->efx, probe, channel->efx->net_dev,
378 "chan %d create event queue\n", channel->channel);
380 /* Build an event queue with room for one event per tx and rx buffer,
381 * plus some extra for link state events and MCDI completions. */
382 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
383 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
384 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
386 return efx_nic_probe_eventq(channel);
389 /* Prepare channel's event queue */
390 static void efx_init_eventq(struct efx_channel *channel)
392 netif_dbg(channel->efx, drv, channel->efx->net_dev,
393 "chan %d init event queue\n", channel->channel);
395 channel->eventq_read_ptr = 0;
397 efx_nic_init_eventq(channel);
400 static void efx_fini_eventq(struct efx_channel *channel)
402 netif_dbg(channel->efx, drv, channel->efx->net_dev,
403 "chan %d fini event queue\n", channel->channel);
405 efx_nic_fini_eventq(channel);
408 static void efx_remove_eventq(struct efx_channel *channel)
410 netif_dbg(channel->efx, drv, channel->efx->net_dev,
411 "chan %d remove event queue\n", channel->channel);
413 efx_nic_remove_eventq(channel);
416 /**************************************************************************
418 * Channel handling
420 *************************************************************************/
422 /* Allocate and initialise a channel structure, optionally copying
423 * parameters (but not resources) from an old channel structure. */
424 static struct efx_channel *
425 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
427 struct efx_channel *channel;
428 struct efx_rx_queue *rx_queue;
429 struct efx_tx_queue *tx_queue;
430 int j;
432 if (old_channel) {
433 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
434 if (!channel)
435 return NULL;
437 *channel = *old_channel;
439 channel->napi_dev = NULL;
440 memset(&channel->eventq, 0, sizeof(channel->eventq));
442 rx_queue = &channel->rx_queue;
443 rx_queue->buffer = NULL;
444 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
446 for (j = 0; j < EFX_TXQ_TYPES; j++) {
447 tx_queue = &channel->tx_queue[j];
448 if (tx_queue->channel)
449 tx_queue->channel = channel;
450 tx_queue->buffer = NULL;
451 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
453 } else {
454 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
455 if (!channel)
456 return NULL;
458 channel->efx = efx;
459 channel->channel = i;
461 for (j = 0; j < EFX_TXQ_TYPES; j++) {
462 tx_queue = &channel->tx_queue[j];
463 tx_queue->efx = efx;
464 tx_queue->queue = i * EFX_TXQ_TYPES + j;
465 tx_queue->channel = channel;
469 rx_queue = &channel->rx_queue;
470 rx_queue->efx = efx;
471 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
472 (unsigned long)rx_queue);
474 return channel;
477 static int efx_probe_channel(struct efx_channel *channel)
479 struct efx_tx_queue *tx_queue;
480 struct efx_rx_queue *rx_queue;
481 int rc;
483 netif_dbg(channel->efx, probe, channel->efx->net_dev,
484 "creating channel %d\n", channel->channel);
486 rc = efx_probe_eventq(channel);
487 if (rc)
488 goto fail1;
490 efx_for_each_channel_tx_queue(tx_queue, channel) {
491 rc = efx_probe_tx_queue(tx_queue);
492 if (rc)
493 goto fail2;
496 efx_for_each_channel_rx_queue(rx_queue, channel) {
497 rc = efx_probe_rx_queue(rx_queue);
498 if (rc)
499 goto fail3;
502 channel->n_rx_frm_trunc = 0;
504 return 0;
506 fail3:
507 efx_for_each_channel_rx_queue(rx_queue, channel)
508 efx_remove_rx_queue(rx_queue);
509 fail2:
510 efx_for_each_channel_tx_queue(tx_queue, channel)
511 efx_remove_tx_queue(tx_queue);
512 fail1:
513 return rc;
517 static void efx_set_channel_names(struct efx_nic *efx)
519 struct efx_channel *channel;
520 const char *type = "";
521 int number;
523 efx_for_each_channel(channel, efx) {
524 number = channel->channel;
525 if (efx->n_channels > efx->n_rx_channels) {
526 if (channel->channel < efx->n_rx_channels) {
527 type = "-rx";
528 } else {
529 type = "-tx";
530 number -= efx->n_rx_channels;
533 snprintf(efx->channel_name[channel->channel],
534 sizeof(efx->channel_name[0]),
535 "%s%s-%d", efx->name, type, number);
539 static int efx_probe_channels(struct efx_nic *efx)
541 struct efx_channel *channel;
542 int rc;
544 /* Restart special buffer allocation */
545 efx->next_buffer_table = 0;
547 efx_for_each_channel(channel, efx) {
548 rc = efx_probe_channel(channel);
549 if (rc) {
550 netif_err(efx, probe, efx->net_dev,
551 "failed to create channel %d\n",
552 channel->channel);
553 goto fail;
556 efx_set_channel_names(efx);
558 return 0;
560 fail:
561 efx_remove_channels(efx);
562 return rc;
565 /* Channels are shutdown and reinitialised whilst the NIC is running
566 * to propagate configuration changes (mtu, checksum offload), or
567 * to clear hardware error conditions
569 static void efx_init_channels(struct efx_nic *efx)
571 struct efx_tx_queue *tx_queue;
572 struct efx_rx_queue *rx_queue;
573 struct efx_channel *channel;
575 /* Calculate the rx buffer allocation parameters required to
576 * support the current MTU, including padding for header
577 * alignment and overruns.
579 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
580 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
581 efx->type->rx_buffer_hash_size +
582 efx->type->rx_buffer_padding);
583 efx->rx_buffer_order = get_order(efx->rx_buffer_len +
584 sizeof(struct efx_rx_page_state));
586 /* Initialise the channels */
587 efx_for_each_channel(channel, efx) {
588 netif_dbg(channel->efx, drv, channel->efx->net_dev,
589 "init chan %d\n", channel->channel);
591 efx_init_eventq(channel);
593 efx_for_each_channel_tx_queue(tx_queue, channel)
594 efx_init_tx_queue(tx_queue);
596 /* The rx buffer allocation strategy is MTU dependent */
597 efx_rx_strategy(channel);
599 efx_for_each_channel_rx_queue(rx_queue, channel)
600 efx_init_rx_queue(rx_queue);
602 WARN_ON(channel->rx_pkt != NULL);
603 efx_rx_strategy(channel);
607 /* This enables event queue processing and packet transmission.
609 * Note that this function is not allowed to fail, since that would
610 * introduce too much complexity into the suspend/resume path.
612 static void efx_start_channel(struct efx_channel *channel)
614 struct efx_rx_queue *rx_queue;
616 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
617 "starting chan %d\n", channel->channel);
619 /* The interrupt handler for this channel may set work_pending
620 * as soon as we enable it. Make sure it's cleared before
621 * then. Similarly, make sure it sees the enabled flag set. */
622 channel->work_pending = false;
623 channel->enabled = true;
624 smp_wmb();
626 /* Fill the queues before enabling NAPI */
627 efx_for_each_channel_rx_queue(rx_queue, channel)
628 efx_fast_push_rx_descriptors(rx_queue);
630 napi_enable(&channel->napi_str);
633 /* This disables event queue processing and packet transmission.
634 * This function does not guarantee that all queue processing
635 * (e.g. RX refill) is complete.
637 static void efx_stop_channel(struct efx_channel *channel)
639 if (!channel->enabled)
640 return;
642 netif_dbg(channel->efx, ifdown, channel->efx->net_dev,
643 "stop chan %d\n", channel->channel);
645 channel->enabled = false;
646 napi_disable(&channel->napi_str);
649 static void efx_fini_channels(struct efx_nic *efx)
651 struct efx_channel *channel;
652 struct efx_tx_queue *tx_queue;
653 struct efx_rx_queue *rx_queue;
654 int rc;
656 EFX_ASSERT_RESET_SERIALISED(efx);
657 BUG_ON(efx->port_enabled);
659 rc = efx_nic_flush_queues(efx);
660 if (rc && EFX_WORKAROUND_7803(efx)) {
661 /* Schedule a reset to recover from the flush failure. The
662 * descriptor caches reference memory we're about to free,
663 * but falcon_reconfigure_mac_wrapper() won't reconnect
664 * the MACs because of the pending reset. */
665 netif_err(efx, drv, efx->net_dev,
666 "Resetting to recover from flush failure\n");
667 efx_schedule_reset(efx, RESET_TYPE_ALL);
668 } else if (rc) {
669 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
670 } else {
671 netif_dbg(efx, drv, efx->net_dev,
672 "successfully flushed all queues\n");
675 efx_for_each_channel(channel, efx) {
676 netif_dbg(channel->efx, drv, channel->efx->net_dev,
677 "shut down chan %d\n", channel->channel);
679 efx_for_each_channel_rx_queue(rx_queue, channel)
680 efx_fini_rx_queue(rx_queue);
681 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
682 efx_fini_tx_queue(tx_queue);
683 efx_fini_eventq(channel);
687 static void efx_remove_channel(struct efx_channel *channel)
689 struct efx_tx_queue *tx_queue;
690 struct efx_rx_queue *rx_queue;
692 netif_dbg(channel->efx, drv, channel->efx->net_dev,
693 "destroy chan %d\n", channel->channel);
695 efx_for_each_channel_rx_queue(rx_queue, channel)
696 efx_remove_rx_queue(rx_queue);
697 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
698 efx_remove_tx_queue(tx_queue);
699 efx_remove_eventq(channel);
702 static void efx_remove_channels(struct efx_nic *efx)
704 struct efx_channel *channel;
706 efx_for_each_channel(channel, efx)
707 efx_remove_channel(channel);
711 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
713 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
714 u32 old_rxq_entries, old_txq_entries;
715 unsigned i;
716 int rc;
718 efx_stop_all(efx);
719 efx_fini_channels(efx);
721 /* Clone channels */
722 memset(other_channel, 0, sizeof(other_channel));
723 for (i = 0; i < efx->n_channels; i++) {
724 channel = efx_alloc_channel(efx, i, efx->channel[i]);
725 if (!channel) {
726 rc = -ENOMEM;
727 goto out;
729 other_channel[i] = channel;
732 /* Swap entry counts and channel pointers */
733 old_rxq_entries = efx->rxq_entries;
734 old_txq_entries = efx->txq_entries;
735 efx->rxq_entries = rxq_entries;
736 efx->txq_entries = txq_entries;
737 for (i = 0; i < efx->n_channels; i++) {
738 channel = efx->channel[i];
739 efx->channel[i] = other_channel[i];
740 other_channel[i] = channel;
743 rc = efx_probe_channels(efx);
744 if (rc)
745 goto rollback;
747 efx_init_napi(efx);
749 /* Destroy old channels */
750 for (i = 0; i < efx->n_channels; i++) {
751 efx_fini_napi_channel(other_channel[i]);
752 efx_remove_channel(other_channel[i]);
754 out:
755 /* Free unused channel structures */
756 for (i = 0; i < efx->n_channels; i++)
757 kfree(other_channel[i]);
759 efx_init_channels(efx);
760 efx_start_all(efx);
761 return rc;
763 rollback:
764 /* Swap back */
765 efx->rxq_entries = old_rxq_entries;
766 efx->txq_entries = old_txq_entries;
767 for (i = 0; i < efx->n_channels; i++) {
768 channel = efx->channel[i];
769 efx->channel[i] = other_channel[i];
770 other_channel[i] = channel;
772 goto out;
775 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
777 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
780 /**************************************************************************
782 * Port handling
784 **************************************************************************/
786 /* This ensures that the kernel is kept informed (via
787 * netif_carrier_on/off) of the link status, and also maintains the
788 * link status's stop on the port's TX queue.
790 void efx_link_status_changed(struct efx_nic *efx)
792 struct efx_link_state *link_state = &efx->link_state;
794 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
795 * that no events are triggered between unregister_netdev() and the
796 * driver unloading. A more general condition is that NETDEV_CHANGE
797 * can only be generated between NETDEV_UP and NETDEV_DOWN */
798 if (!netif_running(efx->net_dev))
799 return;
801 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
802 efx->n_link_state_changes++;
804 if (link_state->up)
805 netif_carrier_on(efx->net_dev);
806 else
807 netif_carrier_off(efx->net_dev);
810 /* Status message for kernel log */
811 if (link_state->up) {
812 netif_info(efx, link, efx->net_dev,
813 "link up at %uMbps %s-duplex (MTU %d)%s\n",
814 link_state->speed, link_state->fd ? "full" : "half",
815 efx->net_dev->mtu,
816 (efx->promiscuous ? " [PROMISC]" : ""));
817 } else {
818 netif_info(efx, link, efx->net_dev, "link down\n");
823 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
825 efx->link_advertising = advertising;
826 if (advertising) {
827 if (advertising & ADVERTISED_Pause)
828 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
829 else
830 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
831 if (advertising & ADVERTISED_Asym_Pause)
832 efx->wanted_fc ^= EFX_FC_TX;
836 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
838 efx->wanted_fc = wanted_fc;
839 if (efx->link_advertising) {
840 if (wanted_fc & EFX_FC_RX)
841 efx->link_advertising |= (ADVERTISED_Pause |
842 ADVERTISED_Asym_Pause);
843 else
844 efx->link_advertising &= ~(ADVERTISED_Pause |
845 ADVERTISED_Asym_Pause);
846 if (wanted_fc & EFX_FC_TX)
847 efx->link_advertising ^= ADVERTISED_Asym_Pause;
851 static void efx_fini_port(struct efx_nic *efx);
853 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
854 * the MAC appropriately. All other PHY configuration changes are pushed
855 * through phy_op->set_settings(), and pushed asynchronously to the MAC
856 * through efx_monitor().
858 * Callers must hold the mac_lock
860 int __efx_reconfigure_port(struct efx_nic *efx)
862 enum efx_phy_mode phy_mode;
863 int rc;
865 WARN_ON(!mutex_is_locked(&efx->mac_lock));
867 /* Serialise the promiscuous flag with efx_set_multicast_list. */
868 if (efx_dev_registered(efx)) {
869 netif_addr_lock_bh(efx->net_dev);
870 netif_addr_unlock_bh(efx->net_dev);
873 /* Disable PHY transmit in mac level loopbacks */
874 phy_mode = efx->phy_mode;
875 if (LOOPBACK_INTERNAL(efx))
876 efx->phy_mode |= PHY_MODE_TX_DISABLED;
877 else
878 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
880 rc = efx->type->reconfigure_port(efx);
882 if (rc)
883 efx->phy_mode = phy_mode;
885 return rc;
888 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
889 * disabled. */
890 int efx_reconfigure_port(struct efx_nic *efx)
892 int rc;
894 EFX_ASSERT_RESET_SERIALISED(efx);
896 mutex_lock(&efx->mac_lock);
897 rc = __efx_reconfigure_port(efx);
898 mutex_unlock(&efx->mac_lock);
900 return rc;
903 /* Asynchronous work item for changing MAC promiscuity and multicast
904 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
905 * MAC directly. */
906 static void efx_mac_work(struct work_struct *data)
908 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
910 mutex_lock(&efx->mac_lock);
911 if (efx->port_enabled) {
912 efx->type->push_multicast_hash(efx);
913 efx->mac_op->reconfigure(efx);
915 mutex_unlock(&efx->mac_lock);
918 static int efx_probe_port(struct efx_nic *efx)
920 unsigned char *perm_addr;
921 int rc;
923 netif_dbg(efx, probe, efx->net_dev, "create port\n");
925 if (phy_flash_cfg)
926 efx->phy_mode = PHY_MODE_SPECIAL;
928 /* Connect up MAC/PHY operations table */
929 rc = efx->type->probe_port(efx);
930 if (rc)
931 return rc;
933 /* Sanity check MAC address */
934 perm_addr = efx->net_dev->perm_addr;
935 if (is_valid_ether_addr(perm_addr)) {
936 memcpy(efx->net_dev->dev_addr, perm_addr, ETH_ALEN);
937 } else {
938 netif_err(efx, probe, efx->net_dev, "invalid MAC address %pM\n",
939 perm_addr);
940 if (!allow_bad_hwaddr) {
941 rc = -EINVAL;
942 goto err;
944 random_ether_addr(efx->net_dev->dev_addr);
945 netif_info(efx, probe, efx->net_dev,
946 "using locally-generated MAC %pM\n",
947 efx->net_dev->dev_addr);
950 return 0;
952 err:
953 efx->type->remove_port(efx);
954 return rc;
957 static int efx_init_port(struct efx_nic *efx)
959 int rc;
961 netif_dbg(efx, drv, efx->net_dev, "init port\n");
963 mutex_lock(&efx->mac_lock);
965 rc = efx->phy_op->init(efx);
966 if (rc)
967 goto fail1;
969 efx->port_initialized = true;
971 /* Reconfigure the MAC before creating dma queues (required for
972 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
973 efx->mac_op->reconfigure(efx);
975 /* Ensure the PHY advertises the correct flow control settings */
976 rc = efx->phy_op->reconfigure(efx);
977 if (rc)
978 goto fail2;
980 mutex_unlock(&efx->mac_lock);
981 return 0;
983 fail2:
984 efx->phy_op->fini(efx);
985 fail1:
986 mutex_unlock(&efx->mac_lock);
987 return rc;
990 static void efx_start_port(struct efx_nic *efx)
992 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
993 BUG_ON(efx->port_enabled);
995 mutex_lock(&efx->mac_lock);
996 efx->port_enabled = true;
998 /* efx_mac_work() might have been scheduled after efx_stop_port(),
999 * and then cancelled by efx_flush_all() */
1000 efx->type->push_multicast_hash(efx);
1001 efx->mac_op->reconfigure(efx);
1003 mutex_unlock(&efx->mac_lock);
1006 /* Prevent efx_mac_work() and efx_monitor() from working */
1007 static void efx_stop_port(struct efx_nic *efx)
1009 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1011 mutex_lock(&efx->mac_lock);
1012 efx->port_enabled = false;
1013 mutex_unlock(&efx->mac_lock);
1015 /* Serialise against efx_set_multicast_list() */
1016 if (efx_dev_registered(efx)) {
1017 netif_addr_lock_bh(efx->net_dev);
1018 netif_addr_unlock_bh(efx->net_dev);
1022 static void efx_fini_port(struct efx_nic *efx)
1024 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1026 if (!efx->port_initialized)
1027 return;
1029 efx->phy_op->fini(efx);
1030 efx->port_initialized = false;
1032 efx->link_state.up = false;
1033 efx_link_status_changed(efx);
1036 static void efx_remove_port(struct efx_nic *efx)
1038 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1040 efx->type->remove_port(efx);
1043 /**************************************************************************
1045 * NIC handling
1047 **************************************************************************/
1049 /* This configures the PCI device to enable I/O and DMA. */
1050 static int efx_init_io(struct efx_nic *efx)
1052 struct pci_dev *pci_dev = efx->pci_dev;
1053 dma_addr_t dma_mask = efx->type->max_dma_mask;
1054 bool use_wc;
1055 int rc;
1057 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1059 rc = pci_enable_device(pci_dev);
1060 if (rc) {
1061 netif_err(efx, probe, efx->net_dev,
1062 "failed to enable PCI device\n");
1063 goto fail1;
1066 pci_set_master(pci_dev);
1068 /* Set the PCI DMA mask. Try all possibilities from our
1069 * genuine mask down to 32 bits, because some architectures
1070 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1071 * masks event though they reject 46 bit masks.
1073 while (dma_mask > 0x7fffffffUL) {
1074 if (pci_dma_supported(pci_dev, dma_mask) &&
1075 ((rc = pci_set_dma_mask(pci_dev, dma_mask)) == 0))
1076 break;
1077 dma_mask >>= 1;
1079 if (rc) {
1080 netif_err(efx, probe, efx->net_dev,
1081 "could not find a suitable DMA mask\n");
1082 goto fail2;
1084 netif_dbg(efx, probe, efx->net_dev,
1085 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1086 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
1087 if (rc) {
1088 /* pci_set_consistent_dma_mask() is not *allowed* to
1089 * fail with a mask that pci_set_dma_mask() accepted,
1090 * but just in case...
1092 netif_err(efx, probe, efx->net_dev,
1093 "failed to set consistent DMA mask\n");
1094 goto fail2;
1097 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1098 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1099 if (rc) {
1100 netif_err(efx, probe, efx->net_dev,
1101 "request for memory BAR failed\n");
1102 rc = -EIO;
1103 goto fail3;
1106 /* bug22643: If SR-IOV is enabled then tx push over a write combined
1107 * mapping is unsafe. We need to disable write combining in this case.
1108 * MSI is unsupported when SR-IOV is enabled, and the firmware will
1109 * have removed the MSI capability. So write combining is safe if
1110 * there is an MSI capability.
1112 use_wc = (!EFX_WORKAROUND_22643(efx) ||
1113 pci_find_capability(pci_dev, PCI_CAP_ID_MSI));
1114 if (use_wc)
1115 efx->membase = ioremap_wc(efx->membase_phys,
1116 efx->type->mem_map_size);
1117 else
1118 efx->membase = ioremap_nocache(efx->membase_phys,
1119 efx->type->mem_map_size);
1120 if (!efx->membase) {
1121 netif_err(efx, probe, efx->net_dev,
1122 "could not map memory BAR at %llx+%x\n",
1123 (unsigned long long)efx->membase_phys,
1124 efx->type->mem_map_size);
1125 rc = -ENOMEM;
1126 goto fail4;
1128 netif_dbg(efx, probe, efx->net_dev,
1129 "memory BAR at %llx+%x (virtual %p)\n",
1130 (unsigned long long)efx->membase_phys,
1131 efx->type->mem_map_size, efx->membase);
1133 return 0;
1135 fail4:
1136 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1137 fail3:
1138 efx->membase_phys = 0;
1139 fail2:
1140 pci_disable_device(efx->pci_dev);
1141 fail1:
1142 return rc;
1145 static void efx_fini_io(struct efx_nic *efx)
1147 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1149 if (efx->membase) {
1150 iounmap(efx->membase);
1151 efx->membase = NULL;
1154 if (efx->membase_phys) {
1155 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1156 efx->membase_phys = 0;
1159 pci_disable_device(efx->pci_dev);
1162 /* Get number of channels wanted. Each channel will have its own IRQ,
1163 * 1 RX queue and/or 2 TX queues. */
1164 static int efx_wanted_channels(void)
1166 cpumask_var_t core_mask;
1167 int count;
1168 int cpu;
1170 if (rss_cpus)
1171 return rss_cpus;
1173 if (unlikely(!zalloc_cpumask_var(&core_mask, GFP_KERNEL))) {
1174 printk(KERN_WARNING
1175 "sfc: RSS disabled due to allocation failure\n");
1176 return 1;
1179 count = 0;
1180 for_each_online_cpu(cpu) {
1181 if (!cpumask_test_cpu(cpu, core_mask)) {
1182 ++count;
1183 cpumask_or(core_mask, core_mask,
1184 topology_core_cpumask(cpu));
1188 free_cpumask_var(core_mask);
1189 return count;
1192 static int
1193 efx_init_rx_cpu_rmap(struct efx_nic *efx, struct msix_entry *xentries)
1195 #ifdef CONFIG_RFS_ACCEL
1196 int i, rc;
1198 efx->net_dev->rx_cpu_rmap = alloc_irq_cpu_rmap(efx->n_rx_channels);
1199 if (!efx->net_dev->rx_cpu_rmap)
1200 return -ENOMEM;
1201 for (i = 0; i < efx->n_rx_channels; i++) {
1202 rc = irq_cpu_rmap_add(efx->net_dev->rx_cpu_rmap,
1203 xentries[i].vector);
1204 if (rc) {
1205 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap);
1206 efx->net_dev->rx_cpu_rmap = NULL;
1207 return rc;
1210 #endif
1211 return 0;
1214 /* Probe the number and type of interrupts we are able to obtain, and
1215 * the resulting numbers of channels and RX queues.
1217 static int efx_probe_interrupts(struct efx_nic *efx)
1219 int max_channels =
1220 min_t(int, efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
1221 int rc, i;
1223 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1224 struct msix_entry xentries[EFX_MAX_CHANNELS];
1225 int n_channels;
1227 n_channels = efx_wanted_channels();
1228 if (separate_tx_channels)
1229 n_channels *= 2;
1230 n_channels = min(n_channels, max_channels);
1232 for (i = 0; i < n_channels; i++)
1233 xentries[i].entry = i;
1234 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1235 if (rc > 0) {
1236 netif_err(efx, drv, efx->net_dev,
1237 "WARNING: Insufficient MSI-X vectors"
1238 " available (%d < %d).\n", rc, n_channels);
1239 netif_err(efx, drv, efx->net_dev,
1240 "WARNING: Performance may be reduced.\n");
1241 EFX_BUG_ON_PARANOID(rc >= n_channels);
1242 n_channels = rc;
1243 rc = pci_enable_msix(efx->pci_dev, xentries,
1244 n_channels);
1247 if (rc == 0) {
1248 efx->n_channels = n_channels;
1249 if (separate_tx_channels) {
1250 efx->n_tx_channels =
1251 max(efx->n_channels / 2, 1U);
1252 efx->n_rx_channels =
1253 max(efx->n_channels -
1254 efx->n_tx_channels, 1U);
1255 } else {
1256 efx->n_tx_channels = efx->n_channels;
1257 efx->n_rx_channels = efx->n_channels;
1259 rc = efx_init_rx_cpu_rmap(efx, xentries);
1260 if (rc) {
1261 pci_disable_msix(efx->pci_dev);
1262 return rc;
1264 for (i = 0; i < n_channels; i++)
1265 efx_get_channel(efx, i)->irq =
1266 xentries[i].vector;
1267 } else {
1268 /* Fall back to single channel MSI */
1269 efx->interrupt_mode = EFX_INT_MODE_MSI;
1270 netif_err(efx, drv, efx->net_dev,
1271 "could not enable MSI-X\n");
1275 /* Try single interrupt MSI */
1276 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1277 efx->n_channels = 1;
1278 efx->n_rx_channels = 1;
1279 efx->n_tx_channels = 1;
1280 rc = pci_enable_msi(efx->pci_dev);
1281 if (rc == 0) {
1282 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1283 } else {
1284 netif_err(efx, drv, efx->net_dev,
1285 "could not enable MSI\n");
1286 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1290 /* Assume legacy interrupts */
1291 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1292 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1293 efx->n_rx_channels = 1;
1294 efx->n_tx_channels = 1;
1295 efx->legacy_irq = efx->pci_dev->irq;
1298 return 0;
1301 static void efx_remove_interrupts(struct efx_nic *efx)
1303 struct efx_channel *channel;
1305 /* Remove MSI/MSI-X interrupts */
1306 efx_for_each_channel(channel, efx)
1307 channel->irq = 0;
1308 pci_disable_msi(efx->pci_dev);
1309 pci_disable_msix(efx->pci_dev);
1311 /* Remove legacy interrupt */
1312 efx->legacy_irq = 0;
1315 static void efx_set_channels(struct efx_nic *efx)
1317 struct efx_channel *channel;
1318 struct efx_tx_queue *tx_queue;
1320 efx->tx_channel_offset =
1321 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1323 /* We need to adjust the TX queue numbers if we have separate
1324 * RX-only and TX-only channels.
1326 efx_for_each_channel(channel, efx) {
1327 efx_for_each_channel_tx_queue(tx_queue, channel)
1328 tx_queue->queue -= (efx->tx_channel_offset *
1329 EFX_TXQ_TYPES);
1333 static int efx_probe_nic(struct efx_nic *efx)
1335 size_t i;
1336 int rc;
1338 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1340 /* Carry out hardware-type specific initialisation */
1341 rc = efx->type->probe(efx);
1342 if (rc)
1343 return rc;
1345 /* Determine the number of channels and queues by trying to hook
1346 * in MSI-X interrupts. */
1347 rc = efx_probe_interrupts(efx);
1348 if (rc)
1349 goto fail;
1351 if (efx->n_channels > 1)
1352 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1353 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1354 efx->rx_indir_table[i] = i % efx->n_rx_channels;
1356 efx_set_channels(efx);
1357 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1358 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1360 /* Initialise the interrupt moderation settings */
1361 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true);
1363 return 0;
1365 fail:
1366 efx->type->remove(efx);
1367 return rc;
1370 static void efx_remove_nic(struct efx_nic *efx)
1372 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1374 efx_remove_interrupts(efx);
1375 efx->type->remove(efx);
1378 /**************************************************************************
1380 * NIC startup/shutdown
1382 *************************************************************************/
1384 static int efx_probe_all(struct efx_nic *efx)
1386 int rc;
1388 rc = efx_probe_nic(efx);
1389 if (rc) {
1390 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1391 goto fail1;
1394 rc = efx_probe_port(efx);
1395 if (rc) {
1396 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1397 goto fail2;
1400 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1401 rc = efx_probe_channels(efx);
1402 if (rc)
1403 goto fail3;
1405 rc = efx_probe_filters(efx);
1406 if (rc) {
1407 netif_err(efx, probe, efx->net_dev,
1408 "failed to create filter tables\n");
1409 goto fail4;
1412 return 0;
1414 fail4:
1415 efx_remove_channels(efx);
1416 fail3:
1417 efx_remove_port(efx);
1418 fail2:
1419 efx_remove_nic(efx);
1420 fail1:
1421 return rc;
1424 /* Called after previous invocation(s) of efx_stop_all, restarts the
1425 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1426 * and ensures that the port is scheduled to be reconfigured.
1427 * This function is safe to call multiple times when the NIC is in any
1428 * state. */
1429 static void efx_start_all(struct efx_nic *efx)
1431 struct efx_channel *channel;
1433 EFX_ASSERT_RESET_SERIALISED(efx);
1435 /* Check that it is appropriate to restart the interface. All
1436 * of these flags are safe to read under just the rtnl lock */
1437 if (efx->port_enabled)
1438 return;
1439 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1440 return;
1441 if (efx_dev_registered(efx) && !netif_running(efx->net_dev))
1442 return;
1444 /* Mark the port as enabled so port reconfigurations can start, then
1445 * restart the transmit interface early so the watchdog timer stops */
1446 efx_start_port(efx);
1448 if (efx_dev_registered(efx) && netif_device_present(efx->net_dev))
1449 netif_tx_wake_all_queues(efx->net_dev);
1451 efx_for_each_channel(channel, efx)
1452 efx_start_channel(channel);
1454 if (efx->legacy_irq)
1455 efx->legacy_irq_enabled = true;
1456 efx_nic_enable_interrupts(efx);
1458 /* Switch to event based MCDI completions after enabling interrupts.
1459 * If a reset has been scheduled, then we need to stay in polled mode.
1460 * Rather than serialising efx_mcdi_mode_event() [which sleeps] and
1461 * reset_pending [modified from an atomic context], we instead guarantee
1462 * that efx_mcdi_mode_poll() isn't reverted erroneously */
1463 efx_mcdi_mode_event(efx);
1464 if (efx->reset_pending != RESET_TYPE_NONE)
1465 efx_mcdi_mode_poll(efx);
1467 /* Start the hardware monitor if there is one. Otherwise (we're link
1468 * event driven), we have to poll the PHY because after an event queue
1469 * flush, we could have a missed a link state change */
1470 if (efx->type->monitor != NULL) {
1471 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1472 efx_monitor_interval);
1473 } else {
1474 mutex_lock(&efx->mac_lock);
1475 if (efx->phy_op->poll(efx))
1476 efx_link_status_changed(efx);
1477 mutex_unlock(&efx->mac_lock);
1480 efx->type->start_stats(efx);
1483 /* Flush all delayed work. Should only be called when no more delayed work
1484 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1485 * since we're holding the rtnl_lock at this point. */
1486 static void efx_flush_all(struct efx_nic *efx)
1488 /* Make sure the hardware monitor is stopped */
1489 cancel_delayed_work_sync(&efx->monitor_work);
1490 /* Stop scheduled port reconfigurations */
1491 cancel_work_sync(&efx->mac_work);
1494 /* Quiesce hardware and software without bringing the link down.
1495 * Safe to call multiple times, when the nic and interface is in any
1496 * state. The caller is guaranteed to subsequently be in a position
1497 * to modify any hardware and software state they see fit without
1498 * taking locks. */
1499 static void efx_stop_all(struct efx_nic *efx)
1501 struct efx_channel *channel;
1503 EFX_ASSERT_RESET_SERIALISED(efx);
1505 /* port_enabled can be read safely under the rtnl lock */
1506 if (!efx->port_enabled)
1507 return;
1509 efx->type->stop_stats(efx);
1511 /* Switch to MCDI polling on Siena before disabling interrupts */
1512 efx_mcdi_mode_poll(efx);
1514 /* Disable interrupts and wait for ISR to complete */
1515 efx_nic_disable_interrupts(efx);
1516 if (efx->legacy_irq) {
1517 synchronize_irq(efx->legacy_irq);
1518 efx->legacy_irq_enabled = false;
1520 efx_for_each_channel(channel, efx) {
1521 if (channel->irq)
1522 synchronize_irq(channel->irq);
1525 /* Stop all NAPI processing and synchronous rx refills */
1526 efx_for_each_channel(channel, efx)
1527 efx_stop_channel(channel);
1529 /* Stop all asynchronous port reconfigurations. Since all
1530 * event processing has already been stopped, there is no
1531 * window to loose phy events */
1532 efx_stop_port(efx);
1534 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1535 efx_flush_all(efx);
1537 /* Stop the kernel transmit interface late, so the watchdog
1538 * timer isn't ticking over the flush */
1539 if (efx_dev_registered(efx)) {
1540 netif_tx_stop_all_queues(efx->net_dev);
1541 netif_tx_lock_bh(efx->net_dev);
1542 netif_tx_unlock_bh(efx->net_dev);
1546 static void efx_remove_all(struct efx_nic *efx)
1548 efx_remove_filters(efx);
1549 efx_remove_channels(efx);
1550 efx_remove_port(efx);
1551 efx_remove_nic(efx);
1554 /**************************************************************************
1556 * Interrupt moderation
1558 **************************************************************************/
1560 static unsigned irq_mod_ticks(int usecs, int resolution)
1562 if (usecs <= 0)
1563 return 0; /* cannot receive interrupts ahead of time :-) */
1564 if (usecs < resolution)
1565 return 1; /* never round down to 0 */
1566 return usecs / resolution;
1569 /* Set interrupt moderation parameters */
1570 void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, int rx_usecs,
1571 bool rx_adaptive)
1573 struct efx_channel *channel;
1574 unsigned tx_ticks = irq_mod_ticks(tx_usecs, EFX_IRQ_MOD_RESOLUTION);
1575 unsigned rx_ticks = irq_mod_ticks(rx_usecs, EFX_IRQ_MOD_RESOLUTION);
1577 EFX_ASSERT_RESET_SERIALISED(efx);
1579 efx->irq_rx_adaptive = rx_adaptive;
1580 efx->irq_rx_moderation = rx_ticks;
1581 efx_for_each_channel(channel, efx) {
1582 if (efx_channel_has_rx_queue(channel))
1583 channel->irq_moderation = rx_ticks;
1584 else if (efx_channel_has_tx_queues(channel))
1585 channel->irq_moderation = tx_ticks;
1589 /**************************************************************************
1591 * Hardware monitor
1593 **************************************************************************/
1595 /* Run periodically off the general workqueue */
1596 static void efx_monitor(struct work_struct *data)
1598 struct efx_nic *efx = container_of(data, struct efx_nic,
1599 monitor_work.work);
1601 netif_vdbg(efx, timer, efx->net_dev,
1602 "hardware monitor executing on CPU %d\n",
1603 raw_smp_processor_id());
1604 BUG_ON(efx->type->monitor == NULL);
1606 /* If the mac_lock is already held then it is likely a port
1607 * reconfiguration is already in place, which will likely do
1608 * most of the work of monitor() anyway. */
1609 if (mutex_trylock(&efx->mac_lock)) {
1610 if (efx->port_enabled)
1611 efx->type->monitor(efx);
1612 mutex_unlock(&efx->mac_lock);
1615 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1616 efx_monitor_interval);
1619 /**************************************************************************
1621 * ioctls
1623 *************************************************************************/
1625 /* Net device ioctl
1626 * Context: process, rtnl_lock() held.
1628 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1630 struct efx_nic *efx = netdev_priv(net_dev);
1631 struct mii_ioctl_data *data = if_mii(ifr);
1633 EFX_ASSERT_RESET_SERIALISED(efx);
1635 /* Convert phy_id from older PRTAD/DEVAD format */
1636 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1637 (data->phy_id & 0xfc00) == 0x0400)
1638 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1640 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1643 /**************************************************************************
1645 * NAPI interface
1647 **************************************************************************/
1649 static void efx_init_napi(struct efx_nic *efx)
1651 struct efx_channel *channel;
1653 efx_for_each_channel(channel, efx) {
1654 channel->napi_dev = efx->net_dev;
1655 netif_napi_add(channel->napi_dev, &channel->napi_str,
1656 efx_poll, napi_weight);
1660 static void efx_fini_napi_channel(struct efx_channel *channel)
1662 if (channel->napi_dev)
1663 netif_napi_del(&channel->napi_str);
1664 channel->napi_dev = NULL;
1667 static void efx_fini_napi(struct efx_nic *efx)
1669 struct efx_channel *channel;
1671 efx_for_each_channel(channel, efx)
1672 efx_fini_napi_channel(channel);
1675 /**************************************************************************
1677 * Kernel netpoll interface
1679 *************************************************************************/
1681 #ifdef CONFIG_NET_POLL_CONTROLLER
1683 /* Although in the common case interrupts will be disabled, this is not
1684 * guaranteed. However, all our work happens inside the NAPI callback,
1685 * so no locking is required.
1687 static void efx_netpoll(struct net_device *net_dev)
1689 struct efx_nic *efx = netdev_priv(net_dev);
1690 struct efx_channel *channel;
1692 efx_for_each_channel(channel, efx)
1693 efx_schedule_channel(channel);
1696 #endif
1698 /**************************************************************************
1700 * Kernel net device interface
1702 *************************************************************************/
1704 /* Context: process, rtnl_lock() held. */
1705 static int efx_net_open(struct net_device *net_dev)
1707 struct efx_nic *efx = netdev_priv(net_dev);
1708 EFX_ASSERT_RESET_SERIALISED(efx);
1710 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1711 raw_smp_processor_id());
1713 if (efx->state == STATE_DISABLED)
1714 return -EIO;
1715 if (efx->phy_mode & PHY_MODE_SPECIAL)
1716 return -EBUSY;
1717 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1718 return -EIO;
1720 /* Notify the kernel of the link state polled during driver load,
1721 * before the monitor starts running */
1722 efx_link_status_changed(efx);
1724 efx_start_all(efx);
1725 return 0;
1728 /* Context: process, rtnl_lock() held.
1729 * Note that the kernel will ignore our return code; this method
1730 * should really be a void.
1732 static int efx_net_stop(struct net_device *net_dev)
1734 struct efx_nic *efx = netdev_priv(net_dev);
1736 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1737 raw_smp_processor_id());
1739 if (efx->state != STATE_DISABLED) {
1740 /* Stop the device and flush all the channels */
1741 efx_stop_all(efx);
1742 efx_fini_channels(efx);
1743 efx_init_channels(efx);
1746 return 0;
1749 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1750 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev, struct rtnl_link_stats64 *stats)
1752 struct efx_nic *efx = netdev_priv(net_dev);
1753 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1755 spin_lock_bh(&efx->stats_lock);
1756 efx->type->update_stats(efx);
1757 spin_unlock_bh(&efx->stats_lock);
1759 stats->rx_packets = mac_stats->rx_packets;
1760 stats->tx_packets = mac_stats->tx_packets;
1761 stats->rx_bytes = mac_stats->rx_bytes;
1762 stats->tx_bytes = mac_stats->tx_bytes;
1763 stats->rx_dropped = efx->n_rx_nodesc_drop_cnt;
1764 stats->multicast = mac_stats->rx_multicast;
1765 stats->collisions = mac_stats->tx_collision;
1766 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1767 mac_stats->rx_length_error);
1768 stats->rx_crc_errors = mac_stats->rx_bad;
1769 stats->rx_frame_errors = mac_stats->rx_align_error;
1770 stats->rx_fifo_errors = mac_stats->rx_overflow;
1771 stats->rx_missed_errors = mac_stats->rx_missed;
1772 stats->tx_window_errors = mac_stats->tx_late_collision;
1774 stats->rx_errors = (stats->rx_length_errors +
1775 stats->rx_crc_errors +
1776 stats->rx_frame_errors +
1777 mac_stats->rx_symbol_error);
1778 stats->tx_errors = (stats->tx_window_errors +
1779 mac_stats->tx_bad);
1781 return stats;
1784 /* Context: netif_tx_lock held, BHs disabled. */
1785 static void efx_watchdog(struct net_device *net_dev)
1787 struct efx_nic *efx = netdev_priv(net_dev);
1789 netif_err(efx, tx_err, efx->net_dev,
1790 "TX stuck with port_enabled=%d: resetting channels\n",
1791 efx->port_enabled);
1793 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1797 /* Context: process, rtnl_lock() held. */
1798 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1800 struct efx_nic *efx = netdev_priv(net_dev);
1801 int rc = 0;
1803 EFX_ASSERT_RESET_SERIALISED(efx);
1805 if (new_mtu > EFX_MAX_MTU)
1806 return -EINVAL;
1808 efx_stop_all(efx);
1810 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
1812 efx_fini_channels(efx);
1814 mutex_lock(&efx->mac_lock);
1815 /* Reconfigure the MAC before enabling the dma queues so that
1816 * the RX buffers don't overflow */
1817 net_dev->mtu = new_mtu;
1818 efx->mac_op->reconfigure(efx);
1819 mutex_unlock(&efx->mac_lock);
1821 efx_init_channels(efx);
1823 efx_start_all(efx);
1824 return rc;
1827 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1829 struct efx_nic *efx = netdev_priv(net_dev);
1830 struct sockaddr *addr = data;
1831 char *new_addr = addr->sa_data;
1833 EFX_ASSERT_RESET_SERIALISED(efx);
1835 if (!is_valid_ether_addr(new_addr)) {
1836 netif_err(efx, drv, efx->net_dev,
1837 "invalid ethernet MAC address requested: %pM\n",
1838 new_addr);
1839 return -EINVAL;
1842 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1844 /* Reconfigure the MAC */
1845 mutex_lock(&efx->mac_lock);
1846 efx->mac_op->reconfigure(efx);
1847 mutex_unlock(&efx->mac_lock);
1849 return 0;
1852 /* Context: netif_addr_lock held, BHs disabled. */
1853 static void efx_set_multicast_list(struct net_device *net_dev)
1855 struct efx_nic *efx = netdev_priv(net_dev);
1856 struct netdev_hw_addr *ha;
1857 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1858 u32 crc;
1859 int bit;
1861 efx->promiscuous = !!(net_dev->flags & IFF_PROMISC);
1863 /* Build multicast hash table */
1864 if (efx->promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1865 memset(mc_hash, 0xff, sizeof(*mc_hash));
1866 } else {
1867 memset(mc_hash, 0x00, sizeof(*mc_hash));
1868 netdev_for_each_mc_addr(ha, net_dev) {
1869 crc = ether_crc_le(ETH_ALEN, ha->addr);
1870 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1871 set_bit_le(bit, mc_hash->byte);
1874 /* Broadcast packets go through the multicast hash filter.
1875 * ether_crc_le() of the broadcast address is 0xbe2612ff
1876 * so we always add bit 0xff to the mask.
1878 set_bit_le(0xff, mc_hash->byte);
1881 if (efx->port_enabled)
1882 queue_work(efx->workqueue, &efx->mac_work);
1883 /* Otherwise efx_start_port() will do this */
1886 static int efx_set_features(struct net_device *net_dev, u32 data)
1888 struct efx_nic *efx = netdev_priv(net_dev);
1890 /* If disabling RX n-tuple filtering, clear existing filters */
1891 if (net_dev->features & ~data & NETIF_F_NTUPLE)
1892 efx_filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
1894 return 0;
1897 static const struct net_device_ops efx_netdev_ops = {
1898 .ndo_open = efx_net_open,
1899 .ndo_stop = efx_net_stop,
1900 .ndo_get_stats64 = efx_net_stats,
1901 .ndo_tx_timeout = efx_watchdog,
1902 .ndo_start_xmit = efx_hard_start_xmit,
1903 .ndo_validate_addr = eth_validate_addr,
1904 .ndo_do_ioctl = efx_ioctl,
1905 .ndo_change_mtu = efx_change_mtu,
1906 .ndo_set_mac_address = efx_set_mac_address,
1907 .ndo_set_multicast_list = efx_set_multicast_list,
1908 .ndo_set_features = efx_set_features,
1909 #ifdef CONFIG_NET_POLL_CONTROLLER
1910 .ndo_poll_controller = efx_netpoll,
1911 #endif
1912 .ndo_setup_tc = efx_setup_tc,
1913 #ifdef CONFIG_RFS_ACCEL
1914 .ndo_rx_flow_steer = efx_filter_rfs,
1915 #endif
1918 static void efx_update_name(struct efx_nic *efx)
1920 strcpy(efx->name, efx->net_dev->name);
1921 efx_mtd_rename(efx);
1922 efx_set_channel_names(efx);
1925 static int efx_netdev_event(struct notifier_block *this,
1926 unsigned long event, void *ptr)
1928 struct net_device *net_dev = ptr;
1930 if (net_dev->netdev_ops == &efx_netdev_ops &&
1931 event == NETDEV_CHANGENAME)
1932 efx_update_name(netdev_priv(net_dev));
1934 return NOTIFY_DONE;
1937 static struct notifier_block efx_netdev_notifier = {
1938 .notifier_call = efx_netdev_event,
1941 static ssize_t
1942 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
1944 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
1945 return sprintf(buf, "%d\n", efx->phy_type);
1947 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
1949 static int efx_register_netdev(struct efx_nic *efx)
1951 struct net_device *net_dev = efx->net_dev;
1952 struct efx_channel *channel;
1953 int rc;
1955 net_dev->watchdog_timeo = 5 * HZ;
1956 net_dev->irq = efx->pci_dev->irq;
1957 net_dev->netdev_ops = &efx_netdev_ops;
1958 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
1960 /* Clear MAC statistics */
1961 efx->mac_op->update_stats(efx);
1962 memset(&efx->mac_stats, 0, sizeof(efx->mac_stats));
1964 rtnl_lock();
1966 rc = dev_alloc_name(net_dev, net_dev->name);
1967 if (rc < 0)
1968 goto fail_locked;
1969 efx_update_name(efx);
1971 rc = register_netdevice(net_dev);
1972 if (rc)
1973 goto fail_locked;
1975 efx_for_each_channel(channel, efx) {
1976 struct efx_tx_queue *tx_queue;
1977 efx_for_each_channel_tx_queue(tx_queue, channel)
1978 efx_init_tx_queue_core_txq(tx_queue);
1981 /* Always start with carrier off; PHY events will detect the link */
1982 netif_carrier_off(efx->net_dev);
1984 rtnl_unlock();
1986 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1987 if (rc) {
1988 netif_err(efx, drv, efx->net_dev,
1989 "failed to init net dev attributes\n");
1990 goto fail_registered;
1993 return 0;
1995 fail_locked:
1996 rtnl_unlock();
1997 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
1998 return rc;
2000 fail_registered:
2001 unregister_netdev(net_dev);
2002 return rc;
2005 static void efx_unregister_netdev(struct efx_nic *efx)
2007 struct efx_channel *channel;
2008 struct efx_tx_queue *tx_queue;
2010 if (!efx->net_dev)
2011 return;
2013 BUG_ON(netdev_priv(efx->net_dev) != efx);
2015 /* Free up any skbs still remaining. This has to happen before
2016 * we try to unregister the netdev as running their destructors
2017 * may be needed to get the device ref. count to 0. */
2018 efx_for_each_channel(channel, efx) {
2019 efx_for_each_channel_tx_queue(tx_queue, channel)
2020 efx_release_tx_buffers(tx_queue);
2023 if (efx_dev_registered(efx)) {
2024 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2025 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2026 unregister_netdev(efx->net_dev);
2030 /**************************************************************************
2032 * Device reset and suspend
2034 **************************************************************************/
2036 /* Tears down the entire software state and most of the hardware state
2037 * before reset. */
2038 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2040 EFX_ASSERT_RESET_SERIALISED(efx);
2042 efx_stop_all(efx);
2043 mutex_lock(&efx->mac_lock);
2045 efx_fini_channels(efx);
2046 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
2047 efx->phy_op->fini(efx);
2048 efx->type->fini(efx);
2051 /* This function will always ensure that the locks acquired in
2052 * efx_reset_down() are released. A failure return code indicates
2053 * that we were unable to reinitialise the hardware, and the
2054 * driver should be disabled. If ok is false, then the rx and tx
2055 * engines are not restarted, pending a RESET_DISABLE. */
2056 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2058 int rc;
2060 EFX_ASSERT_RESET_SERIALISED(efx);
2062 rc = efx->type->init(efx);
2063 if (rc) {
2064 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2065 goto fail;
2068 if (!ok)
2069 goto fail;
2071 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2072 rc = efx->phy_op->init(efx);
2073 if (rc)
2074 goto fail;
2075 if (efx->phy_op->reconfigure(efx))
2076 netif_err(efx, drv, efx->net_dev,
2077 "could not restore PHY settings\n");
2080 efx->mac_op->reconfigure(efx);
2082 efx_init_channels(efx);
2083 efx_restore_filters(efx);
2085 mutex_unlock(&efx->mac_lock);
2087 efx_start_all(efx);
2089 return 0;
2091 fail:
2092 efx->port_initialized = false;
2094 mutex_unlock(&efx->mac_lock);
2096 return rc;
2099 /* Reset the NIC using the specified method. Note that the reset may
2100 * fail, in which case the card will be left in an unusable state.
2102 * Caller must hold the rtnl_lock.
2104 int efx_reset(struct efx_nic *efx, enum reset_type method)
2106 int rc, rc2;
2107 bool disabled;
2109 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2110 RESET_TYPE(method));
2112 netif_device_detach(efx->net_dev);
2113 efx_reset_down(efx, method);
2115 rc = efx->type->reset(efx, method);
2116 if (rc) {
2117 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2118 goto out;
2121 /* Allow resets to be rescheduled. */
2122 efx->reset_pending = RESET_TYPE_NONE;
2124 /* Reinitialise bus-mastering, which may have been turned off before
2125 * the reset was scheduled. This is still appropriate, even in the
2126 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2127 * can respond to requests. */
2128 pci_set_master(efx->pci_dev);
2130 out:
2131 /* Leave device stopped if necessary */
2132 disabled = rc || method == RESET_TYPE_DISABLE;
2133 rc2 = efx_reset_up(efx, method, !disabled);
2134 if (rc2) {
2135 disabled = true;
2136 if (!rc)
2137 rc = rc2;
2140 if (disabled) {
2141 dev_close(efx->net_dev);
2142 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2143 efx->state = STATE_DISABLED;
2144 } else {
2145 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2146 netif_device_attach(efx->net_dev);
2148 return rc;
2151 /* The worker thread exists so that code that cannot sleep can
2152 * schedule a reset for later.
2154 static void efx_reset_work(struct work_struct *data)
2156 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2158 if (efx->reset_pending == RESET_TYPE_NONE)
2159 return;
2161 /* If we're not RUNNING then don't reset. Leave the reset_pending
2162 * flag set so that efx_pci_probe_main will be retried */
2163 if (efx->state != STATE_RUNNING) {
2164 netif_info(efx, drv, efx->net_dev,
2165 "scheduled reset quenched. NIC not RUNNING\n");
2166 return;
2169 rtnl_lock();
2170 (void)efx_reset(efx, efx->reset_pending);
2171 rtnl_unlock();
2174 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2176 enum reset_type method;
2178 if (efx->reset_pending != RESET_TYPE_NONE) {
2179 netif_info(efx, drv, efx->net_dev,
2180 "quenching already scheduled reset\n");
2181 return;
2184 switch (type) {
2185 case RESET_TYPE_INVISIBLE:
2186 case RESET_TYPE_ALL:
2187 case RESET_TYPE_WORLD:
2188 case RESET_TYPE_DISABLE:
2189 method = type;
2190 break;
2191 case RESET_TYPE_RX_RECOVERY:
2192 case RESET_TYPE_RX_DESC_FETCH:
2193 case RESET_TYPE_TX_DESC_FETCH:
2194 case RESET_TYPE_TX_SKIP:
2195 method = RESET_TYPE_INVISIBLE;
2196 break;
2197 case RESET_TYPE_MC_FAILURE:
2198 default:
2199 method = RESET_TYPE_ALL;
2200 break;
2203 if (method != type)
2204 netif_dbg(efx, drv, efx->net_dev,
2205 "scheduling %s reset for %s\n",
2206 RESET_TYPE(method), RESET_TYPE(type));
2207 else
2208 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2209 RESET_TYPE(method));
2211 efx->reset_pending = method;
2213 /* efx_process_channel() will no longer read events once a
2214 * reset is scheduled. So switch back to poll'd MCDI completions. */
2215 efx_mcdi_mode_poll(efx);
2217 queue_work(reset_workqueue, &efx->reset_work);
2220 /**************************************************************************
2222 * List of NICs we support
2224 **************************************************************************/
2226 /* PCI device ID table */
2227 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2228 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_A_P_DEVID),
2229 .driver_data = (unsigned long) &falcon_a1_nic_type},
2230 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_B_P_DEVID),
2231 .driver_data = (unsigned long) &falcon_b0_nic_type},
2232 {PCI_DEVICE(EFX_VENDID_SFC, BETHPAGE_A_P_DEVID),
2233 .driver_data = (unsigned long) &siena_a0_nic_type},
2234 {PCI_DEVICE(EFX_VENDID_SFC, SIENA_A_P_DEVID),
2235 .driver_data = (unsigned long) &siena_a0_nic_type},
2236 {0} /* end of list */
2239 /**************************************************************************
2241 * Dummy PHY/MAC operations
2243 * Can be used for some unimplemented operations
2244 * Needed so all function pointers are valid and do not have to be tested
2245 * before use
2247 **************************************************************************/
2248 int efx_port_dummy_op_int(struct efx_nic *efx)
2250 return 0;
2252 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2254 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2256 return false;
2259 static const struct efx_phy_operations efx_dummy_phy_operations = {
2260 .init = efx_port_dummy_op_int,
2261 .reconfigure = efx_port_dummy_op_int,
2262 .poll = efx_port_dummy_op_poll,
2263 .fini = efx_port_dummy_op_void,
2266 /**************************************************************************
2268 * Data housekeeping
2270 **************************************************************************/
2272 /* This zeroes out and then fills in the invariants in a struct
2273 * efx_nic (including all sub-structures).
2275 static int efx_init_struct(struct efx_nic *efx, const struct efx_nic_type *type,
2276 struct pci_dev *pci_dev, struct net_device *net_dev)
2278 int i;
2280 /* Initialise common structures */
2281 memset(efx, 0, sizeof(*efx));
2282 spin_lock_init(&efx->biu_lock);
2283 #ifdef CONFIG_SFC_MTD
2284 INIT_LIST_HEAD(&efx->mtd_list);
2285 #endif
2286 INIT_WORK(&efx->reset_work, efx_reset_work);
2287 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2288 efx->pci_dev = pci_dev;
2289 efx->msg_enable = debug;
2290 efx->state = STATE_INIT;
2291 efx->reset_pending = RESET_TYPE_NONE;
2292 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2294 efx->net_dev = net_dev;
2295 spin_lock_init(&efx->stats_lock);
2296 mutex_init(&efx->mac_lock);
2297 efx->mac_op = type->default_mac_ops;
2298 efx->phy_op = &efx_dummy_phy_operations;
2299 efx->mdio.dev = net_dev;
2300 INIT_WORK(&efx->mac_work, efx_mac_work);
2302 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2303 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2304 if (!efx->channel[i])
2305 goto fail;
2308 efx->type = type;
2310 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
2312 /* Higher numbered interrupt modes are less capable! */
2313 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2314 interrupt_mode);
2316 /* Would be good to use the net_dev name, but we're too early */
2317 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2318 pci_name(pci_dev));
2319 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2320 if (!efx->workqueue)
2321 goto fail;
2323 return 0;
2325 fail:
2326 efx_fini_struct(efx);
2327 return -ENOMEM;
2330 static void efx_fini_struct(struct efx_nic *efx)
2332 int i;
2334 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2335 kfree(efx->channel[i]);
2337 if (efx->workqueue) {
2338 destroy_workqueue(efx->workqueue);
2339 efx->workqueue = NULL;
2343 /**************************************************************************
2345 * PCI interface
2347 **************************************************************************/
2349 /* Main body of final NIC shutdown code
2350 * This is called only at module unload (or hotplug removal).
2352 static void efx_pci_remove_main(struct efx_nic *efx)
2354 #ifdef CONFIG_RFS_ACCEL
2355 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap);
2356 efx->net_dev->rx_cpu_rmap = NULL;
2357 #endif
2358 efx_nic_fini_interrupt(efx);
2359 efx_fini_channels(efx);
2360 efx_fini_port(efx);
2361 efx->type->fini(efx);
2362 efx_fini_napi(efx);
2363 efx_remove_all(efx);
2366 /* Final NIC shutdown
2367 * This is called only at module unload (or hotplug removal).
2369 static void efx_pci_remove(struct pci_dev *pci_dev)
2371 struct efx_nic *efx;
2373 efx = pci_get_drvdata(pci_dev);
2374 if (!efx)
2375 return;
2377 /* Mark the NIC as fini, then stop the interface */
2378 rtnl_lock();
2379 efx->state = STATE_FINI;
2380 dev_close(efx->net_dev);
2382 /* Allow any queued efx_resets() to complete */
2383 rtnl_unlock();
2385 efx_unregister_netdev(efx);
2387 efx_mtd_remove(efx);
2389 /* Wait for any scheduled resets to complete. No more will be
2390 * scheduled from this point because efx_stop_all() has been
2391 * called, we are no longer registered with driverlink, and
2392 * the net_device's have been removed. */
2393 cancel_work_sync(&efx->reset_work);
2395 efx_pci_remove_main(efx);
2397 efx_fini_io(efx);
2398 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2400 pci_set_drvdata(pci_dev, NULL);
2401 efx_fini_struct(efx);
2402 free_netdev(efx->net_dev);
2405 /* Main body of NIC initialisation
2406 * This is called at module load (or hotplug insertion, theoretically).
2408 static int efx_pci_probe_main(struct efx_nic *efx)
2410 int rc;
2412 /* Do start-of-day initialisation */
2413 rc = efx_probe_all(efx);
2414 if (rc)
2415 goto fail1;
2417 efx_init_napi(efx);
2419 rc = efx->type->init(efx);
2420 if (rc) {
2421 netif_err(efx, probe, efx->net_dev,
2422 "failed to initialise NIC\n");
2423 goto fail3;
2426 rc = efx_init_port(efx);
2427 if (rc) {
2428 netif_err(efx, probe, efx->net_dev,
2429 "failed to initialise port\n");
2430 goto fail4;
2433 efx_init_channels(efx);
2435 rc = efx_nic_init_interrupt(efx);
2436 if (rc)
2437 goto fail5;
2439 return 0;
2441 fail5:
2442 efx_fini_channels(efx);
2443 efx_fini_port(efx);
2444 fail4:
2445 efx->type->fini(efx);
2446 fail3:
2447 efx_fini_napi(efx);
2448 efx_remove_all(efx);
2449 fail1:
2450 return rc;
2453 /* NIC initialisation
2455 * This is called at module load (or hotplug insertion,
2456 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2457 * sets up and registers the network devices with the kernel and hooks
2458 * the interrupt service routine. It does not prepare the device for
2459 * transmission; this is left to the first time one of the network
2460 * interfaces is brought up (i.e. efx_net_open).
2462 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2463 const struct pci_device_id *entry)
2465 const struct efx_nic_type *type = (const struct efx_nic_type *) entry->driver_data;
2466 struct net_device *net_dev;
2467 struct efx_nic *efx;
2468 int i, rc;
2470 /* Allocate and initialise a struct net_device and struct efx_nic */
2471 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
2472 EFX_MAX_RX_QUEUES);
2473 if (!net_dev)
2474 return -ENOMEM;
2475 net_dev->features |= (type->offload_features | NETIF_F_SG |
2476 NETIF_F_HIGHDMA | NETIF_F_TSO |
2477 NETIF_F_RXCSUM);
2478 if (type->offload_features & NETIF_F_V6_CSUM)
2479 net_dev->features |= NETIF_F_TSO6;
2480 /* Mask for features that also apply to VLAN devices */
2481 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2482 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
2483 NETIF_F_RXCSUM);
2484 /* All offloads can be toggled */
2485 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA;
2486 efx = netdev_priv(net_dev);
2487 pci_set_drvdata(pci_dev, efx);
2488 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2489 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2490 if (rc)
2491 goto fail1;
2493 netif_info(efx, probe, efx->net_dev,
2494 "Solarflare Communications NIC detected\n");
2496 /* Set up basic I/O (BAR mappings etc) */
2497 rc = efx_init_io(efx);
2498 if (rc)
2499 goto fail2;
2501 /* No serialisation is required with the reset path because
2502 * we're in STATE_INIT. */
2503 for (i = 0; i < 5; i++) {
2504 rc = efx_pci_probe_main(efx);
2506 /* Serialise against efx_reset(). No more resets will be
2507 * scheduled since efx_stop_all() has been called, and we
2508 * have not and never have been registered with either
2509 * the rtnetlink or driverlink layers. */
2510 cancel_work_sync(&efx->reset_work);
2512 if (rc == 0) {
2513 if (efx->reset_pending != RESET_TYPE_NONE) {
2514 /* If there was a scheduled reset during
2515 * probe, the NIC is probably hosed anyway */
2516 efx_pci_remove_main(efx);
2517 rc = -EIO;
2518 } else {
2519 break;
2523 /* Retry if a recoverably reset event has been scheduled */
2524 if ((efx->reset_pending != RESET_TYPE_INVISIBLE) &&
2525 (efx->reset_pending != RESET_TYPE_ALL))
2526 goto fail3;
2528 efx->reset_pending = RESET_TYPE_NONE;
2531 if (rc) {
2532 netif_err(efx, probe, efx->net_dev, "Could not reset NIC\n");
2533 goto fail4;
2536 /* Switch to the running state before we expose the device to the OS,
2537 * so that dev_open()|efx_start_all() will actually start the device */
2538 efx->state = STATE_RUNNING;
2540 rc = efx_register_netdev(efx);
2541 if (rc)
2542 goto fail5;
2544 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2546 rtnl_lock();
2547 efx_mtd_probe(efx); /* allowed to fail */
2548 rtnl_unlock();
2549 return 0;
2551 fail5:
2552 efx_pci_remove_main(efx);
2553 fail4:
2554 fail3:
2555 efx_fini_io(efx);
2556 fail2:
2557 efx_fini_struct(efx);
2558 fail1:
2559 WARN_ON(rc > 0);
2560 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2561 free_netdev(net_dev);
2562 return rc;
2565 static int efx_pm_freeze(struct device *dev)
2567 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2569 efx->state = STATE_FINI;
2571 netif_device_detach(efx->net_dev);
2573 efx_stop_all(efx);
2574 efx_fini_channels(efx);
2576 return 0;
2579 static int efx_pm_thaw(struct device *dev)
2581 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2583 efx->state = STATE_INIT;
2585 efx_init_channels(efx);
2587 mutex_lock(&efx->mac_lock);
2588 efx->phy_op->reconfigure(efx);
2589 mutex_unlock(&efx->mac_lock);
2591 efx_start_all(efx);
2593 netif_device_attach(efx->net_dev);
2595 efx->state = STATE_RUNNING;
2597 efx->type->resume_wol(efx);
2599 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2600 queue_work(reset_workqueue, &efx->reset_work);
2602 return 0;
2605 static int efx_pm_poweroff(struct device *dev)
2607 struct pci_dev *pci_dev = to_pci_dev(dev);
2608 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2610 efx->type->fini(efx);
2612 efx->reset_pending = RESET_TYPE_NONE;
2614 pci_save_state(pci_dev);
2615 return pci_set_power_state(pci_dev, PCI_D3hot);
2618 /* Used for both resume and restore */
2619 static int efx_pm_resume(struct device *dev)
2621 struct pci_dev *pci_dev = to_pci_dev(dev);
2622 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2623 int rc;
2625 rc = pci_set_power_state(pci_dev, PCI_D0);
2626 if (rc)
2627 return rc;
2628 pci_restore_state(pci_dev);
2629 rc = pci_enable_device(pci_dev);
2630 if (rc)
2631 return rc;
2632 pci_set_master(efx->pci_dev);
2633 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2634 if (rc)
2635 return rc;
2636 rc = efx->type->init(efx);
2637 if (rc)
2638 return rc;
2639 efx_pm_thaw(dev);
2640 return 0;
2643 static int efx_pm_suspend(struct device *dev)
2645 int rc;
2647 efx_pm_freeze(dev);
2648 rc = efx_pm_poweroff(dev);
2649 if (rc)
2650 efx_pm_resume(dev);
2651 return rc;
2654 static struct dev_pm_ops efx_pm_ops = {
2655 .suspend = efx_pm_suspend,
2656 .resume = efx_pm_resume,
2657 .freeze = efx_pm_freeze,
2658 .thaw = efx_pm_thaw,
2659 .poweroff = efx_pm_poweroff,
2660 .restore = efx_pm_resume,
2663 static struct pci_driver efx_pci_driver = {
2664 .name = KBUILD_MODNAME,
2665 .id_table = efx_pci_table,
2666 .probe = efx_pci_probe,
2667 .remove = efx_pci_remove,
2668 .driver.pm = &efx_pm_ops,
2671 /**************************************************************************
2673 * Kernel module interface
2675 *************************************************************************/
2677 module_param(interrupt_mode, uint, 0444);
2678 MODULE_PARM_DESC(interrupt_mode,
2679 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2681 static int __init efx_init_module(void)
2683 int rc;
2685 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2687 rc = register_netdevice_notifier(&efx_netdev_notifier);
2688 if (rc)
2689 goto err_notifier;
2691 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2692 if (!reset_workqueue) {
2693 rc = -ENOMEM;
2694 goto err_reset;
2697 rc = pci_register_driver(&efx_pci_driver);
2698 if (rc < 0)
2699 goto err_pci;
2701 return 0;
2703 err_pci:
2704 destroy_workqueue(reset_workqueue);
2705 err_reset:
2706 unregister_netdevice_notifier(&efx_netdev_notifier);
2707 err_notifier:
2708 return rc;
2711 static void __exit efx_exit_module(void)
2713 printk(KERN_INFO "Solarflare NET driver unloading\n");
2715 pci_unregister_driver(&efx_pci_driver);
2716 destroy_workqueue(reset_workqueue);
2717 unregister_netdevice_notifier(&efx_netdev_notifier);
2721 module_init(efx_init_module);
2722 module_exit(efx_exit_module);
2724 MODULE_AUTHOR("Solarflare Communications and "
2725 "Michael Brown <mbrown@fensystems.co.uk>");
2726 MODULE_DESCRIPTION("Solarflare Communications network driver");
2727 MODULE_LICENSE("GPL");
2728 MODULE_DEVICE_TABLE(pci, efx_pci_table);