sfc: Don't use enums as a bitmask.
[zen-stable.git] / drivers / net / wireless / rt2x00 / rt2x00reg.h
blob6f867eec49cce734c7c01ab149423bd8a3f77222
1 /*
2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22 Module: rt2x00
23 Abstract: rt2x00 generic register information.
26 #ifndef RT2X00REG_H
27 #define RT2X00REG_H
30 * RX crypto status
32 enum rx_crypto {
33 RX_CRYPTO_SUCCESS = 0,
34 RX_CRYPTO_FAIL_ICV = 1,
35 RX_CRYPTO_FAIL_MIC = 2,
36 RX_CRYPTO_FAIL_KEY = 3,
40 * Antenna values
42 enum antenna {
43 ANTENNA_SW_DIVERSITY = 0,
44 ANTENNA_A = 1,
45 ANTENNA_B = 2,
46 ANTENNA_HW_DIVERSITY = 3,
50 * Led mode values.
52 enum led_mode {
53 LED_MODE_DEFAULT = 0,
54 LED_MODE_TXRX_ACTIVITY = 1,
55 LED_MODE_SIGNAL_STRENGTH = 2,
56 LED_MODE_ASUS = 3,
57 LED_MODE_ALPHA = 4,
61 * TSF sync values
63 enum tsf_sync {
64 TSF_SYNC_NONE = 0,
65 TSF_SYNC_INFRA = 1,
66 TSF_SYNC_ADHOC = 2,
67 TSF_SYNC_AP_NONE = 3,
71 * Device states
73 enum dev_state {
74 STATE_DEEP_SLEEP = 0,
75 STATE_SLEEP = 1,
76 STATE_STANDBY = 2,
77 STATE_AWAKE = 3,
80 * Additional device states, these values are
81 * not strict since they are not directly passed
82 * into the device.
84 STATE_RADIO_ON,
85 STATE_RADIO_OFF,
86 STATE_RADIO_IRQ_ON,
87 STATE_RADIO_IRQ_OFF,
91 * IFS backoff values
93 enum ifs {
94 IFS_BACKOFF = 0,
95 IFS_SIFS = 1,
96 IFS_NEW_BACKOFF = 2,
97 IFS_NONE = 3,
101 * IFS backoff values for HT devices
103 enum txop {
104 TXOP_HTTXOP = 0,
105 TXOP_PIFS = 1,
106 TXOP_SIFS = 2,
107 TXOP_BACKOFF = 3,
111 * Cipher types for hardware encryption
113 enum cipher {
114 CIPHER_NONE = 0,
115 CIPHER_WEP64 = 1,
116 CIPHER_WEP128 = 2,
117 CIPHER_TKIP = 3,
118 CIPHER_AES = 4,
120 * The following fields were added by rt61pci and rt73usb.
122 CIPHER_CKIP64 = 5,
123 CIPHER_CKIP128 = 6,
124 CIPHER_TKIP_NO_MIC = 7, /* Don't send to device */
127 * Max cipher type.
128 * Note that CIPHER_NONE isn't counted, and CKIP64 and CKIP128
129 * are excluded due to limitations in mac80211.
131 CIPHER_MAX = 4,
135 * Rate modulations
137 enum rate_modulation {
138 RATE_MODE_CCK = 0,
139 RATE_MODE_OFDM = 1,
140 RATE_MODE_HT_MIX = 2,
141 RATE_MODE_HT_GREENFIELD = 3,
145 * Firmware validation error codes
147 enum firmware_errors {
148 FW_OK,
149 FW_BAD_CRC,
150 FW_BAD_LENGTH,
151 FW_BAD_VERSION,
155 * Register handlers.
156 * We store the position of a register field inside a field structure,
157 * This will simplify the process of setting and reading a certain field
158 * inside the register while making sure the process remains byte order safe.
160 struct rt2x00_field8 {
161 u8 bit_offset;
162 u8 bit_mask;
165 struct rt2x00_field16 {
166 u16 bit_offset;
167 u16 bit_mask;
170 struct rt2x00_field32 {
171 u32 bit_offset;
172 u32 bit_mask;
176 * Power of two check, this will check
177 * if the mask that has been given contains and contiguous set of bits.
178 * Note that we cannot use the is_power_of_2() function since this
179 * check must be done at compile-time.
181 #define is_power_of_two(x) ( !((x) & ((x)-1)) )
182 #define low_bit_mask(x) ( ((x)-1) & ~(x) )
183 #define is_valid_mask(x) is_power_of_two(1LU + (x) + low_bit_mask(x))
186 * Macros to find first set bit in a variable.
187 * These macros behave the same as the __ffs() functions but
188 * the most important difference that this is done during
189 * compile-time rather then run-time.
191 #define compile_ffs2(__x) \
192 __builtin_choose_expr(((__x) & 0x1), 0, 1)
194 #define compile_ffs4(__x) \
195 __builtin_choose_expr(((__x) & 0x3), \
196 (compile_ffs2((__x))), \
197 (compile_ffs2((__x) >> 2) + 2))
199 #define compile_ffs8(__x) \
200 __builtin_choose_expr(((__x) & 0xf), \
201 (compile_ffs4((__x))), \
202 (compile_ffs4((__x) >> 4) + 4))
204 #define compile_ffs16(__x) \
205 __builtin_choose_expr(((__x) & 0xff), \
206 (compile_ffs8((__x))), \
207 (compile_ffs8((__x) >> 8) + 8))
209 #define compile_ffs32(__x) \
210 __builtin_choose_expr(((__x) & 0xffff), \
211 (compile_ffs16((__x))), \
212 (compile_ffs16((__x) >> 16) + 16))
215 * This macro will check the requirements for the FIELD{8,16,32} macros
216 * The mask should be a constant non-zero contiguous set of bits which
217 * does not exceed the given typelimit.
219 #define FIELD_CHECK(__mask, __type) \
220 BUILD_BUG_ON(!(__mask) || \
221 !is_valid_mask(__mask) || \
222 (__mask) != (__type)(__mask)) \
224 #define FIELD8(__mask) \
225 ({ \
226 FIELD_CHECK(__mask, u8); \
227 (struct rt2x00_field8) { \
228 compile_ffs8(__mask), (__mask) \
229 }; \
232 #define FIELD16(__mask) \
233 ({ \
234 FIELD_CHECK(__mask, u16); \
235 (struct rt2x00_field16) { \
236 compile_ffs16(__mask), (__mask) \
237 }; \
240 #define FIELD32(__mask) \
241 ({ \
242 FIELD_CHECK(__mask, u32); \
243 (struct rt2x00_field32) { \
244 compile_ffs32(__mask), (__mask) \
245 }; \
248 #define SET_FIELD(__reg, __type, __field, __value)\
249 ({ \
250 typecheck(__type, __field); \
251 *(__reg) &= ~((__field).bit_mask); \
252 *(__reg) |= ((__value) << \
253 ((__field).bit_offset)) & \
254 ((__field).bit_mask); \
257 #define GET_FIELD(__reg, __type, __field) \
258 ({ \
259 typecheck(__type, __field); \
260 ((__reg) & ((__field).bit_mask)) >> \
261 ((__field).bit_offset); \
264 #define rt2x00_set_field32(__reg, __field, __value) \
265 SET_FIELD(__reg, struct rt2x00_field32, __field, __value)
266 #define rt2x00_get_field32(__reg, __field) \
267 GET_FIELD(__reg, struct rt2x00_field32, __field)
269 #define rt2x00_set_field16(__reg, __field, __value) \
270 SET_FIELD(__reg, struct rt2x00_field16, __field, __value)
271 #define rt2x00_get_field16(__reg, __field) \
272 GET_FIELD(__reg, struct rt2x00_field16, __field)
274 #define rt2x00_set_field8(__reg, __field, __value) \
275 SET_FIELD(__reg, struct rt2x00_field8, __field, __value)
276 #define rt2x00_get_field8(__reg, __field) \
277 GET_FIELD(__reg, struct rt2x00_field8, __field)
279 #endif /* RT2X00REG_H */